Hi,
I have updated my blog with series of posts providing information about the
progress of the project, and other tutorials describing how to build
rtems-or1k toolchain, RTEMS kernel and how to run/debug RTEMS from
or1ksim/gdb. If you are interested in the project, you may want to have a
look at
Hi,
I am trying to get ticker.exe working properly for or1ksim BSP but
there is a problem. When I run ticker, I only get the following output
*** BEGIN OF TEST CLOCK TICK ***
TA1 - rtems_clock_get_tod - 09:00:00 12/31/1988
TA2 - rtems_clock_get_tod - 09:00:00 12/31/1988
TA3 -
is very bad
and usually indicates a real problem. It also results in 1000s of
warnings in the build logs.
--joel
On 7/18/2014 3:16 PM, Hesham Moustafa wrote:
On Fri, Jul 18, 2014 at 4:19 PM, Gedare Bloom ged...@rtems.org wrote:
I see you are kind of copying the file structure of ARM. I'm
Hi,
I have read about MMU and Caches in OpenRISC to start implementing
related managers in the new or1k port. Before beginning to write the
code, I would like to introduce some of the architecture details
regarding MMU and Caches.
There are both; data and instruction MMU, TLBs, Caches.
First,
On Tue, Jul 29, 2014 at 3:18 AM, Gedare Bloom ged...@rtems.org wrote:
On Mon, Jul 28, 2014 at 1:20 PM, Hesham Moustafa heshamelmat...@gmail.com
wrote:
Hi,
I have read about MMU and Caches in OpenRISC to start implementing
related managers in the new or1k port. Before beginning to write
Hi all,
I was trying to figure out where to increment ISR level related
variables. First, I wanna indicate that the current OpenRISC port only
has two level of interrupts: disable/enable. Given that, does this
mean that the maximum interrupt level is 1?
I noticed that there is some architectures
On Thu, Jul 31, 2014 at 4:17 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On July 31, 2014 8:54:29 AM CDT, Hesham Moustafa heshamelmat...@gmail.com
wrote:
Hi all,
I was trying to figure out where to increment ISR level related
variables. First, I wanna indicate that the current
On Fri, Aug 8, 2014 at 4:02 PM, Joel Sherrill joel.sherr...@oarcorp.com wrote:
On 8/8/2014 8:54 AM, Gedare Bloom wrote:
Hi,
The macro CPU_ISR_PASSES_FRAME_POINTER is part of a cpu port defined
in cpu.h, but this macro seems to be unused. I don't know what the
purpose of it was intended.
joel.sherr...@oarcorp.com wrote:
On 8/8/2014 10:11 AM, Gedare Bloom wrote:
On Fri, Aug 8, 2014 at 10:52 AM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 8/8/2014 9:38 AM, Hesham Moustafa wrote:
On Fri, Aug 8, 2014 at 4:02 PM, Joel Sherrill joel.sherr...@oarcorp.com
wrote:
On 8/8/2014 8:54 AM
On Mon, Aug 11, 2014 at 8:33 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 8/11/2014 1:16 PM, Gedare Bloom wrote:
On Mon, Aug 11, 2014 at 8:03 AM, Hesham ALMatary
heshamelmat...@gmail.com wrote:
This work is based on the old or32 port (that has been removed back in 2005)
authored by
On Mon, Aug 11, 2014 at 8:16 PM, Gedare Bloom ged...@rtems.org wrote:
On Mon, Aug 11, 2014 at 8:03 AM, Hesham ALMatary
heshamelmat...@gmail.com wrote:
This work is based on the old or32 port (that has been removed back in 2005)
authored by Chris Ziomkowski. The patch includes the basic
On Mon, Aug 11, 2014 at 8:33 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 8/11/2014 1:16 PM, Gedare Bloom wrote:
On Mon, Aug 11, 2014 at 8:03 AM, Hesham ALMatary
heshamelmat...@gmail.com wrote:
This work is based on the old or32 port (that has been removed back in 2005)
authored by
On Tue, Aug 12, 2014 at 9:21 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
Feedback after committing:
1) cpukit/score/cpu/or1k/prenstall.am was not in patch. I added
and committed it.
Thanks for adding it.
2) Without a BSP to specify, nothing gets built.
See how your tree works now
Hi Joel,
On Tue, Aug 19, 2014 at 8:09 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 8/19/2014 1:00 PM, Hesham ALMatary wrote:
This BSP is intended to run on or1ksim (the main OpenRISC emulator).
---
c/src/aclocal/rtems-cpu-subdirs.m4 | 1 +
On Tue, Aug 19, 2014 at 8:09 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 8/19/2014 1:00 PM, Hesham ALMatary wrote:
This BSP is intended to run on or1ksim (the main OpenRISC emulator).
---
c/src/aclocal/rtems-cpu-subdirs.m4 | 1 +
c/src/lib/libbsp/or1k/Makefile.am
On Thu, Aug 21, 2014 at 11:44 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 8/21/2014 4:04 PM, Christian Svensson wrote:
On Thu, Aug 21, 2014 at 9:56 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
The sp must be updated before the memory can be used. This is just
a bug otherwise.
On Thu, Aug 21, 2014 at 11:54 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 8/21/2014 4:15 PM, Hesham Moustafa wrote:
On Thu, Aug 21, 2014 at 10:56 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 8/21/2014 2:44 PM, Hesham Moustafa wrote:
Hi,
I have been debugging since
On Tue, Aug 26, 2014 at 4:09 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 8/26/2014 8:53 AM, Hesham Moustafa wrote:
Hi,
On Mon, Aug 25, 2014 at 6:15 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
I pushed all of this set and will be testing soon.
Great, Thanks!
No problem
On Thu, Aug 28, 2014 at 4:25 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 8/28/2014 9:20 AM, Hesham Moustafa wrote:
On Thu, Aug 28, 2014 at 4:12 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
Chris should be on a Mac. I am on Fedora 20.
I am on Fedora 20 too
$ autoconf
On Fri, Aug 29, 2014 at 3:45 AM, Chris Johns chr...@rtems.org wrote:
On 29/08/2014 12:30 am, Hesham Moustafa wrote:
On Thu, Aug 28, 2014 at 4:25 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 8/28/2014 9:20 AM, Hesham Moustafa wrote:
On Thu, Aug 28, 2014 at 4:12 PM, Joel Sherrill
On Fri, Aug 29, 2014 at 12:58 PM, Ralf Corsepius
ralf.corsep...@rtems.org wrote:
On 08/29/2014 10:55 AM, Hesham Moustafa wrote:
Does the attached patch fix the problem ?
I applied the attached patch (for both HEAD, and before Joel's
preinstall.am commit), and then run bootstrap -p, the same
Hi,
On Fri, Aug 29, 2014 at 2:55 PM, Ralf Corsepius
ralf.corsep...@rtems.org wrote:
On 08/29/2014 01:11 PM, Hesham Moustafa wrote:
On Fri, Aug 29, 2014 at 12:58 PM, Ralf Corsepius
ralf.corsep...@rtems.org wrote:
On 08/29/2014 10:55 AM, Hesham Moustafa wrote:
Does the attached patch fix
Hi,
Thanks for confirming that. Another note is that the output exe
program is or1k-elf-sim (not the same as old released which are
or32-elf-sim and sim). I will reflect this name in the README and
sim-scripts.
Thanks,
Hesham
On Fri, Aug 29, 2014 at 9:18 PM, Joel Sherrill
On Fri, Aug 29, 2014 at 9:19 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
Hi
I think something isn't quite right. I don't know if gcc isn't including
these or the bsp_specs isn't picking them up. It is a long holiday weekend
and I just wanted to throw this out since I don't have time
On Aug 29, 2014 10:10 PM, Joel Sherrill joel.sherr...@oarcorp.com wrote:
On 8/29/2014 2:24 PM, Hesham Moustafa wrote:
On Fri, Aug 29, 2014 at 9:19 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
Hi
I think something isn't quite right. I don't know if gcc isn't
including
On Wed, Sep 3, 2014 at 5:14 AM, Chris Johns chr...@rtems.org wrote:
On 3/09/2014 12:21 am, Joel Sherrill wrote:
cpukit/score/cpu/or1k/preinstall.am|6 +-
Did this patch happen before my fix to the preinstall went in ?
Yes.
I am seeing an issue with this one.
I will
I came across this problem (as I currently implementing cache
manager). First I tried to add my new cache.c implementation at this
libcpu/or1k/Makefile.am line:
## shared/cache
include_libcpu_HEADERS = ../shared/include/cache.h
noinst_PROGRAMS += shared/cache.rel
shared_cache_rel_SOURCES =
:58 PM, Hesham Moustafa heshamelmat...@gmail.com wrote:
Hi,
Given that I am able to run qemu-or1k from sim-scripts (I will push
the script soon)
Is there a way to run all tests with one command and get results of
how many passed/failed tests? (i.e, 5/10 passed tests)
Thanks,
Hesham
On Sep 7, 2014 3:18 AM, Joel Sherrill joel.sherr...@oarcorp.com wrote:
Shouldn't your name be on it? :)
I did almost nothing but copying another file and changing few lines to fit
with or1k :-)
Post the list of failures on devel@ and maybe they will be ones we
recognize as common.
On Sep 8, 2014 12:40 AM, Chris Johns chr...@rtems.org wrote:
On 7/09/2014 4:25 pm, Hesham Moustafa wrote:
The test results improved a little bit from yesterday. Here are the
results:
Passed: 365
Failed: 6
Timeouts: 130
Invalid:2
Total:503
Average test time: 0:00:22.877361
On Tue, Sep 16, 2014 at 5:59 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
I am not sure what it up. Chris committed a patch that changed
the sort order to be more uniform. But your preinstall.am's don't
match.
I generated an updated one in a separate commit before (after Chris
change),
On Tue, Sep 16, 2014 at 8:15 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 9/16/2014 12:54 PM, Hesham Moustafa wrote:
Hi
On Tue, Sep 16, 2014 at 7:47 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
I don't understand this but I got it applied.
I manually edited the saved email
On Tue, Sep 16, 2014 at 8:15 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 9/16/2014 12:54 PM, Hesham Moustafa wrote:
Hi
On Tue, Sep 16, 2014 at 7:47 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
I don't understand this but I got it applied.
I manually edited the saved email
On Tue, Sep 16, 2014 at 8:42 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 9/16/2014 1:34 PM, Hesham Moustafa wrote:
On Tue, Sep 16, 2014 at 8:15 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 9/16/2014 12:54 PM, Hesham Moustafa wrote:
Hi
On Tue, Sep 16, 2014 at 7:47 PM
-child is overwritten somehow?
On Tue, Sep 16, 2014 at 9:21 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 9/16/2014 2:17 PM, Hesham Moustafa wrote:
On Tue, Sep 16, 2014 at 8:42 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 9/16/2014 1:34 PM, Hesham Moustafa wrote:
On Tue
, 2014 at 9:45 PM, Hesham Moustafa
heshamelmat...@gmail.com wrote:
Breakpoint 2, 0x0600 in _unalign ()
(gdb) bt
#0 0x0600 in _unalign ()
#1 0x0002ec4c in _RBTree_Next (
node=0x40890, dir=RBT_RIGHT)
at ../../../../../../rtems/c/src/../../cpukit/score/src/rbtreenext.c:35
#2
, Hesham Moustafa wrote:
On Wed, Sep 17, 2014 at 9:44 PM, Joel Sherrill
joel.sherr...@oarcorp.com
mailto:joel.sherr...@oarcorp.com wrote:
On 9/17/2014 12:44 PM, Hesham Moustafa wrote:
On Tue, Sep 16, 2014 at 11:08 PM, Joel Sherrill
joel.sherr...@oarcorp.com
On Sep 20, 2014 6:44 AM, Chris Johns chr...@rtems.org wrote:
On 20/09/2014 12:56 am, Hesham Moustafa wrote:
However, when I tested failures and timeouts separately, most of them
work on QEMU, the others miss the trailing end-of-test line, which
exists when I run them on or1ksim simulator
On Sat, Sep 20, 2014 at 7:53 AM, Chris Johns chr...@rtems.org wrote:
On 20/09/2014 3:13 pm, Hesham Moustafa wrote:
I have 4 physical cores, and I usually run make with J8. My host OS is
fedora 20.
Try with --jobs=4 and see if you get any time outs. Anything else running
at the same time
On Sun, Sep 21, 2014 at 1:15 AM, Chris Johns chr...@rtems.org wrote:
On 21/09/2014 8:57 am, Hesham Moustafa wrote:
On Sat, Sep 20, 2014 at 7:53 AM, Chris Johns chr...@rtems.org
mailto:chr...@rtems.org wrote:
On 20/09/2014 3:13 pm, Hesham Moustafa wrote:
I have 4 physical
Hi,
This is the result with --jobs=1 run:
Passed: 467
Failed: 0
Timeouts: 36
Invalid:0
Total:503
Thanks,
Hesham
On Sun, Sep 21, 2014 at 2:38 AM, Hesham Moustafa heshamelmat...@gmail.com
wrote:
On Sun, Sep 21, 2014 at 2:21 AM, Chris Johns chr...@rtems.org wrote:
On 21/09
On Mon, Sep 29, 2014 at 10:02 PM, Joel Sherrill joel.sherr...@oarcorp.com
wrote:
On 9/29/2014 2:53 PM, Hesham Moustafa wrote:
Thanks for committing.
There are some other few pending patches. This one [1] adds
qemu-system-or32 script to sim-scripts, and this [2] adds a new RTEMS
tester
Hi,
I want to send shutdown signal from RTEMS to qemu. Joel said that
qemu-system-i386 does so; can anyone refers me to how to implement that for
qemu-system-or32 (openrisc)?
Regards,
Hesham
___
devel mailing list
devel@rtems.org
Missed patch?
On Fri, Oct 10, 2014 at 7:23 PM, Hesham ALMatary heshamelmat...@gmail.com
wrote:
---
c/src/lib/libcpu/or1k/shared/cache/cache.c | 16
c/src/lib/libcpu/or1k/shared/cache/cache_.h | 1 +
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git
On Mon, Oct 13, 2014 at 7:03 PM, Joel Sherrill joel.sherr...@oarcorp.com
wrote:
On 10/13/2014 11:45 AM, Hesham Moustafa wrote:
Missed patch?
Yep. Committed now. This should address a bunch of the or1ksim
build warnings. I fixed another in console/uart.c for an unused
variable.
Thanks
Please have a look at this patch.
On Fri, Oct 10, 2014 at 6:45 PM, Hesham ALMatary heshamelmat...@gmail.com
wrote:
---
c/src/lib/libbsp/or1k/or1ksim/clock/clockdrv.c | 2 +-
c/src/lib/libbsp/or1k/or1ksim/console/uart.c | 15 +++
2 files changed, 12 insertions(+), 5
Hi,
Thanks for providing these results. or1ksim related warnings should be
greatly decreased after the latest two patches I submitted.
Regards,
Hesham
On Mon, Oct 13, 2014 at 6:50 PM, Joel Sherrill joel.sherr...@oarcorp.com
wrote:
Hi
Attached is the set of unique warnings and list of
Hi all,
This year, I am studying MSc (by research) degree at the University of
York. My thesis proposal title is REAL-TIME OPERATING SYSTEMS FOR LARGE
SCALE MANY-CORE NETWORK-ON-CHIP ARCHITECTURES. Part of this research will
include some work with RTEMS.
That said, I'd appreciate any materials
On Mon, Oct 27, 2014 at 2:30 PM, Joel Sherrill joel.sherr...@oarcorp.com
wrote:
On October 27, 2014 3:04:26 AM PDT, Hesham Moustafa
heshamelmat...@gmail.com wrote:
Hi all,
This year, I am studying MSc (by research) degree at the University of
York. My thesis proposal title is REAL
, 2014 at 10:04 AM, Hesham Moustafa
heshamelmat...@gmail.com wrote:
Hi all,
This year, I am studying MSc (by research) degree at the University of
York.
My thesis proposal title is REAL-TIME OPERATING SYSTEMS FOR LARGE SCALE
MANY-CORE NETWORK-ON-CHIP ARCHITECTURES. Part of this research
On Tue, Oct 28, 2014 at 6:06 AM, Gedare Bloom ged...@gwmail.gwu.edu wrote:
On Mon, Oct 27, 2014 at 4:43 PM, Hesham Moustafa
heshamelmat...@gmail.com wrote:
On Mon, Oct 27, 2014 at 2:30 PM, Joel Sherrill
joel.sherr...@oarcorp.com
wrote:
On October 27, 2014 3:04:26 AM PDT
Hi,
Sorry for the false alarm, it seems to be due to some rebasing issues.
I forked a vanilla repo and it builds fine with/without POSIX enabled.
Regards,
Hesham
On Wed, Oct 29, 2014 at 8:37 PM, Joel Sherrill joel.sherr...@oarcorp.com
wrote:
On 10/25/2014 8:57 AM, Hesham Moustafa wrote:
Hi
Hi all,
I want to ask about the status of RTEMS toolchain for Epiphany
architecture. I think Joel mentioned that there are some previous support
for it; and if yes, does the toolchain need some additional work?
Regards,
Hesham
___
devel mailing list
On Thu Nov 13 2014 at 2:59:33 PM Joel Sherrill joel.sherr...@oarcorp.com
wrote:
On 11/13/2014 8:07 AM, Joel Sherrill wrote:
On November 13, 2014 6:30:48 AM CST, Hesham Moustafa
heshamelmat...@gmail.com wrote:
Hi all,
I want to ask about the status of RTEMS toolchain for Epiphany
On Thu Nov 13 2014 at 9:01:34 PM Joel Sherrill joel.sherr...@oarcorp.com
wrote:
On 11/13/2014 2:46 PM, Hesham Moustafa wrote:
Hi,
Thanks a lot for the patches. I will let you know with the status.
One thing I want someone to confirm about is that I will not be
able to use/copy any
Hi all,
I have for just forked a vanilla RTEMS repo. This is the first time for me
to build RTEMS after I have upgraded to Fedora 21.
When I run ./boostrap I got the following warning:
Makefile.am:27: warning: source file '../../shared/bsplibc.c' is in a
subdirectory,
Makefile.am:27: but option
On Wed, Nov 19, 2014 at 2:01 PM, Joel Sherrill joel.sherr...@oarcorp.com
wrote:
On November 19, 2014 7:55:24 AM CST, Hesham Moustafa
heshamelmat...@gmail.com wrote:
Hi all,
I have for just forked a vanilla RTEMS repo. This is the first time for
me to build RTEMS after I have upgraded
On Wed, Nov 19, 2014 at 4:08 PM, Joel Sherrill joel.sherr...@oarcorp.com
wrote:
On 11/19/2014 10:04 AM, Hesham Moustafa wrote:
Hi,
I have been working on getting Epiphany toolchain built for RTEMS, and
then compile mninmal RTEMS code. Once issue I face now is that I got
this error
Hi,
On Wed, Nov 19, 2014 at 5:01 PM, Joel Sherrill joel.sherr...@oarcorp.com
wrote:
Hi
I am sure you all have noticed that the RTEMS Project has had
a lot of services offline for the past week. This has been part
of a rehosting and improvement effort that simply took longer
than anyone
Hi all,
I came across an issue with alignment when I am porting RTEMS to Epiphany
now. The reference manual says that stores should be aligned according to
the store instruction type (half word, word, double word). For example strd
instruction should get an address aligned to 8 bytes. Although I
Hi,
I have a problem with getting printf working correctly. printf is
working totally fine with just one string argument (hello world for
example), however when printf is passed some variable arguments, it
totally prints some garbage strings. Printing time function (in
ticker) is an example for
initializing data structures)
and even hello world won't work. I am discussing this issue with
Epiphany folks currently.
-Gedare
On Thu, Dec 4, 2014 at 12:46 PM, Hesham Moustafa
heshamelmat...@gmail.com wrote:
Hi,
I have a problem with getting printf working correctly. printf is
working totally fine
Hi,
Should I add anything other than --enable-smp at configuration line
and RTEMS_CHECK_SMP
AM_CONDITIONAL(HAS_SMP,[test $rtems_cv_HAS_SMP = yes])
to bsp configure.ac file to make the building system collects SMP
files (e.g, smpimpl.h). I always get undefined reference to some SMP
functions like
It seems like adding an entry for epiphany at aclocal/enable-smp.m4 is
not enough, I still get the same error, any hints?
On Fri, Dec 5, 2014 at 6:03 PM, Hesham Moustafa
heshamelmat...@gmail.com wrote:
I had to add epiphany to the list RTEMS CPUs that support SMP at
aclocal/enable-smp.m4
port is in its very early stages, and need more
work.
Regards,
Hesham
On Fri, Dec 5, 2014 at 10:31 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On December 5, 2014 2:40:59 PM CST, Hesham Moustafa
heshamelmat...@gmail.com wrote:
On Fri, Dec 5, 2014 at 8:36 PM, Gedare Bloom ged
On Mon, Dec 8, 2014 at 7:12 AM, Sebastian Huber
sebastian.hu...@embedded-brains.de wrote:
On 06/12/14 21:56, Hesham Moustafa wrote:
Thanks Joel and Gedare. I found it a bit tricky as I had to add
epiphany to (hidden) aclocal/enable-smp.m4 files at c/src, cpukit and
the root directory.
Yes
Hi all,
I have been implementing SMP for a new architecture (Epiphany) and I
have some questions.
When the secondary processor should be waiting (or going to idle
state)? At Thread_Start_multitasking?
When a secondary processor is interrupted by another one? When it's
allocated a thread (lazy
and use static initialization
only.
On 17/12/14 17:00, Hesham Moustafa wrote:
Hi all,
I am working on reducing RTEMS size to fit into 32KB as every Epiphay
core has only 32KB of local memory. I was able to get hello and
minimum samples with aggressive size reduction by manually removing
On Thu, Dec 18, 2014 at 10:08 AM, Sebastian Huber
sebastian.hu...@embedded-brains.de wrote:
On 18/12/14 10:34, Hesham Moustafa wrote:
Sebastian, the 32KB is for both code and data. Although there is 32MB
external memory, it's very slow compared with local memories. The idea
of getting rid
On Thu, Dec 18, 2014 at 4:38 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On 12/18/2014 9:40 AM, Hesham Moustafa wrote:
On Thu, Dec 18, 2014 at 3:38 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
On December 18, 2014 5:18:31 AM PST, Sebastian Huber
sebastian.hu...@embedded
, 2014 at 6:40 PM, Marcos Díaz
marcos.d...@tallertechnologies.com wrote:
On Thu, Dec 18, 2014 at 6:34 AM, Hesham Moustafa heshamelmat...@gmail.com
wrote:
Hi all,
Thanks for all your helpful replies. I actually tried all the solution
you mentioned: used printk, low-ticker (from example-v2
Hello all,
I want to ask for your opinion about implementing pfair scheduler (and its
variants), what are the challenges from RTEMS implementation perspective?
For the fine-gradined locking, would it make sense to implement other lock
types (than the giant lock)?
What are the (implementation)
OK for now I have a Hello World port working, using a very little code
for UART_RS232 IP (two functions send/receive and UART register
definitions) which I believe there is a similar code for it on RTEMS
somewhere. Should I (or anyone of you) create a thread on Xilinx
forums to discuss about that
On Mon, Feb 2, 2015 at 2:36 PM, Joel Sherrill joel.sherr...@oarcorp.com wrote:
On 2/2/2015 7:57 AM, Hesham Moustafa wrote:
OK for now I have a Hello World port working, using a very little code
for UART_RS232 IP (two functions send/receive and UART register
definitions) which I believe
Hi,
I am currently porting RTEMS to Microblaze based on Joel's work. Hello
world hits Init and printf successfully, so I have to write a console
driver. Xilinx has UART driver already. The question is can I copy
code from Xilinx files to RTEMS? The files have (c) Copyright
2002-2013 Xilinx, Inc.
On Tue, Feb 10, 2015 at 8:21 PM, Joel Sherrill
joel.sherr...@oarcorp.com wrote:
Thanks. One down.
Crap. It should have had a comment that closed the PR. :(
Who should add the comment? The ticket is now closed (fixed). In the
future patches, should I tag the ticket/PR number part of the commit
Hi all,
In case some of you don't know, I have ported RTEMS to OpenRISC last year
during GSoC. All the code is now upstream and works fine. I wrote a
tutorial describing how to get RTEMS running on OpenRISC simulators
(or1ksim and QEMU) totally from scratch [1].
[1]
Hi,
I am wondering how can I checkout a github repo, and from RSB change
to another branch, and build from their. For example this repo [1] has
master branch called epiphany-binutils-2.23 which is not stable,
instead it has another stable branch called
epiphany-binutils-2.23-software-cache which
Hi all,
I was trying to compile/build Rump Kernel (POSIXy hypercall + Rump
kernel) as a library to run above RTEMS/POSIX. So, this POSIXy
Hypercall expects the host (which is RTEMS here) to provide the
required POSIX implementation.
When I tried to build hypercall + Rump Kernel [1] as a library,
Eight: 4 for data and 4 for instructions. BAT areas can not overlap.
Hesham
On Jun 22, 2013 12:39 AM, Chris Johns chr...@rtems.org wrote:
Hesham Moustafa wrote:
Hi there,
I am working on providing memory protection for many targets/BSPs that
RTEMS support through a library called libmm
protection. Only a developer
who ports libmm should know about HW details like BAT and Pages.
wkr,
Thomas.
On 22.06.2013 04:11, Chris Johns wrote:
Hesham Moustafa wrote:
Eight: 4 for data and 4 for instructions. BAT areas can not overlap.
Then I suggest we support for pages as well
On Sun, Jun 23, 2013 at 11:18 AM, Sebastian Huber
sebastian.hu...@embedded-brains.de wrote:
Hello,
on PowerPC you have also the Freescale Book E based MMUs:
http://www.freescale.com/**files/32bit/doc/ref_manual/**EREF_RM.pdfhttp://www.freescale.com/files/32bit/doc/ref_manual/EREF_RM.pdf
Hi,
What's the best way(s) to handle memory exceptions that result from memory
access and permission violations ? for example, what should happen if an
area of memory set to be read only and a thread tried to write data into
this area ? Currently I am using it in debugging purpose to monitor
I have some errors related too the same BSP when --enable-smp too. But it's
only for some Atomic/sptests test cases, other sample and libtests built
successfully. Here is the error :
On Sat, Jul 6, 2013 at 6:11 PM, Deng Hengyi wei.a.y...@gmail.com wrote:
And do you use the latest repo from git which do not have problem with
libtests build?
I am using the latest update from github, AFAIK it's synchronized daily
with git repo.
The only difference is that I configure rtems
On Tue, Jul 9, 2013 at 2:07 AM, Rempel, Cynthia cynt6...@vandals.uidaho.edu
wrote:
Hi Hesham Moustafa,
Thanks for adding the .doc s :)
Is there a way to conditionally build the mmtests based on whether libmm
is being built?
My initial thought is something like an AM_CONDITIONAL
http
:
Hi Hesham Moustafa,
Thanks for adding the .doc s :)
Is there a way to conditionally build the mmtests based on whether libmm
is being built?
My initial thought is something like an AM_CONDITIONAL
http://www.gnu.org/software/automake/manual/html_node/Subdirectories
of patches at the end of the summer :)
---
I noticed there wasn't a copyright on the .doc s. Could you add
# COPYRIGHT (c) 2013.
# Hesham Moustafa.
#
# The license and distribution terms for this file may be
# found in the file LICENSE in this distribution or at
# http://www.rtems.com
implementation we can review it.
A patch To include the stubs and high-level headers for every BSP and
changes to all Makefile.am only ?
On Tue, Jul 9, 2013 at 12:53 PM, Hesham Moustafa
heshamelmat...@gmail.com wrote:
On Tue, Jul 9, 2013 at 6:47 PM, Rempel, Cynthia
cynt6
Hi,
The current test cases for libmm use hard-coded memory region addresses to
apply memory attributes on. We want to remove that BSP dependency and hide
any target specs to enable test cases to run for any BSP. I would suggest
some solutions for your review :
- Use the current allocators like
Hi all,
To make libmm abstract for the user who wants to apply memory attributes
for a region of memory, libmm defines general common attributes at
high-level that maps to specific CPU attributes for each target. These
attributes are for Caches, memory protection currently. I propose two
solution
Hey all,
I am working on Raspberry Pi BSP which has ARM1176JZF-S (ARMv6) processor
on it. Here is what I am doing that causes the processor to halt:
At BSP startup, specifically in bsp_start_hook_0 function, I call another
function that :
1- Initialize first level page tables (sections) with
I try to add any more
drivers.
The readme at the repository below has some good info on setting up JTAG
on the raspberry pi:
https://github.com/dwelch67/raspberrypi/tree/master/armjtag
Alan
On 8/22/2013 6:48 PM, Hesham Moustafa wrote:
Hey all,
I am working on Raspberry Pi BSP which
Hey all,
I submitted recent patches for libmm project.
I would appreciate your review and feedback.
I have also updated my blog to document libmm
design and some changes [1]
[1]
http://heshamelmatary.blogspot.com/2013/08/libmm-design-on-rtems-for-arm.html
Regards,
Hesham
On Mon, Aug 26, 2013 at 5:22 PM, Sebastian Huber
sebastian.hu...@embedded-brains.de wrote:
On 2013-08-26 02:14, Hesham AL-Matary wrote:
+/**
+ * @brief _Memory_management_Region Flags defs
+ */
+#define RTEMS_MM_REGION_NO_PROTECTION 0x0
+#define
On Mon, Aug 26, 2013 at 4:54 PM, Gedare Bloom ged...@rtems.org wrote:
On Sun, Aug 25, 2013 at 8:14 PM, Hesham AL-Matary
heshamelmat...@gmail.com wrote:
---
cpukit/score/Makefile.am | 2 +
cpukit/score/include/rtems/score/mm.h | 52
On Mon, Aug 26, 2013 at 8:21 PM, Gedare Bloom ged...@rtems.org wrote:
On Mon, Aug 26, 2013 at 2:15 PM, Hesham Moustafa
heshamelmat...@gmail.com wrote:
On Mon, Aug 26, 2013 at 5:22 PM, Sebastian Huber
sebastian.hu...@embedded-brains.de wrote:
On 2013-08-26 02:14, Hesham AL-Matary
On Wed, Aug 28, 2013 at 12:11 PM, Hesham Moustafa
heshamelmat...@gmail.com wrote:
Hey all,
Please review the new patches after fixups according
to your reviews.
Thanks,
Hesham
On Tue, Aug 27, 2013 at 6:39 PM, Gedare Bloom ged...@gwmail.gwu.edu wrote:
For 0003-libmm-libcpu-arm-shared.patch
(even if that structure is only a
wrapper for the lock).
-Gedare
On Wed, Aug 28, 2013 at 12:11 PM, Hesham Moustafa
heshamelmat...@gmail.com wrote:
Hey all,
Please review the new patches after fixups according
to your reviews.
Thanks,
Hesham
On Tue, Aug 27, 2013 at 6:39 PM, Gedare Bloom
Hi,
Currently libmm have a routine implemented at libcpu/arm/shared
Since libcpu maybe deprecated soon, I'd like to ask whether I should
move this implementation to libbsp files or not. This function just
apply protection attributes for a memory region dynamically. What may
be the best directory
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