Re: [PATCH 2/3] bsps/microblaze: Add support for multiple UARTs
On Thu, Mar 30, 2023 at 5:54 PM Chris Johns wrote: > > On 31/3/2023 2:55 am, Alex White wrote: > > On Wed, Mar 29, 2023 at 11:04 PM Chris Johns wrote: > >> > >> On 30/3/2023 12:26 pm, Sam Price wrote: > >>> Same IP as the regular KCU105. > >>> The current uart ip is dependent on the fpga. > >>> I don't believe this modifies the kcu105 bsp, but allows other bsps to > >>> support up to 4 uarts. > >> > >> I am not sure if this patch is OK. If the UART driver is needed for a > >> console > >> does that limits how it's configuration can be handled? If so that means > >> the > >> patch is OK. Adding options for a user's custom IP is questionable. > > > > This patch allows the user to use multiple instances of the same UART IP > > (AXI UART Lite v2.0) which is currently the only IP supported by the BSP. > > What happens if a user needs more than 4 ports? I was discussing such a > project > recently with someone and Microblaze may be an option? > > I do not have a better solution at the moment so I am just understand the what > we accept and why plus how we manage it. I see your point. A user could come along needing 5, 6, or 7 ports. It's not sustainable to keep adding ports to the driver like this. It doesn't scale well at all. We probably need a build option for the maximum number of ports and a way to configure the ports at runtime. This should be easy if the user is using a device tree, but if they aren't, they need a way to specify the configuration of each port. It's late so I can't think of a good way to do this right now. Maybe only allow some small number of ports (one?) to be specified if the user isn't using a device tree? Alex ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 2/3] bsps/microblaze: Add support for multiple UARTs
On 31/3/2023 2:55 am, Alex White wrote: > On Wed, Mar 29, 2023 at 11:04 PM Chris Johns wrote: >> >> On 30/3/2023 12:26 pm, Sam Price wrote: >>> Same IP as the regular KCU105. >>> The current uart ip is dependent on the fpga. >>> I don't believe this modifies the kcu105 bsp, but allows other bsps to >>> support up to 4 uarts. >> >> I am not sure if this patch is OK. If the UART driver is needed for a console >> does that limits how it's configuration can be handled? If so that means the >> patch is OK. Adding options for a user's custom IP is questionable. > > This patch allows the user to use multiple instances of the same UART IP (AXI > UART Lite v2.0) which is currently the only IP supported by the BSP. What happens if a user needs more than 4 ports? I was discussing such a project recently with someone and Microblaze may be an option? I do not have a better solution at the moment so I am just understand the what we accept and why plus how we manage it. Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 2/3] bsps/microblaze: Add support for multiple UARTs
On Wed, Mar 29, 2023 at 11:04 PM Chris Johns wrote: > > On 30/3/2023 12:26 pm, Sam Price wrote: > > Same IP as the regular KCU105. > > The current uart ip is dependent on the fpga. > > I don't believe this modifies the kcu105 bsp, but allows other bsps to > > support up to 4 uarts. > > I am not sure if this patch is OK. If the UART driver is needed for a console > does that limits how it's configuration can be handled? If so that means the > patch is OK. Adding options for a user's custom IP is questionable. This patch allows the user to use multiple instances of the same UART IP (AXI UART Lite v2.0) which is currently the only IP supported by the BSP. Alex ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 2/3] bsps/microblaze: Add support for multiple UARTs
On 30/3/2023 12:26 pm, Sam Price wrote: > Same IP as the regular KCU105. > The current uart ip is dependent on the fpga. > I don't believe this modifies the kcu105 bsp, but allows other bsps to > support up to 4 uarts. I am not sure if this patch is OK. If the UART driver is needed for a console does that limits how it's configuration can be handled? If so that means the patch is OK. Adding options for a user's custom IP is questionable. Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 2/3] bsps/microblaze: Add support for multiple UARTs
Same IP as the regular KCU105. The current uart ip is dependent on the fpga. I don't believe this modifies the kcu105 bsp, but allows other bsps to support up to 4 uarts. On Wed, Mar 29, 2023 at 5:21 PM Chris Johns wrote: > > On 30/3/2023 6:22 am, Alex White wrote: > > From: "Maldonado, Sergio E. (GSFC-580.0)" > .../microblaze/microblaze_fpga/optuartirq.yml | 20 ++ > > .../microblaze/microblaze_fpga/optuseuart.yml | 17 ++ > > .../microblaze_fpga/optuseuart1.yml | 17 ++ > > .../microblaze_fpga/optuseuart2.yml | 17 ++ > > .../microblaze_fpga/optuseuart3.yml | 17 ++ > > .../microblaze_fpga/optuseuart4.yml | 17 ++ > > Are these 4 UARTs dependent on the IP built into the FPGA with the Microblaze > core? > > Chris > ___ > devel mailing list > devel@rtems.org > http://lists.rtems.org/mailman/listinfo/devel -- Sincerely, Sam Price ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH 2/3] bsps/microblaze: Add support for multiple UARTs
On 30/3/2023 6:22 am, Alex White wrote: > From: "Maldonado, Sergio E. (GSFC-580.0)" .../microblaze/microblaze_fpga/optuartirq.yml | 20 ++ > .../microblaze/microblaze_fpga/optuseuart.yml | 17 ++ > .../microblaze_fpga/optuseuart1.yml | 17 ++ > .../microblaze_fpga/optuseuart2.yml | 17 ++ > .../microblaze_fpga/optuseuart3.yml | 17 ++ > .../microblaze_fpga/optuseuart4.yml | 17 ++ Are these 4 UARTs dependent on the IP built into the FPGA with the Microblaze core? Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH 2/3] bsps/microblaze: Add support for multiple UARTs
From: "Maldonado, Sergio E. (GSFC-580.0)"
---
bsps/microblaze/include/dev/serial/uartlite.h | 2 +
.../microblaze_fpga/console/console-io.c | 229 --
bsps/microblaze/shared/dev/serial/uartlite.c | 8 +-
.../bsps/microblaze/microblaze_fpga/grp.yml | 32 +++
.../bsps/microblaze/microblaze_fpga/obj.yml | 1 -
.../microblaze_fpga/optconsoleuart.yml| 21 ++
.../microblaze_fpga/optuart1irq.yml | 20 ++
.../optuart1litebaseaddress.yml | 20 ++
.../microblaze_fpga/optuart2irq.yml | 20 ++
.../optuart2litebaseaddress.yml | 20 ++
.../microblaze_fpga/optuart3irq.yml | 20 ++
.../optuart3litebaseaddress.yml | 20 ++
.../microblaze_fpga/optuart4irq.yml | 20 ++
.../optuart4litebaseaddress.yml | 20 ++
.../microblaze/microblaze_fpga/optuartirq.yml | 20 ++
.../microblaze/microblaze_fpga/optuseuart.yml | 17 ++
.../microblaze_fpga/optuseuart1.yml | 17 ++
.../microblaze_fpga/optuseuart2.yml | 17 ++
.../microblaze_fpga/optuseuart3.yml | 17 ++
.../microblaze_fpga/optuseuart4.yml | 17 ++
20 files changed, 534 insertions(+), 24 deletions(-)
create mode 100644
spec/build/bsps/microblaze/microblaze_fpga/optconsoleuart.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuart1irq.yml
create mode 100644
spec/build/bsps/microblaze/microblaze_fpga/optuart1litebaseaddress.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuart2irq.yml
create mode 100644
spec/build/bsps/microblaze/microblaze_fpga/optuart2litebaseaddress.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuart3irq.yml
create mode 100644
spec/build/bsps/microblaze/microblaze_fpga/optuart3litebaseaddress.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuart4irq.yml
create mode 100644
spec/build/bsps/microblaze/microblaze_fpga/optuart4litebaseaddress.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuartirq.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuseuart.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuseuart1.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuseuart2.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuseuart3.yml
create mode 100644 spec/build/bsps/microblaze/microblaze_fpga/optuseuart4.yml
diff --git a/bsps/microblaze/include/dev/serial/uartlite.h
b/bsps/microblaze/include/dev/serial/uartlite.h
index 2fda3796b3..009f416508 100644
--- a/bsps/microblaze/include/dev/serial/uartlite.h
+++ b/bsps/microblaze/include/dev/serial/uartlite.h
@@ -49,8 +49,10 @@ typedef struct {
rtems_termios_device_context base;
uintptr_t address;
uint32_t initial_baud;
+ uint32_t enabled;
#ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS
bool transmitting;
+ uint32_t irq;
#endif
} uart_lite_context;
diff --git a/bsps/microblaze/microblaze_fpga/console/console-io.c
b/bsps/microblaze/microblaze_fpga/console/console-io.c
index 81c4e73690..72c3a0c989 100644
--- a/bsps/microblaze/microblaze_fpga/console/console-io.c
+++ b/bsps/microblaze/microblaze_fpga/console/console-io.c
@@ -34,38 +34,235 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include
+#include
+
+#include
#include
-#include
+#include
+#include
#include
-#include
+#ifdef BSP_MICROBLAZE_FPGA_USE_FDT
+#include
+#include
+#endif
-uart_lite_context microblaze_qemu_uart_context = {
- .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "UARTLITE" ),
- .initial_baud = 115200
+#include
+
+static uart_lite_context uart_lite_instances[] = {
+ {
+.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "UARTLITE" ),
+.initial_baud = 115200,
+.address = BSP_MICROBLAZE_FPGA_UART_BASE,
+#if BSP_MICROBLAZE_FPGA_USE_UART
+.enabled = 1,
+#endif
+#ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS
+.irq = BSP_MICROBLAZE_FPGA_UART_IRQ
+#endif
+ },
+ {
+.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "UARTLITE UART1" ),
+.initial_baud = 115200,
+.address = BSP_MICROBLAZE_FPGA_UART1_BASE,
+#if BSP_MICROBLAZE_FPGA_USE_UART1
+.enabled = 1,
+#endif
+#ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS
+.irq = BSP_MICROBLAZE_FPGA_UART1_IRQ
+#endif
+ },
+ {
+.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "UARTLITE UART2" ),
+.initial_baud = 115200,
+.address = BSP_MICROBLAZE_FPGA_UART2_BASE,
+#if BSP_MICROBLAZE_FPGA_USE_UART2
+.enabled = 1,
+#endif
+#ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS
+.irq = BSP_MICROBLAZE_FPGA_UART2_IRQ
+#endif
+ },
+ {
+.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "UARTLITE UART3" ),
+.initial_baud = 115200,
+.address = BSP_MICROBLAZE_FPGA_UART3_BASE,
+#if BSP_MICROBLAZE_FPGA_USE_UART3
+.enabled = 1,
+#endif
+#ifdef BSP_MICROBLAZE_FPGA_CONSOLE_INTERRUPTS
+.irq = BSP_MICROBLAZE_FPGA_UART3_IRQ
+#endif
+ },
+ {
+.base
