Re: [PATCH 2/2] bsp/xen: Add xen_gicv3 target

2020-02-16 Thread Sebastian Huber

On 23/01/2020 17:04, Jeff Kubascik wrote:

diff --git a/bsps/arm/xen/include/bsp.h b/bsps/arm/xen/include/bsp.h
index e5b23a902e..13b7592f1e 100644
--- a/bsps/arm/xen/include/bsp.h
+++ b/bsps/arm/xen/include/bsp.h
@@ -58,11 +58,21 @@
  extern "C" {
  #endif /* __cplusplus */
  
+#if USE_IRQ_GICV2


It would be good if these defines have a proper prefix, e.g. BSP_ARM_XEN_*.

--
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
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Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
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[PATCH 2/2] bsp/xen: Add xen_gicv3 target

2020-01-23 Thread Jeff Kubascik
Implement the xen_gicv3 target that uses the GICv3 interrupt controller
driver. This is required for platforms where the underlying processor is
using GICv3 with no legacy operation support.
---
 bsps/arm/xen/config/xen_gicv3.cfg | 14 ++
 bsps/arm/xen/include/bsp.h| 10 ++
 bsps/arm/xen/start/bspstartmmu.c  | 14 ++
 c/src/lib/libbsp/arm/xen/Makefile.am  |  5 +
 c/src/lib/libbsp/arm/xen/configure.ac | 10 ++
 5 files changed, 53 insertions(+)
 create mode 100644 bsps/arm/xen/config/xen_gicv3.cfg

diff --git a/bsps/arm/xen/config/xen_gicv3.cfg 
b/bsps/arm/xen/config/xen_gicv3.cfg
new file mode 100644
index 00..d5ca72b43d
--- /dev/null
+++ b/bsps/arm/xen/config/xen_gicv3.cfg
@@ -0,0 +1,14 @@
+#
+#  Configuration file for the "xen_gicv3" target
+#
+
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = arm
+
+CPU_CFLAGS = -march=armv7-a -mthumb -mfpu=neon -mfloat-abi=hard
+
+CFLAGS_OPTIMIZE_V += -O2 -g
+CFLAGS_OPTIMIZE_V += -ffunction-sections -fdata-sections
+
+LDFLAGS = -Wl,--gc-sections
diff --git a/bsps/arm/xen/include/bsp.h b/bsps/arm/xen/include/bsp.h
index e5b23a902e..13b7592f1e 100644
--- a/bsps/arm/xen/include/bsp.h
+++ b/bsps/arm/xen/include/bsp.h
@@ -58,11 +58,21 @@
 extern "C" {
 #endif /* __cplusplus */
 
+#if USE_IRQ_GICV2
 #define BSP_ARM_GIC_CPUIF_BASE 0x03002000
 #define BSP_ARM_GIC_CPUIF_LENGTH 0x1000
 
 #define BSP_ARM_GIC_DIST_BASE 0x03001000
 #define BSP_ARM_GIC_DIST_LENGTH 0x1000
+#endif /* USE_IRQ_GICV2 */
+
+#if USE_IRQ_GICV3
+#define BSP_ARM_GIC_DIST_BASE 0x03001000
+#define BSP_ARM_GIC_DIST_LENGTH 0x1
+
+#define BSP_ARM_GIC_REDIST_BASE 0x0302
+#define BSP_ARM_GIC_REDIST_LENGTH 0x100
+#endif /* USE_IRQ_GICV3 */
 
 #define BSP_ARM_A9MPCORE_SCU_BASE 0
 
diff --git a/bsps/arm/xen/start/bspstartmmu.c b/bsps/arm/xen/start/bspstartmmu.c
index b24af89d41..6310c37ff1 100644
--- a/bsps/arm/xen/start/bspstartmmu.c
+++ b/bsps/arm/xen/start/bspstartmmu.c
@@ -36,6 +36,7 @@
 BSP_START_DATA_SECTION static const arm_cp15_start_section_config
 xen_bsp_mmu_config_table[] = {
   ARMV7_CP15_START_DEFAULT_SECTIONS,
+#if USE_IRQ_GICV2
   {
 .begin = BSP_ARM_GIC_DIST_BASE,
 .end = BSP_ARM_GIC_DIST_BASE + BSP_ARM_GIC_DIST_LENGTH,
@@ -44,7 +45,20 @@ xen_bsp_mmu_config_table[] = {
 .begin = BSP_ARM_GIC_CPUIF_BASE,
 .end = BSP_ARM_GIC_CPUIF_BASE + BSP_ARM_GIC_CPUIF_LENGTH,
 .flags = ARMV7_MMU_DEVICE
+  },
+#endif /* USE_IRQ_GICV2 */
+#if USE_IRQ_GICV3
+  {
+.begin = BSP_ARM_GIC_DIST_BASE,
+.end = BSP_ARM_GIC_DIST_BASE + BSP_ARM_GIC_DIST_LENGTH,
+.flags = ARMV7_MMU_DEVICE
   }, {
+.begin = BSP_ARM_GIC_REDIST_BASE,
+.end = BSP_ARM_GIC_REDIST_BASE + BSP_ARM_GIC_REDIST_LENGTH,
+.flags = ARMV7_MMU_DEVICE
+  },
+#endif /* USE_IRQ_GICV3 */
+  {
 .begin = BSP_XEN_VPL011_BASE,
 .end = BSP_XEN_VPL011_BASE + BSP_XEN_VPL011_LENGTH,
 .flags = ARMV7_MMU_DEVICE
diff --git a/c/src/lib/libbsp/arm/xen/Makefile.am 
b/c/src/lib/libbsp/arm/xen/Makefile.am
index fecb665af4..4db0b78649 100644
--- a/c/src/lib/libbsp/arm/xen/Makefile.am
+++ b/c/src/lib/libbsp/arm/xen/Makefile.am
@@ -34,7 +34,12 @@ librtemsbsp_a_SOURCES += 
../../../../../../bsps/arm/shared/clock/clock-generic-t
 librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-cp15.c
 # irq
 librtemsbsp_a_SOURCES += 
../../../../../../bsps/shared/irq/irq-default-handler.c
+if USE_IRQ_GICV2
 librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-gic.c
+endif
+if USE_IRQ_GICV3
+librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-gicv3.c
+endif
 # console
 librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xen/console/console.c
 librtemsbsp_a_SOURCES += 
../../../../../../bsps/shared/dev/serial/console-termios.c
diff --git a/c/src/lib/libbsp/arm/xen/configure.ac 
b/c/src/lib/libbsp/arm/xen/configure.ac
index 86ec0033ef..edeaba4e20 100644
--- a/c/src/lib/libbsp/arm/xen/configure.ac
+++ b/c/src/lib/libbsp/arm/xen/configure.ac
@@ -26,6 +26,16 @@ RTEMS_BSPOPTS_HELP([ARM_GENERIC_TIMER_USE_VIRTUAL],[use 
virtual ARM generic time
 RTEMS_BSPOPTS_SET([ARM_GENERIC_TIMER_UNMASK_AT_TICK],[*],[1])
 RTEMS_BSPOPTS_HELP([ARM_GENERIC_TIMER_UNMASK_AT_TICK],[unmask the timer in the 
tick handler, since Xen will mask the virtual timer before injecting the 
interrupt to the guest])
 
+RTEMS_BSPOPTS_SET([USE_IRQ_GICV2],[xen_gicv2],[1])
+RTEMS_BSPOPTS_SET([USE_IRQ_GICV2],[*],[0])
+RTEMS_BSPOPTS_HELP([USE_IRQ_GICV2],[use the GICv2 interrupt controller driver])
+AM_CONDITIONAL(USE_IRQ_GICV2,test "$USE_IRQ_GICV2" = "1")
+
+RTEMS_BSPOPTS_SET([USE_IRQ_GICV3],[xen_gicv3],[1])
+RTEMS_BSPOPTS_SET([USE_IRQ_GICV3],[*],[0])
+RTEMS_BSPOPTS_HELP([USE_IRQ_GICV3],[use the GICv3 interrupt controller driver])
+AM_CONDITIONAL(USE_IRQ_GICV3,test "$USE_IRQ_GICV3" = "1")
+
 RTEMS_BSPOPTS_SET([BSP_START_ZIMAGE_HEADER],[*],[1])
 RTEMS_BSPOPTS_HELP([BSP_START_ZIMAGE_HEADER],[include zImage boot header])
 
-- 
2.17.1