Re: [PATCH rtems-lwip] rtemslwip/xil_shims: Perform flush with invalidate

On 4/4/2023 10:23 pm, Kinsey Moore wrote: > On Mon, Apr 3, 2023 at 8:00 PM Chris Johns > wrote: > > On 31/3/2023 8:13 am, Kinsey Moore wrote: > > Xilinx wrote their A53 HAL with the assumption that the CPU did not > > support cache invalidation without a

Re: [PATCH rtems-lwip] rtemslwip/xil_shims: Perform flush with invalidate

On Mon, Apr 3, 2023 at 8:00 PM Chris Johns wrote: > On 31/3/2023 8:13 am, Kinsey Moore wrote: > > Xilinx wrote their A53 HAL with the assumption that the CPU did not > > support cache invalidation without a flush, so the flush and > > invalidation functions were combined and all range

Re: [PATCH rtems-lwip] rtemslwip/xil_shims: Perform flush with invalidate

On 31/3/2023 8:13 am, Kinsey Moore wrote: > Xilinx wrote their A53 HAL with the assumption that the CPU did not > support cache invalidation without a flush, so the flush and > invalidation functions were combined and all range invalidations are > promoted to flush/invalidate. The implementation

[PATCH rtems-lwip] rtemslwip/xil_shims: Perform flush with invalidate

Xilinx wrote their A53 HAL with the assumption that the CPU did not support cache invalidation without a flush, so the flush and invalidation functions were combined and all range invalidations are promoted to flush/invalidate. The implementation written for lwIP was written to the original intent