Re: [PATCH v2] zynqmp: Add support for the CFC-400X

2022-11-10 Thread Padmarao.Begari
Hi Kinsey,

> On Thu, 2022-11-10 at 07:55 -0600, Kinsey Moore wrote:
> 
> Hi Padmarao,
> More compatibles can be added later if necessary to both the device
> tree in RTEMS and the driver in RTEMS-LibBSD, but I don't see the
> need for either at the moment since the ethernet portion of the
> device tree is intended to be used with RTEMS-LibBSD directly. As far
> as the driver in 6-freebsd-12 is concerned, all compatibles are
> currently equivalent and it already supports "cdns,macb" if a BSP
> chooses to use that compatible. This may change when we upgrade to
> the FreeBSD 13 code since the driver has gained more advanced support
> for differentiating among compatibles and hardware quirks, but the
> list of supported compatibles will only expand.
> 

Ok, Makes sense to me.

Regards
Padmarao
> Kinsey
> 
> On Thu, Nov 10, 2022 at 6:50 AM 
> wrote:
> > Hi Kinsey,
> > 
> > The ethernet compatible "cdns,gem" is mentioned in the device tree,
> > even I used same for PolarFire SoC BSP but later realised that
> > common
> > compatible for the candence GEM is "cdns,macb" used in U-Boot and
> > Linux.
> > 
> > Can we go with compatible "cdns,gem"? or will we update with
> > "cdns,macb" later?  
> > 
> > Regards
> > Padmarao
> > > +   ethernet@ff0b {
> > > +   compatible = "cdns,gem";
> > > +   status = "okay";
> > > +   interrupt-parent = <0x01>;
> > > +   interrupts = <0x00 0x39 0x04>;
> > > +   reg = <0x00 0xff0b 0x00 0x1000>;
> > > +   phy-mode = "sgmii";
> > > +   };
> > 
> > 
> > > On Tue, 2022-11-08 at 15:56 -0600, Kinsey Moore wrote:
> > > 
> > > This adds a BSP variant for the ZynqMP BSP family to support the
> > > Innoflight CFC-400X platform. To properly support the CFC-400X,
> > > device
> > > trees were added to the ZynqMP platform due to both the optional
> > > management interface as well as alternate physical configuration
> > of
> > > the
> > > ethernet interfaces.
> > > ---
> > >  bsps/aarch64/xilinx-zynqmp/console/console.c  | 163
> > > +-
> > >  bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c  |  51 ++
> > >  bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts| 110 
> > >  bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c  | 124
> > +
> > >  bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts |  94 ++
> > >  bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c   |  97 +++
> > >  bsps/aarch64/xilinx-zynqmp/include/bsp.h  |  15 ++
> > >  .../aarch64/xilinx-zynqmp/start/bspstartmmu.c |   4 +
> > >  .../aarch64/xilinx-zynqmp/bspcfc400xlp64.yml  |  21 +++
> > >  .../aarch64/xilinx-zynqmp/bspqemuilp32.yml|   2 +
> > >  .../aarch64/xilinx-zynqmp/bspqemulp64.yml |   2 +
> > >  .../aarch64/xilinx-zynqmp/bspzu3egilp32.yml   |   2 +
> > >  .../aarch64/xilinx-zynqmp/bspzu3eglp64.yml|   2 +
> > >  spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml |   1 +
> > >  .../aarch64/xilinx-zynqmp/objfdtcfc400x.yml   |  14 ++
> > >  .../aarch64/xilinx-zynqmp/objfdtzynqmp.yml|  14 ++
> > >  .../bsps/aarch64/xilinx-zynqmp/optloadoff.yml |   1 +
> > >  .../bsps/aarch64/xilinx-zynqmp/optramori.yml  |   1 +
> > >  spec/build/cpukit/optsmp.yml  |   1 +
> > >  19 files changed, 718 insertions(+), 1 deletion(-)
> > >  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c
> > >  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts
> > >  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c
> > >  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts
> > >  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c
> > >  create mode 100644 spec/build/bsps/aarch64/xilinx-
> > > zynqmp/bspcfc400xlp64.yml
> > >  create mode 100644 spec/build/bsps/aarch64/xilinx-
> > > zynqmp/objfdtcfc400x.yml
> > >  create mode 100644 spec/build/bsps/aarch64/xilinx-
> > > zynqmp/objfdtzynqmp.yml
> > > 
> > > diff --git a/bsps/aarch64/xilinx-zynqmp/console/console.c
> > > b/bsps/aarch64/xilinx-zynqmp/console/console.c
> > > index d1948f1a0c..d546db8535 100644
> > > --- a/bsps/aarch64/xilinx-zynqmp/console/console.c
> > > +++ b/bsps/aarch64/xilinx-zynqmp/console/console.c
> > > @@ -9,7 +9,7 @@
> > >   */
> > > 
> > >  /*
> > > - * Copyright (C) 2020 On-Line Applications Research Corporation
> > > (OAR)
> > > + * Copyright (C) 2022 On-Line Applications Research Corporation
> > > (OAR)
> > >   * Written by Kinsey Moore 
> > >   *
> > >   * Redistribution and use in source and binary forms, with or
> > > without
> > > @@ -36,13 +36,165 @@
> > > 
> > >  #include 
> > >  #include 
> > > +#include 
> > > +#include 
> > >  #include 
> > > 
> > > +#include 
> > > +#include 
> > >  #include 
> > > +
> > >  #include 
> > > 
> > >  #include 
> > > 
> > > +#include 
> > > +
> > > +uint32_t mgmt_uart_reg_shift = 0;
> > > +static uint8_t get_register(uintptr_t addr, uint8_t i)
> > > +{
> > > +  volatile uint8_t *reg 

Re: [PATCH v2] zynqmp: Add support for the CFC-400X

2022-11-10 Thread Kinsey Moore
Hi Padmarao,
More compatibles can be added later if necessary to both the device tree in
RTEMS and the driver in RTEMS-LibBSD, but I don't see the need for either
at the moment since the ethernet portion of the device tree is intended to
be used with RTEMS-LibBSD directly. As far as the driver in 6-freebsd-12 is
concerned, all compatibles are currently equivalent and it already supports
"cdns,macb" if a BSP chooses to use that compatible. This may change when
we upgrade to the FreeBSD 13 code since the driver has gained more advanced
support for differentiating among compatibles and hardware quirks, but the
list of supported compatibles will only expand.

Kinsey

On Thu, Nov 10, 2022 at 6:50 AM  wrote:

> Hi Kinsey,
>
> The ethernet compatible "cdns,gem" is mentioned in the device tree,
> even I used same for PolarFire SoC BSP but later realised that common
> compatible for the candence GEM is "cdns,macb" used in U-Boot and
> Linux.
>
> Can we go with compatible "cdns,gem"? or will we update with
> "cdns,macb" later?
>
> Regards
> Padmarao
> > +   ethernet@ff0b {
> > +   compatible = "cdns,gem";
> > +   status = "okay";
> > +   interrupt-parent = <0x01>;
> > +   interrupts = <0x00 0x39 0x04>;
> > +   reg = <0x00 0xff0b 0x00 0x1000>;
> > +   phy-mode = "sgmii";
> > +   };
>
>
> > On Tue, 2022-11-08 at 15:56 -0600, Kinsey Moore wrote:
> >
> > This adds a BSP variant for the ZynqMP BSP family to support the
> > Innoflight CFC-400X platform. To properly support the CFC-400X,
> > device
> > trees were added to the ZynqMP platform due to both the optional
> > management interface as well as alternate physical configuration of
> > the
> > ethernet interfaces.
> > ---
> >  bsps/aarch64/xilinx-zynqmp/console/console.c  | 163
> > +-
> >  bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c  |  51 ++
> >  bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts| 110 
> >  bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c  | 124 +
> >  bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts |  94 ++
> >  bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c   |  97 +++
> >  bsps/aarch64/xilinx-zynqmp/include/bsp.h  |  15 ++
> >  .../aarch64/xilinx-zynqmp/start/bspstartmmu.c |   4 +
> >  .../aarch64/xilinx-zynqmp/bspcfc400xlp64.yml  |  21 +++
> >  .../aarch64/xilinx-zynqmp/bspqemuilp32.yml|   2 +
> >  .../aarch64/xilinx-zynqmp/bspqemulp64.yml |   2 +
> >  .../aarch64/xilinx-zynqmp/bspzu3egilp32.yml   |   2 +
> >  .../aarch64/xilinx-zynqmp/bspzu3eglp64.yml|   2 +
> >  spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml |   1 +
> >  .../aarch64/xilinx-zynqmp/objfdtcfc400x.yml   |  14 ++
> >  .../aarch64/xilinx-zynqmp/objfdtzynqmp.yml|  14 ++
> >  .../bsps/aarch64/xilinx-zynqmp/optloadoff.yml |   1 +
> >  .../bsps/aarch64/xilinx-zynqmp/optramori.yml  |   1 +
> >  spec/build/cpukit/optsmp.yml  |   1 +
> >  19 files changed, 718 insertions(+), 1 deletion(-)
> >  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c
> >  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts
> >  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c
> >  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts
> >  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c
> >  create mode 100644 spec/build/bsps/aarch64/xilinx-
> > zynqmp/bspcfc400xlp64.yml
> >  create mode 100644 spec/build/bsps/aarch64/xilinx-
> > zynqmp/objfdtcfc400x.yml
> >  create mode 100644 spec/build/bsps/aarch64/xilinx-
> > zynqmp/objfdtzynqmp.yml
> >
> > diff --git a/bsps/aarch64/xilinx-zynqmp/console/console.c
> > b/bsps/aarch64/xilinx-zynqmp/console/console.c
> > index d1948f1a0c..d546db8535 100644
> > --- a/bsps/aarch64/xilinx-zynqmp/console/console.c
> > +++ b/bsps/aarch64/xilinx-zynqmp/console/console.c
> > @@ -9,7 +9,7 @@
> >   */
> >
> >  /*
> > - * Copyright (C) 2020 On-Line Applications Research Corporation
> > (OAR)
> > + * Copyright (C) 2022 On-Line Applications Research Corporation
> > (OAR)
> >   * Written by Kinsey Moore 
> >   *
> >   * Redistribution and use in source and binary forms, with or
> > without
> > @@ -36,13 +36,165 @@
> >
> >  #include 
> >  #include 
> > +#include 
> > +#include 
> >  #include 
> >
> > +#include 
> > +#include 
> >  #include 
> > +
> >  #include 
> >
> >  #include 
> >
> > +#include 
> > +
> > +uint32_t mgmt_uart_reg_shift = 0;
> > +static uint8_t get_register(uintptr_t addr, uint8_t i)
> > +{
> > +  volatile uint8_t *reg = (uint8_t *) addr;
> > +
> > +  i <<= mgmt_uart_reg_shift;
> > +  return reg [i];
> > +}
> > +
> > +static void set_register(uintptr_t addr, uint8_t i, uint8_t val)
> > +{
> > +  volatile uint8_t *reg = (uint8_t *) addr;
> > +
> > +  i <<= mgmt_uart_reg_shift;
> > +  reg [i] = val;
> > +}
> > +
> > +static ns16550_context zynqmp_mgmt_uart_context = {
> > +  .base = 

Re: [PATCH v2] zynqmp: Add support for the CFC-400X

2022-11-10 Thread Padmarao.Begari
Hi Kinsey,

The ethernet compatible "cdns,gem" is mentioned in the device tree,
even I used same for PolarFire SoC BSP but later realised that common
compatible for the candence GEM is "cdns,macb" used in U-Boot and
Linux.

Can we go with compatible "cdns,gem"? or will we update with
"cdns,macb" later?  

Regards
Padmarao
> +   ethernet@ff0b {
> +   compatible = "cdns,gem";
> +   status = "okay";
> +   interrupt-parent = <0x01>;
> +   interrupts = <0x00 0x39 0x04>;
> +   reg = <0x00 0xff0b 0x00 0x1000>;
> +   phy-mode = "sgmii";
> +   };


> On Tue, 2022-11-08 at 15:56 -0600, Kinsey Moore wrote:
> 
> This adds a BSP variant for the ZynqMP BSP family to support the
> Innoflight CFC-400X platform. To properly support the CFC-400X,
> device
> trees were added to the ZynqMP platform due to both the optional
> management interface as well as alternate physical configuration of
> the
> ethernet interfaces.
> ---
>  bsps/aarch64/xilinx-zynqmp/console/console.c  | 163
> +-
>  bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c  |  51 ++
>  bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts| 110 
>  bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c  | 124 +
>  bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts |  94 ++
>  bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c   |  97 +++
>  bsps/aarch64/xilinx-zynqmp/include/bsp.h  |  15 ++
>  .../aarch64/xilinx-zynqmp/start/bspstartmmu.c |   4 +
>  .../aarch64/xilinx-zynqmp/bspcfc400xlp64.yml  |  21 +++
>  .../aarch64/xilinx-zynqmp/bspqemuilp32.yml|   2 +
>  .../aarch64/xilinx-zynqmp/bspqemulp64.yml |   2 +
>  .../aarch64/xilinx-zynqmp/bspzu3egilp32.yml   |   2 +
>  .../aarch64/xilinx-zynqmp/bspzu3eglp64.yml|   2 +
>  spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml |   1 +
>  .../aarch64/xilinx-zynqmp/objfdtcfc400x.yml   |  14 ++
>  .../aarch64/xilinx-zynqmp/objfdtzynqmp.yml|  14 ++
>  .../bsps/aarch64/xilinx-zynqmp/optloadoff.yml |   1 +
>  .../bsps/aarch64/xilinx-zynqmp/optramori.yml  |   1 +
>  spec/build/cpukit/optsmp.yml  |   1 +
>  19 files changed, 718 insertions(+), 1 deletion(-)
>  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c
>  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts
>  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c
>  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts
>  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c
>  create mode 100644 spec/build/bsps/aarch64/xilinx-
> zynqmp/bspcfc400xlp64.yml
>  create mode 100644 spec/build/bsps/aarch64/xilinx-
> zynqmp/objfdtcfc400x.yml
>  create mode 100644 spec/build/bsps/aarch64/xilinx-
> zynqmp/objfdtzynqmp.yml
> 
> diff --git a/bsps/aarch64/xilinx-zynqmp/console/console.c
> b/bsps/aarch64/xilinx-zynqmp/console/console.c
> index d1948f1a0c..d546db8535 100644
> --- a/bsps/aarch64/xilinx-zynqmp/console/console.c
> +++ b/bsps/aarch64/xilinx-zynqmp/console/console.c
> @@ -9,7 +9,7 @@
>   */
> 
>  /*
> - * Copyright (C) 2020 On-Line Applications Research Corporation
> (OAR)
> + * Copyright (C) 2022 On-Line Applications Research Corporation
> (OAR)
>   * Written by Kinsey Moore 
>   *
>   * Redistribution and use in source and binary forms, with or
> without
> @@ -36,13 +36,165 @@
> 
>  #include 
>  #include 
> +#include 
> +#include 
>  #include 
> 
> +#include 
> +#include 
>  #include 
> +
>  #include 
> 
>  #include 
> 
> +#include 
> +
> +uint32_t mgmt_uart_reg_shift = 0;
> +static uint8_t get_register(uintptr_t addr, uint8_t i)
> +{
> +  volatile uint8_t *reg = (uint8_t *) addr;
> +
> +  i <<= mgmt_uart_reg_shift;
> +  return reg [i];
> +}
> +
> +static void set_register(uintptr_t addr, uint8_t i, uint8_t val)
> +{
> +  volatile uint8_t *reg = (uint8_t *) addr;
> +
> +  i <<= mgmt_uart_reg_shift;
> +  reg [i] = val;
> +}
> +
> +static ns16550_context zynqmp_mgmt_uart_context = {
> +  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("Management UART
> 0"),
> +  .get_reg = get_register,
> +  .set_reg = set_register,
> +  .port = 0,
> +  .irq = 0,
> +  .clock = 0,
> +  .initial_baud = 0,
> +};
> +
> +__attribute__ ((weak)) void
> zynqmp_configure_management_console(rtems_termios_device_context
> *base)
> +{
> +  /* This SLIP-encoded watchdog command sets timeouts to 0x
> seconds. */
> +  const char mgmt_watchdog_cmd[] =
> +"\xc0\xda\x00\x00\xff\xff\xff\xff\xff\x00\xff\xff\xff\xffM#\xc0"
> ;
> +
> +  /* Send the system watchdog configuration command */
> +  for (int i = 0; i < sizeof(mgmt_watchdog_cmd); i++) {
> +ns16550_polled_putchar(base, mgmt_watchdog_cmd[i]);
> +  }
> +}
> +
> +static void zynqmp_management_console_init(void)
> +{
> +  /* Find the management console in the device tree */
> +  rtems_fdt_handle fdt_handle;
> +  const uint32_t *prop;
> +  uint32_t outprop[4];
> +  int proplen;
> +  int 

Re: [PATCH v2] zynqmp: Add support for the CFC-400X

2022-11-08 Thread Chris Johns

Looks good and thank you for sorting out this approach.

Thanks
Chris

On 9/11/2022 8:56 am, Kinsey Moore wrote:

This adds a BSP variant for the ZynqMP BSP family to support the
Innoflight CFC-400X platform. To properly support the CFC-400X, device
trees were added to the ZynqMP platform due to both the optional
management interface as well as alternate physical configuration of the
ethernet interfaces.
---
  bsps/aarch64/xilinx-zynqmp/console/console.c  | 163 +-
  bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c  |  51 ++
  bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts| 110 
  bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c  | 124 +
  bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts |  94 ++
  bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c   |  97 +++
  bsps/aarch64/xilinx-zynqmp/include/bsp.h  |  15 ++
  .../aarch64/xilinx-zynqmp/start/bspstartmmu.c |   4 +
  .../aarch64/xilinx-zynqmp/bspcfc400xlp64.yml  |  21 +++
  .../aarch64/xilinx-zynqmp/bspqemuilp32.yml|   2 +
  .../aarch64/xilinx-zynqmp/bspqemulp64.yml |   2 +
  .../aarch64/xilinx-zynqmp/bspzu3egilp32.yml   |   2 +
  .../aarch64/xilinx-zynqmp/bspzu3eglp64.yml|   2 +
  spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml |   1 +
  .../aarch64/xilinx-zynqmp/objfdtcfc400x.yml   |  14 ++
  .../aarch64/xilinx-zynqmp/objfdtzynqmp.yml|  14 ++
  .../bsps/aarch64/xilinx-zynqmp/optloadoff.yml |   1 +
  .../bsps/aarch64/xilinx-zynqmp/optramori.yml  |   1 +
  spec/build/cpukit/optsmp.yml  |   1 +
  19 files changed, 718 insertions(+), 1 deletion(-)
  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c
  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts
  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c
  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts
  create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c
  create mode 100644 spec/build/bsps/aarch64/xilinx-zynqmp/bspcfc400xlp64.yml
  create mode 100644 spec/build/bsps/aarch64/xilinx-zynqmp/objfdtcfc400x.yml
  create mode 100644 spec/build/bsps/aarch64/xilinx-zynqmp/objfdtzynqmp.yml

diff --git a/bsps/aarch64/xilinx-zynqmp/console/console.c 
b/bsps/aarch64/xilinx-zynqmp/console/console.c
index d1948f1a0c..d546db8535 100644
--- a/bsps/aarch64/xilinx-zynqmp/console/console.c
+++ b/bsps/aarch64/xilinx-zynqmp/console/console.c
@@ -9,7 +9,7 @@
   */
  
  /*

- * Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
   * Written by Kinsey Moore 
   *
   * Redistribution and use in source and binary forms, with or without
@@ -36,13 +36,165 @@
  
  #include 

  #include 
+#include 
+#include 
  #include 
  
+#include 

+#include 
  #include 
+
  #include 
  
  #include 
  
+#include 

+
+uint32_t mgmt_uart_reg_shift = 0;
+static uint8_t get_register(uintptr_t addr, uint8_t i)
+{
+  volatile uint8_t *reg = (uint8_t *) addr;
+
+  i <<= mgmt_uart_reg_shift;
+  return reg [i];
+}
+
+static void set_register(uintptr_t addr, uint8_t i, uint8_t val)
+{
+  volatile uint8_t *reg = (uint8_t *) addr;
+
+  i <<= mgmt_uart_reg_shift;
+  reg [i] = val;
+}
+
+static ns16550_context zynqmp_mgmt_uart_context = {
+  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("Management UART 0"),
+  .get_reg = get_register,
+  .set_reg = set_register,
+  .port = 0,
+  .irq = 0,
+  .clock = 0,
+  .initial_baud = 0,
+};
+
+__attribute__ ((weak)) void 
zynqmp_configure_management_console(rtems_termios_device_context *base)
+{
+  /* This SLIP-encoded watchdog command sets timeouts to 0x seconds. */
+  const char mgmt_watchdog_cmd[] =
+"\xc0\xda\x00\x00\xff\xff\xff\xff\xff\x00\xff\xff\xff\xffM#\xc0";
+
+  /* Send the system watchdog configuration command */
+  for (int i = 0; i < sizeof(mgmt_watchdog_cmd); i++) {
+ns16550_polled_putchar(base, mgmt_watchdog_cmd[i]);
+  }
+}
+
+static void zynqmp_management_console_init(void)
+{
+  /* Find the management console in the device tree */
+  rtems_fdt_handle fdt_handle;
+  const uint32_t *prop;
+  uint32_t outprop[4];
+  int proplen;
+  int node;
+
+  rtems_fdt_init_handle(_handle);
+  rtems_fdt_register(bsp_fdt_get(), _handle);
+  const char *alias = rtems_fdt_get_alias(_handle, "mgmtport");
+  if (alias == NULL) {
+rtems_fdt_release_handle(_handle);
+return;
+  }
+  node = rtems_fdt_path_offset(_handle, alias);
+
+  prop = rtems_fdt_getprop(_handle, node, "clock-frequency", );
+  if ( prop == NULL || proplen != 4 ) {
+rtems_fdt_release_handle(_handle);
+zynqmp_mgmt_uart_context.port = 0;
+return;
+  }
+  outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) [0]);
+  zynqmp_mgmt_uart_context.clock = outprop[0];
+
+  prop = rtems_fdt_getprop(_handle, node, "current-speed", );
+  if ( prop == NULL || proplen != 4 ) {
+rtems_fdt_release_handle(_handle);
+zynqmp_mgmt_uart_context.port = 0;
+return;
+  }
+  outprop[0] = 

[PATCH v2] zynqmp: Add support for the CFC-400X

2022-11-08 Thread Kinsey Moore
This adds a BSP variant for the ZynqMP BSP family to support the
Innoflight CFC-400X platform. To properly support the CFC-400X, device
trees were added to the ZynqMP platform due to both the optional
management interface as well as alternate physical configuration of the
ethernet interfaces.
---
 bsps/aarch64/xilinx-zynqmp/console/console.c  | 163 +-
 bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c  |  51 ++
 bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts| 110 
 bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c  | 124 +
 bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts |  94 ++
 bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c   |  97 +++
 bsps/aarch64/xilinx-zynqmp/include/bsp.h  |  15 ++
 .../aarch64/xilinx-zynqmp/start/bspstartmmu.c |   4 +
 .../aarch64/xilinx-zynqmp/bspcfc400xlp64.yml  |  21 +++
 .../aarch64/xilinx-zynqmp/bspqemuilp32.yml|   2 +
 .../aarch64/xilinx-zynqmp/bspqemulp64.yml |   2 +
 .../aarch64/xilinx-zynqmp/bspzu3egilp32.yml   |   2 +
 .../aarch64/xilinx-zynqmp/bspzu3eglp64.yml|   2 +
 spec/build/bsps/aarch64/xilinx-zynqmp/obj.yml |   1 +
 .../aarch64/xilinx-zynqmp/objfdtcfc400x.yml   |  14 ++
 .../aarch64/xilinx-zynqmp/objfdtzynqmp.yml|  14 ++
 .../bsps/aarch64/xilinx-zynqmp/optloadoff.yml |   1 +
 .../bsps/aarch64/xilinx-zynqmp/optramori.yml  |   1 +
 spec/build/cpukit/optsmp.yml  |   1 +
 19 files changed, 718 insertions(+), 1 deletion(-)
 create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/bsp_fdt.c
 create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/cfc400x.dts
 create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/cfc400x_dtb.c
 create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/zynqmp.dts
 create mode 100644 bsps/aarch64/xilinx-zynqmp/fdt/zynqmp_dtb.c
 create mode 100644 spec/build/bsps/aarch64/xilinx-zynqmp/bspcfc400xlp64.yml
 create mode 100644 spec/build/bsps/aarch64/xilinx-zynqmp/objfdtcfc400x.yml
 create mode 100644 spec/build/bsps/aarch64/xilinx-zynqmp/objfdtzynqmp.yml

diff --git a/bsps/aarch64/xilinx-zynqmp/console/console.c 
b/bsps/aarch64/xilinx-zynqmp/console/console.c
index d1948f1a0c..d546db8535 100644
--- a/bsps/aarch64/xilinx-zynqmp/console/console.c
+++ b/bsps/aarch64/xilinx-zynqmp/console/console.c
@@ -9,7 +9,7 @@
  */
 
 /*
- * Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
+ * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
  * Written by Kinsey Moore 
  *
  * Redistribution and use in source and binary forms, with or without
@@ -36,13 +36,165 @@
 
 #include 
 #include 
+#include 
+#include 
 #include 
 
+#include 
+#include 
 #include 
+
 #include 
 
 #include 
 
+#include 
+
+uint32_t mgmt_uart_reg_shift = 0;
+static uint8_t get_register(uintptr_t addr, uint8_t i)
+{
+  volatile uint8_t *reg = (uint8_t *) addr;
+
+  i <<= mgmt_uart_reg_shift;
+  return reg [i];
+}
+
+static void set_register(uintptr_t addr, uint8_t i, uint8_t val)
+{
+  volatile uint8_t *reg = (uint8_t *) addr;
+
+  i <<= mgmt_uart_reg_shift;
+  reg [i] = val;
+}
+
+static ns16550_context zynqmp_mgmt_uart_context = {
+  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("Management UART 0"),
+  .get_reg = get_register,
+  .set_reg = set_register,
+  .port = 0,
+  .irq = 0,
+  .clock = 0,
+  .initial_baud = 0,
+};
+
+__attribute__ ((weak)) void 
zynqmp_configure_management_console(rtems_termios_device_context *base)
+{
+  /* This SLIP-encoded watchdog command sets timeouts to 0x seconds. */
+  const char mgmt_watchdog_cmd[] =
+"\xc0\xda\x00\x00\xff\xff\xff\xff\xff\x00\xff\xff\xff\xffM#\xc0";
+
+  /* Send the system watchdog configuration command */
+  for (int i = 0; i < sizeof(mgmt_watchdog_cmd); i++) {
+ns16550_polled_putchar(base, mgmt_watchdog_cmd[i]);
+  }
+}
+
+static void zynqmp_management_console_init(void)
+{
+  /* Find the management console in the device tree */
+  rtems_fdt_handle fdt_handle;
+  const uint32_t *prop;
+  uint32_t outprop[4];
+  int proplen;
+  int node;
+
+  rtems_fdt_init_handle(_handle);
+  rtems_fdt_register(bsp_fdt_get(), _handle);
+  const char *alias = rtems_fdt_get_alias(_handle, "mgmtport");
+  if (alias == NULL) {
+rtems_fdt_release_handle(_handle);
+return;
+  }
+  node = rtems_fdt_path_offset(_handle, alias);
+
+  prop = rtems_fdt_getprop(_handle, node, "clock-frequency", );
+  if ( prop == NULL || proplen != 4 ) {
+rtems_fdt_release_handle(_handle);
+zynqmp_mgmt_uart_context.port = 0;
+return;
+  }
+  outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) [0]);
+  zynqmp_mgmt_uart_context.clock = outprop[0];
+
+  prop = rtems_fdt_getprop(_handle, node, "current-speed", );
+  if ( prop == NULL || proplen != 4 ) {
+rtems_fdt_release_handle(_handle);
+zynqmp_mgmt_uart_context.port = 0;
+return;
+  }
+  outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) [0]);
+  zynqmp_mgmt_uart_context.initial_baud = outprop[0];
+
+  prop = rtems_fdt_getprop(_handle, node, "interrupts", );
+  if ( prop ==