Re: [PATCH v2 06/13] score: Add CPU_THREAD_LOCAL_STORAGE_VARIANT
On 7/10/2022 3:33 pm, Sebastian Huber wrote: > On 07.10.22 06:31, Chris Johns wrote: >> On 7/10/2022 3:23 pm, Sebastian Huber wrote: >>> On 07.10.22 05:44, Chris Johns wrote: On 6/10/2022 7:23 pm, Sebastian Huber wrote: > +#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 10 > + tls_data = (void *) > + RTEMS_ALIGN_UP( (uintptr_t) tls_area + sizeof( *tcb ), alignment ); > + tcb = (TLS_Thread_control_block *) ((char *) tls_data - sizeof( *tcb > )); > + return_value = tls_data; > +#elif CPU_THREAD_LOCAL_STORAGE_VARIANT == 11 > + tcb_size = RTEMS_ALIGN_UP( sizeof( *tcb ), alignment ); > + tls_data = (void *) > + RTEMS_ALIGN_UP( (uintptr_t) tls_area + tcb_size, alignment ); > + tcb = (TLS_Thread_control_block *) ((char *) tls_data - tcb_size); > + return_value = tcb; > +#elif CPU_THREAD_LOCAL_STORAGE_VARIANT == 20 > + alignment_2 = RTEMS_ALIGN_UP( alignment, CPU_SIZEOF_POINTER ); > + tls_area = (void *) RTEMS_ALIGN_UP( (uintptr_t) tls_area, alignment_2 > ); > + size = _TLS_Get_size(); > + tcb = (TLS_Thread_control_block *) > + ((char *) tls_area + RTEMS_ALIGN_UP( size, alignment_2 )); > + tls_data = (char *) tcb - RTEMS_ALIGN_UP( size, alignment ); > + return_value = tcb; > +#else > +#error "unexpected CPU_THREAD_LOCAL_STORAGE_VARIANT value" What are the expected values? I can see 10, 11, 20. Can this please be changed to something readable? For example: #if CPU_THREAD_LOCAL_STORAGE_VARIANT == CPU_THREAD_LOCAL_STORAGE_BLAH #elif CPU_THREAD_LOCAL_STORAGE_VARIANT == CPU_THREAD_LOCAL_STORAGE_BLAH_BLAH >>> >>> This is documented in the no_cpu/cpuimpl.h. I think the numbers are all >>> right if >>> you know the TLS variants. Otherwise we would have to add an extra header >>> file >>> just for the CPU_THREAD_LOCAL_STORAGE_* defines. >> >> Is the doco in this patch? I could not find it. > > Yes, all the CPU port options are documented in the no_cpu port: > > diff --git a/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h > b/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h > index d5082383e8..72d223de24 100644 > --- a/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h > +++ b/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h > @@ -54,6 +54,24 @@ > */ > #define CPU_PER_CPU_CONTROL_SIZE 0 > > +/** > + * @brief Defines the thread-local storage (TLS) variant. > + * > + * Use one of the following values: > + * > + * 10: The architecture uses Variant I and the TLS offsets emitted by the > + * linker neglect the TCB (examples: nios2, m68k, microblaze, powerpc, > + * riscv). The thread pointer directly references the thread-local data > + * area. > + * > + * 11: The architecture uses Variant I and the TLS offsets emitted by the > + * linker take the TCB into account (examples: arm, aarch64). > + * The thread pointer references the TCB. > + * > + * 20: The architecture uses Variant II (examples: i386, sparc). > + */ > +#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10 > + > #ifndef ASM > > #ifdef __cplusplus Thanks. The number now make sense to me. Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH v2 06/13] score: Add CPU_THREAD_LOCAL_STORAGE_VARIANT
On 07.10.22 06:31, Chris Johns wrote: On 7/10/2022 3:23 pm, Sebastian Huber wrote: On 07.10.22 05:44, Chris Johns wrote: On 6/10/2022 7:23 pm, Sebastian Huber wrote: +#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 10 + tls_data = (void *) + RTEMS_ALIGN_UP( (uintptr_t) tls_area + sizeof( *tcb ), alignment ); + tcb = (TLS_Thread_control_block *) ((char *) tls_data - sizeof( *tcb )); + return_value = tls_data; +#elif CPU_THREAD_LOCAL_STORAGE_VARIANT == 11 + tcb_size = RTEMS_ALIGN_UP( sizeof( *tcb ), alignment ); + tls_data = (void *) + RTEMS_ALIGN_UP( (uintptr_t) tls_area + tcb_size, alignment ); + tcb = (TLS_Thread_control_block *) ((char *) tls_data - tcb_size); + return_value = tcb; +#elif CPU_THREAD_LOCAL_STORAGE_VARIANT == 20 + alignment_2 = RTEMS_ALIGN_UP( alignment, CPU_SIZEOF_POINTER ); + tls_area = (void *) RTEMS_ALIGN_UP( (uintptr_t) tls_area, alignment_2 ); + size = _TLS_Get_size(); + tcb = (TLS_Thread_control_block *) + ((char *) tls_area + RTEMS_ALIGN_UP( size, alignment_2 )); + tls_data = (char *) tcb - RTEMS_ALIGN_UP( size, alignment ); + return_value = tcb; +#else +#error "unexpected CPU_THREAD_LOCAL_STORAGE_VARIANT value" What are the expected values? I can see 10, 11, 20. Can this please be changed to something readable? For example: #if CPU_THREAD_LOCAL_STORAGE_VARIANT == CPU_THREAD_LOCAL_STORAGE_BLAH #elif CPU_THREAD_LOCAL_STORAGE_VARIANT == CPU_THREAD_LOCAL_STORAGE_BLAH_BLAH This is documented in the no_cpu/cpuimpl.h. I think the numbers are all right if you know the TLS variants. Otherwise we would have to add an extra header file just for the CPU_THREAD_LOCAL_STORAGE_* defines. Is the doco in this patch? I could not find it. Yes, all the CPU port options are documented in the no_cpu port: diff --git a/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h index d5082383e8..72d223de24 100644 --- a/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h @@ -54,6 +54,24 @@ */ #define CPU_PER_CPU_CONTROL_SIZE 0 +/** + * @brief Defines the thread-local storage (TLS) variant. + * + * Use one of the following values: + * + * 10: The architecture uses Variant I and the TLS offsets emitted by the + * linker neglect the TCB (examples: nios2, m68k, microblaze, powerpc, + * riscv). The thread pointer directly references the thread-local data + * area. + * + * 11: The architecture uses Variant I and the TLS offsets emitted by the + * linker take the TCB into account (examples: arm, aarch64). + * The thread pointer references the TCB. + * + * 20: The architecture uses Variant II (examples: i386, sparc). + */ +#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10 + #ifndef ASM #ifdef __cplusplus -- embedded brains GmbH Herr Sebastian HUBER Dornierstr. 4 82178 Puchheim Germany email: sebastian.hu...@embedded-brains.de phone: +49-89-18 94 741 - 16 fax: +49-89-18 94 741 - 08 Registergericht: Amtsgericht München Registernummer: HRB 157899 Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler Unsere Datenschutzerklärung finden Sie hier: https://embedded-brains.de/datenschutzerklaerung/ ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH v2 06/13] score: Add CPU_THREAD_LOCAL_STORAGE_VARIANT
On 7/10/2022 3:23 pm, Sebastian Huber wrote: > On 07.10.22 05:44, Chris Johns wrote: >> On 6/10/2022 7:23 pm, Sebastian Huber wrote: >>> +#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 10 >>> + tls_data = (void *) >>> + RTEMS_ALIGN_UP( (uintptr_t) tls_area + sizeof( *tcb ), alignment ); >>> + tcb = (TLS_Thread_control_block *) ((char *) tls_data - sizeof( *tcb )); >>> + return_value = tls_data; >>> +#elif CPU_THREAD_LOCAL_STORAGE_VARIANT == 11 >>> + tcb_size = RTEMS_ALIGN_UP( sizeof( *tcb ), alignment ); >>> + tls_data = (void *) >>> + RTEMS_ALIGN_UP( (uintptr_t) tls_area + tcb_size, alignment ); >>> + tcb = (TLS_Thread_control_block *) ((char *) tls_data - tcb_size); >>> + return_value = tcb; >>> +#elif CPU_THREAD_LOCAL_STORAGE_VARIANT == 20 >>> + alignment_2 = RTEMS_ALIGN_UP( alignment, CPU_SIZEOF_POINTER ); >>> + tls_area = (void *) RTEMS_ALIGN_UP( (uintptr_t) tls_area, alignment_2 ); >>> + size = _TLS_Get_size(); >>> + tcb = (TLS_Thread_control_block *) >>> + ((char *) tls_area + RTEMS_ALIGN_UP( size, alignment_2 )); >>> + tls_data = (char *) tcb - RTEMS_ALIGN_UP( size, alignment ); >>> + return_value = tcb; >>> +#else >>> +#error "unexpected CPU_THREAD_LOCAL_STORAGE_VARIANT value" >> What are the expected values? I can see 10, 11, 20. >> >> Can this please be changed to something readable? For example: >> >> #if CPU_THREAD_LOCAL_STORAGE_VARIANT == CPU_THREAD_LOCAL_STORAGE_BLAH >> >> #elif CPU_THREAD_LOCAL_STORAGE_VARIANT == CPU_THREAD_LOCAL_STORAGE_BLAH_BLAH > > This is documented in the no_cpu/cpuimpl.h. I think the numbers are all right > if > you know the TLS variants. Otherwise we would have to add an extra header file > just for the CPU_THREAD_LOCAL_STORAGE_* defines. Is the doco in this patch? I could not find it. Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH v2 06/13] score: Add CPU_THREAD_LOCAL_STORAGE_VARIANT
On 07.10.22 05:44, Chris Johns wrote: On 6/10/2022 7:23 pm, Sebastian Huber wrote: +#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 10 + tls_data = (void *) +RTEMS_ALIGN_UP( (uintptr_t) tls_area + sizeof( *tcb ), alignment ); + tcb = (TLS_Thread_control_block *) ((char *) tls_data - sizeof( *tcb )); + return_value = tls_data; +#elif CPU_THREAD_LOCAL_STORAGE_VARIANT == 11 + tcb_size = RTEMS_ALIGN_UP( sizeof( *tcb ), alignment ); + tls_data = (void *) +RTEMS_ALIGN_UP( (uintptr_t) tls_area + tcb_size, alignment ); + tcb = (TLS_Thread_control_block *) ((char *) tls_data - tcb_size); + return_value = tcb; +#elif CPU_THREAD_LOCAL_STORAGE_VARIANT == 20 + alignment_2 = RTEMS_ALIGN_UP( alignment, CPU_SIZEOF_POINTER ); + tls_area = (void *) RTEMS_ALIGN_UP( (uintptr_t) tls_area, alignment_2 ); + size = _TLS_Get_size(); + tcb = (TLS_Thread_control_block *) +((char *) tls_area + RTEMS_ALIGN_UP( size, alignment_2 )); + tls_data = (char *) tcb - RTEMS_ALIGN_UP( size, alignment ); + return_value = tcb; +#else +#error "unexpected CPU_THREAD_LOCAL_STORAGE_VARIANT value" What are the expected values? I can see 10, 11, 20. Can this please be changed to something readable? For example: #if CPU_THREAD_LOCAL_STORAGE_VARIANT == CPU_THREAD_LOCAL_STORAGE_BLAH #elif CPU_THREAD_LOCAL_STORAGE_VARIANT == CPU_THREAD_LOCAL_STORAGE_BLAH_BLAH This is documented in the no_cpu/cpuimpl.h. I think the numbers are all right if you know the TLS variants. Otherwise we would have to add an extra header file just for the CPU_THREAD_LOCAL_STORAGE_* defines. -- embedded brains GmbH Herr Sebastian HUBER Dornierstr. 4 82178 Puchheim Germany email: sebastian.hu...@embedded-brains.de phone: +49-89-18 94 741 - 16 fax: +49-89-18 94 741 - 08 Registergericht: Amtsgericht München Registernummer: HRB 157899 Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler Unsere Datenschutzerklärung finden Sie hier: https://embedded-brains.de/datenschutzerklaerung/ ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [PATCH v2 06/13] score: Add CPU_THREAD_LOCAL_STORAGE_VARIANT
On 6/10/2022 7:23 pm, Sebastian Huber wrote: > +#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 10 > + tls_data = (void *) > +RTEMS_ALIGN_UP( (uintptr_t) tls_area + sizeof( *tcb ), alignment ); > + tcb = (TLS_Thread_control_block *) ((char *) tls_data - sizeof( *tcb )); > + return_value = tls_data; > +#elif CPU_THREAD_LOCAL_STORAGE_VARIANT == 11 > + tcb_size = RTEMS_ALIGN_UP( sizeof( *tcb ), alignment ); > + tls_data = (void *) > +RTEMS_ALIGN_UP( (uintptr_t) tls_area + tcb_size, alignment ); > + tcb = (TLS_Thread_control_block *) ((char *) tls_data - tcb_size); > + return_value = tcb; > +#elif CPU_THREAD_LOCAL_STORAGE_VARIANT == 20 > + alignment_2 = RTEMS_ALIGN_UP( alignment, CPU_SIZEOF_POINTER ); > + tls_area = (void *) RTEMS_ALIGN_UP( (uintptr_t) tls_area, alignment_2 ); > + size = _TLS_Get_size(); > + tcb = (TLS_Thread_control_block *) > +((char *) tls_area + RTEMS_ALIGN_UP( size, alignment_2 )); > + tls_data = (char *) tcb - RTEMS_ALIGN_UP( size, alignment ); > + return_value = tcb; > +#else > +#error "unexpected CPU_THREAD_LOCAL_STORAGE_VARIANT value" What are the expected values? I can see 10, 11, 20. Can this please be changed to something readable? For example: #if CPU_THREAD_LOCAL_STORAGE_VARIANT == CPU_THREAD_LOCAL_STORAGE_BLAH #elif CPU_THREAD_LOCAL_STORAGE_VARIANT == CPU_THREAD_LOCAL_STORAGE_BLAH_BLAH > +#endif > + > + _TLS_Initialize_TCB_and_DTV( tls_data, tcb, dtv ); > + _TLS_Copy_and_clear( tls_data ); > + > + return return_value; > } Chris ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
[PATCH v2 06/13] score: Add CPU_THREAD_LOCAL_STORAGE_VARIANT
Update #3835.
---
bsps/powerpc/shared/cpu.c | 2 +-
cpukit/include/rtems/score/tls.h | 204 --
cpukit/score/cpu/aarch64/cpu.c| 2 +-
.../cpu/aarch64/include/rtems/score/cpuimpl.h | 3 +
cpukit/score/cpu/arm/__aeabi_read_tp.c| 6 +-
cpukit/score/cpu/arm/__tls_get_addr.c | 6 +-
.../score/cpu/arm/armv7m-context-initialize.c | 2 +-
cpukit/score/cpu/arm/cpu.c| 17 +-
.../score/cpu/arm/include/rtems/score/cpu.h | 10 +-
.../cpu/arm/include/rtems/score/cpuimpl.h | 2 +
.../cpu/bfin/include/rtems/score/cpuimpl.h| 2 +
cpukit/score/cpu/i386/cpu.c | 2 +-
.../cpu/i386/include/rtems/score/cpuimpl.h| 2 +
.../cpu/lm32/include/rtems/score/cpuimpl.h| 2 +
cpukit/score/cpu/m68k/__m68k_read_tp.c| 4 +-
cpukit/score/cpu/m68k/cpu.c | 5 +-
.../score/cpu/m68k/include/rtems/score/cpu.h | 1 +
.../cpu/m68k/include/rtems/score/cpuimpl.h| 2 +
cpukit/score/cpu/microblaze/__tls_get_addr.c | 10 +-
cpukit/score/cpu/microblaze/cpu.c | 2 +-
.../cpu/microblaze/include/rtems/score/cpu.h | 1 +
.../microblaze/include/rtems/score/cpuimpl.h | 3 +
.../cpu/mips/include/rtems/score/cpuimpl.h| 2 +
.../cpu/moxie/include/rtems/score/cpuimpl.h | 2 +
.../cpu/nios2/include/rtems/score/cpuimpl.h | 2 +
.../cpu/nios2/nios2-context-initialize.c | 5 +-
.../cpu/no_cpu/include/rtems/score/cpuimpl.h | 18 ++
.../cpu/or1k/include/rtems/score/cpuimpl.h| 2 +
.../cpu/powerpc/include/rtems/score/cpuimpl.h | 2 +
.../cpu/riscv/include/rtems/score/cpuimpl.h | 2 +
.../cpu/riscv/riscv-context-initialize.c | 2 +-
.../cpu/sh/include/rtems/score/cpuimpl.h | 2 +
cpukit/score/cpu/sparc/cpu.c | 2 +-
.../cpu/sparc/include/rtems/score/cpuimpl.h | 2 +
cpukit/score/cpu/sparc64/cpu.c| 2 +-
.../cpu/sparc64/include/rtems/score/cpuimpl.h | 2 +
.../cpu/v850/include/rtems/score/cpuimpl.h| 2 +
.../cpu/x86_64/include/rtems/score/cpuimpl.h | 2 +
cpukit/score/src/threadinitialize.c | 6 +-
cpukit/score/src/tlsallocsize.c | 44 ++--
40 files changed, 208 insertions(+), 183 deletions(-)
diff --git a/bsps/powerpc/shared/cpu.c b/bsps/powerpc/shared/cpu.c
index a06b8c0868..c38b60b4ee 100644
--- a/bsps/powerpc/shared/cpu.c
+++ b/bsps/powerpc/shared/cpu.c
@@ -130,7 +130,7 @@ void _CPU_Context_Initialize(
#endif
if ( tls_area != NULL ) {
-void *tls_block = _TLS_TCB_before_TLS_block_initialize( tls_area );
+void *tls_block = _TLS_Initialize_area( tls_area );
the_ppc_context->tp = (uintptr_t) tls_block + 0x7000;
}
diff --git a/cpukit/include/rtems/score/tls.h b/cpukit/include/rtems/score/tls.h
index ee4fb9a22e..9c90b6362b 100644
--- a/cpukit/include/rtems/score/tls.h
+++ b/cpukit/include/rtems/score/tls.h
@@ -10,7 +10,7 @@
*/
/*
- * Copyright (c) 2014 embedded brains GmbH. All rights reserved.
+ * Copyright (C) 2014, 2022 embedded brains GmbH
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -37,7 +37,7 @@
#ifndef _RTEMS_SCORE_TLS_H
#define _RTEMS_SCORE_TLS_H
-#include
+#include
#include
@@ -116,9 +116,9 @@ typedef struct {
} TLS_Index;
/**
- * @brief Gets the TLS size.
+ * @brief Gets the size of the thread-local storage data in bytes.
*
- * @return The TLS size.
+ * @return Returns the size of the thread-local storage data in bytes.
*/
static inline uintptr_t _TLS_Get_size( void )
{
@@ -135,82 +135,64 @@ static inline uintptr_t _TLS_Get_size( void )
}
/**
- * @brief Returns the value aligned up to the stack alignment.
+ * @brief Gets the size of the thread control block area in bytes.
*
- * @param val The value to align.
- *
- * @return The value aligned to the stack alignment.
+ * @return Returns the size of the thread control block area in bytes.
*/
-static inline uintptr_t _TLS_Align_up( uintptr_t val )
+static inline uintptr_t _TLS_Get_thread_control_block_area_size( void )
{
- uintptr_t alignment = CPU_STACK_ALIGNMENT;
+#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 11
+ uintptr_t alignment;
- return RTEMS_ALIGN_UP( val, alignment );
-}
+ alignment = (uintptr_t) _TLS_Alignment;
-/**
- * @brief Returns the size of the thread control block area size for this
- * alignment, or the minimum size if alignment is too small.
- *
- * @param alignment The alignment for the operation.
- *
- * @return The size of the thread control block area.
- */
-static inline uintptr_t _TLS_Get_thread_control_block_area_size(
- uintptr_t alignment
-)
-{
- return alignment <= sizeof(TLS_Thread_control_block) ?
-sizeof(TLS_Thread_control_block) : alignment;
+ return RTEMS_ALIGN_UP( sizeof( TLS_Thread_control_block ), alignment );
+#else
+ return sizeof( TLS_Thread_control_block
