Re: [RTEMS][PATCH v2 0/2] riscv: add freedom E310 Arty A7
On Wed, 11 Sep 2019 at 15:12, Hesham Almatary wrote:
>
> On Wed, 11 Sep 2019 at 14:07, Pragnesh Patel
> wrote:
> >
> > Fredom E310 Arty has a support for FDT but right now, u-boot (or any
> > bootloader) will not copy FDT address into CPU register (a1 for RISCV)
> > instead we have given FDT address manually as shown below:
> >
> On FPGA/hardware, a bootrom (part of your Xilinx project) should be
> doing this (read: loading a1 with dtb address) already.
>
u-boot, pk, etc assume so and should follow the same convention of
passing the DTB address in a1 for the next stage bootloader/OS.
> > bsps/riscv/shared/start/start.S
> >
> > #ifdef BSP_START_COPY_FDT_FROM_U_BOOT
> > + LADDR a1, frdme310arty_dtb
> > mv a0, a1
> > callbsp_fdt_copy
> > #endif
> >
> > bsps/riscv/riscv/dts/frdme310arty_dtb_array.c
> > unsigned char frdme310arty_dtb[] = {
> >0xd0, 0x0d, 0xfe, 0xed, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x38,
> >0x00, 0x00, 0x0a, 0x74, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x11,
> > }
> >
> > Can you suggest me a better way of doing this?
> >
> > - Pragnesh
> >
> > On Wed, Sep 11, 2019 at 2:18 PM Sebastian Huber
> > wrote:
> > >
> > > On 11/09/2019 10:43, Pragnesh Patel wrote:
> > > > Ok understood.
> > > > If i will add Freedom E310 related code in bsp/riscv/riscv directory
> > > > then there are some code changes related to "console, btimer and other
> > > > minor things" so can i add this changes under new #define let's say
> > > > #define RISCV_ENABLE_FRDME310_SUPPORT ?
> > >
> > > Please don't add a new btimer driver. This is a legacy driver. For this
> > > BSP we can switch to the btimer-cpucounter.c variant.
> > >
> > > >
> > > > I am planning to add this #define in configure.ac through
> > > > RTEMS_BSPOPTS_SET([RISCV_ENABLE_FRDME310_SUPPORT],[*],[1]), By default
> > > > it is disabled.
> > > > what's your suggestion on this?
> > >
> > > Yes, this sounds good. If there are to many places with this define,
> > > then we have to think again how to proceed.
> > >
> > > --
> > > Sebastian Huber, embedded brains GmbH
> > >
> > > Address : Dornierstr. 4, D-82178 Puchheim, Germany
> > > Phone : +49 89 189 47 41-16
> > > Fax : +49 89 189 47 41-09
> > > E-Mail : sebastian.hu...@embedded-brains.de
> > > PGP : Public key available on request.
> > >
> > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
>
>
>
> --
> Hesham
--
Hesham
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Re: [RTEMS][PATCH v2 0/2] riscv: add freedom E310 Arty A7
On Wed, 11 Sep 2019 at 14:07, Pragnesh Patel wrote:
>
> Fredom E310 Arty has a support for FDT but right now, u-boot (or any
> bootloader) will not copy FDT address into CPU register (a1 for RISCV)
> instead we have given FDT address manually as shown below:
>
On FPGA/hardware, a bootrom (part of your Xilinx project) should be
doing this (read: loading a1 with dtb address) already.
> bsps/riscv/shared/start/start.S
>
> #ifdef BSP_START_COPY_FDT_FROM_U_BOOT
> + LADDR a1, frdme310arty_dtb
> mv a0, a1
> callbsp_fdt_copy
> #endif
>
> bsps/riscv/riscv/dts/frdme310arty_dtb_array.c
> unsigned char frdme310arty_dtb[] = {
>0xd0, 0x0d, 0xfe, 0xed, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x38,
>0x00, 0x00, 0x0a, 0x74, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x11,
> }
>
> Can you suggest me a better way of doing this?
>
> - Pragnesh
>
> On Wed, Sep 11, 2019 at 2:18 PM Sebastian Huber
> wrote:
> >
> > On 11/09/2019 10:43, Pragnesh Patel wrote:
> > > Ok understood.
> > > If i will add Freedom E310 related code in bsp/riscv/riscv directory
> > > then there are some code changes related to "console, btimer and other
> > > minor things" so can i add this changes under new #define let's say
> > > #define RISCV_ENABLE_FRDME310_SUPPORT ?
> >
> > Please don't add a new btimer driver. This is a legacy driver. For this
> > BSP we can switch to the btimer-cpucounter.c variant.
> >
> > >
> > > I am planning to add this #define in configure.ac through
> > > RTEMS_BSPOPTS_SET([RISCV_ENABLE_FRDME310_SUPPORT],[*],[1]), By default
> > > it is disabled.
> > > what's your suggestion on this?
> >
> > Yes, this sounds good. If there are to many places with this define,
> > then we have to think again how to proceed.
> >
> > --
> > Sebastian Huber, embedded brains GmbH
> >
> > Address : Dornierstr. 4, D-82178 Puchheim, Germany
> > Phone : +49 89 189 47 41-16
> > Fax : +49 89 189 47 41-09
> > E-Mail : sebastian.hu...@embedded-brains.de
> > PGP : Public key available on request.
> >
> > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
--
Hesham
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Re: [RTEMS][PATCH v2 0/2] riscv: add freedom E310 Arty A7
On 11/09/2019 15:07, Pragnesh Patel wrote: Fredom E310 Arty has a support for FDT but right now, u-boot (or any bootloader) will not copy FDT address into CPU register (a1 for RISCV) instead we have given FDT address manually as shown below: Qemu does this an I guess U-Boot does it also. How would Linux know about the device tree? The bootloader must provide this information. -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [RTEMS][PATCH v2 0/2] riscv: add freedom E310 Arty A7
Fredom E310 Arty has a support for FDT but right now, u-boot (or any
bootloader) will not copy FDT address into CPU register (a1 for RISCV)
instead we have given FDT address manually as shown below:
bsps/riscv/shared/start/start.S
#ifdef BSP_START_COPY_FDT_FROM_U_BOOT
+ LADDR a1, frdme310arty_dtb
mv a0, a1
callbsp_fdt_copy
#endif
bsps/riscv/riscv/dts/frdme310arty_dtb_array.c
unsigned char frdme310arty_dtb[] = {
0xd0, 0x0d, 0xfe, 0xed, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x38,
0x00, 0x00, 0x0a, 0x74, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x11,
}
Can you suggest me a better way of doing this?
- Pragnesh
On Wed, Sep 11, 2019 at 2:18 PM Sebastian Huber
wrote:
>
> On 11/09/2019 10:43, Pragnesh Patel wrote:
> > Ok understood.
> > If i will add Freedom E310 related code in bsp/riscv/riscv directory
> > then there are some code changes related to "console, btimer and other
> > minor things" so can i add this changes under new #define let's say
> > #define RISCV_ENABLE_FRDME310_SUPPORT ?
>
> Please don't add a new btimer driver. This is a legacy driver. For this
> BSP we can switch to the btimer-cpucounter.c variant.
>
> >
> > I am planning to add this #define in configure.ac through
> > RTEMS_BSPOPTS_SET([RISCV_ENABLE_FRDME310_SUPPORT],[*],[1]), By default
> > it is disabled.
> > what's your suggestion on this?
>
> Yes, this sounds good. If there are to many places with this define,
> then we have to think again how to proceed.
>
> --
> Sebastian Huber, embedded brains GmbH
>
> Address : Dornierstr. 4, D-82178 Puchheim, Germany
> Phone : +49 89 189 47 41-16
> Fax : +49 89 189 47 41-09
> E-Mail : sebastian.hu...@embedded-brains.de
> PGP : Public key available on request.
>
> Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
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Re: [RTEMS][PATCH v2 0/2] riscv: add freedom E310 Arty A7
On 11/09/2019 10:43, Pragnesh Patel wrote: Ok understood. If i will add Freedom E310 related code in bsp/riscv/riscv directory then there are some code changes related to "console, btimer and other minor things" so can i add this changes under new #define let's say #define RISCV_ENABLE_FRDME310_SUPPORT ? Please don't add a new btimer driver. This is a legacy driver. For this BSP we can switch to the btimer-cpucounter.c variant. I am planning to add this #define in configure.ac through RTEMS_BSPOPTS_SET([RISCV_ENABLE_FRDME310_SUPPORT],[*],[1]), By default it is disabled. what's your suggestion on this? Yes, this sounds good. If there are to many places with this define, then we have to think again how to proceed. -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [RTEMS][PATCH v2 0/2] riscv: add freedom E310 Arty A7
Ok understood. If i will add Freedom E310 related code in bsp/riscv/riscv directory then there are some code changes related to "console, btimer and other minor things" so can i add this changes under new #define let's say #define RISCV_ENABLE_FRDME310_SUPPORT ? I am planning to add this #define in configure.ac through RTEMS_BSPOPTS_SET([RISCV_ENABLE_FRDME310_SUPPORT],[*],[1]), By default it is disabled. what's your suggestion on this? -Pragnesh On Wed, Sep 11, 2019 at 1:03 PM Sebastian Huber wrote: > > On 11/09/2019 09:27, Pragnesh Patel wrote: > > Thanks for the clarification. i am also agree with your comments but > > let's say in future, we want to add I2C and SPI for Freedom E310 then > > what's your suggestion? > > Future I2C and SPI drivers should be added to: > > https://git.rtems.org/rtems/tree/cpukit/dev > > They should be initialized in a BSP for example through the device tree. > Currently, we lack a proper generic initialization via the device tree. > > -- > Sebastian Huber, embedded brains GmbH > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > Phone : +49 89 189 47 41-16 > Fax : +49 89 189 47 41-09 > E-Mail : sebastian.hu...@embedded-brains.de > PGP : Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [RTEMS][PATCH v2 0/2] riscv: add freedom E310 Arty A7
On 11/09/2019 09:27, Pragnesh Patel wrote: Thanks for the clarification. i am also agree with your comments but let's say in future, we want to add I2C and SPI for Freedom E310 then what's your suggestion? Future I2C and SPI drivers should be added to: https://git.rtems.org/rtems/tree/cpukit/dev They should be initialized in a BSP for example through the device tree. Currently, we lack a proper generic initialization via the device tree. -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. ___ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
Re: [RTEMS][PATCH v2 0/2] riscv: add freedom E310 Arty A7
Hello Hesham, Thanks for the clarification. i am also agree with your comments but let's say in future, we want to add I2C and SPI for Freedom E310 then what's your suggestion? - Pragnesh On Tue, Sep 10, 2019 at 4:13 PM Hesham Almatary wrote: > > Hi Pragnesh, > > Thanks for the v2 update. I guess our question/comment on the previous > v1 patch was about the addition of bsps/riscv/frdme310arty/ directory > at all. That is, you might be able to just use bsps/riscv/riscv > already. Are there any significant changes that prevent you from just > using "bsps/riscv/riscv"? For example, griscv doesn't have FDT, and > has its own way of managing (external) interrupts, so a new gricv bsp > is added. On the other hand, it looks to me that frdme310arty has FDT > and the same PLIC/CLINT drivers that riscv/riscv already uses, which > doesn't really need any special handling or additions. I managed, for > example, to get bsps/riscv/riscv running on Piccolo [1] on a Xilinx > FPGA (with FDT, PLIC, CLINT and 16550 Xilinx UART IP) without having > to do anything (except for just two lines of FDT handling code that I > submitted patches for). > > [1] https://github.com/bluespec/Piccolo > > Cheers, > Hesham > > On Tue, 10 Sep 2019 at 07:34, Pragnesh Patel > wrote: > > > > This series added a support for RISCV freedom E310 Arty A7 bsp > > and add bsps/riscv/shared code for reusability > > > > Changes in v2: > > > > bsps/riscv/frdme310arty/btimer/btimer.c > > - Remove the read_csr() function from btimer.c > > - Remove CONFIG_BTIMER_RISCV_GET_MCYCLES macro to get time in > > microseconds > > > > bsps/riscv/frdme310arty/clock/clockdrv.c > > bsps/riscv/riscv/clock/clockdrv.c > > - Delete both files and Add bsps/riscv/shared/clock/clockdrv.c > > - riscv_clock_get_timebase_frequency(): Get timebase-frequency from > > cpus or cpu@0 devicetree node because riscv uses "cpus" node and > > frdme310arty uses "cpu@0" node to look for timebase-frequency > > - Remove rtems_counter_initialize_converter() and > > rtems_timecounter_simple_install() functions > > > > bsps/riscv/frdme310arty/include/bsp/riscv.h > > - Remove unused frdme310arty_l2c_base; > > > > bsps/riscv/frdme310arty/start/bsp_fatal_halt.c > > bsps/riscv/riscv/start/bsp_fatal_halt.c > > - Delete this file and Add bsps/riscv/shared/start/bsp_fatal_halt.c > > > > bsps/riscv/frdme310arty/start/bspstart.c > > - Remove unused function riscv_get_node_byname() > > > > bsps/riscv/frdme310arty/start/linkcmds.in > > - Use @RISCV_RAM_REGION_BEGIN@ and @RISCV_RAM_REGION_SIZE@ instead of > > hard coded values > > > > c/src/lib/libbsp/riscv/frdme310arty/Makefile.am > > - librtemsbsp_a_SOURCES -> bsps/riscv/shared/start/bsp_fatal_halt.c > > - librtemsbsp_a_SOURCES -> bsps/riscv/shared/clock/clockdrv.c > > > > c/src/lib/libbsp/riscv/frdme310arty/configure.ac > > - change RISCV_RAM_REGION_SIZE to default 256MiB > > > > bsps/riscv/riscv/irq/irq.c > > - Delete this irq.c and it will now use bsps/riscv/shared/irq/irq.c > > > > c/src/lib/libbsp/riscv/riscv/Makefile.am > > - librtemsbsp_a_SOURCES -> bsps/riscv/shared/start/bsp_fatal_halt.c > > - librtemsbsp_a_SOURCES -> bsps/riscv/shared/clock/clockdrv.c > > - librtemsbsp_a_SOURCES -> bsps/riscv/shared/irq/irq.c > > > > Pragnesh Patel (2): > > riscv: add freedom E310 Arty A7 bsp > > bsp/riscv: Remove duplicate files > > > > bsps/include/bsp/fatal.h | 6 +- > > bsps/riscv/frdme310arty/btimer/btimer.c| 104 ++ > > bsps/riscv/frdme310arty/config/frdme310arty.cfg| 11 + > > bsps/riscv/frdme310arty/console/console-config.c | 146 > > bsps/riscv/frdme310arty/console/uart.c | 100 ++ > > bsps/riscv/frdme310arty/dts/frdme310arty.dts | 130 +++ > > .../frdme310arty/dts/frdme310arty_dtb_array.c | 259 ++ > > bsps/riscv/frdme310arty/headers.am | 15 + > > bsps/riscv/frdme310arty/include/bsp.h | 57 > > bsps/riscv/frdme310arty/include/bsp/fe310_uart.h | 42 +++ > > bsps/riscv/frdme310arty/include/bsp/irq.h | 73 > > bsps/riscv/frdme310arty/include/bsp/riscv.h| 59 > > bsps/riscv/frdme310arty/include/tm27.h | 334 ++ > > bsps/riscv/frdme310arty/start/bsp_specs| 9 + > > bsps/riscv/frdme310arty/start/bspstart.c | 204 +++ > > bsps/riscv/frdme310arty/start/linkcmds.in | 49 +++ > > bsps/riscv/frdme310arty/start/start.S | 147 > > bsps/riscv/riscv/clock/clockdrv.c | 212 > > bsps/riscv/riscv/irq/irq.c | 379 > > - > > bsps/riscv/riscv/start/bsp_fatal_halt.c| 53 --- > > bsps/riscv/shared/clock/clockdrv.c | 231 + > > bsps/riscv/shared/irq/irq.c
Re: [RTEMS][PATCH v2 0/2] riscv: add freedom E310 Arty A7
Hi Pragnesh, Thanks for the v2 update. I guess our question/comment on the previous v1 patch was about the addition of bsps/riscv/frdme310arty/ directory at all. That is, you might be able to just use bsps/riscv/riscv already. Are there any significant changes that prevent you from just using "bsps/riscv/riscv"? For example, griscv doesn't have FDT, and has its own way of managing (external) interrupts, so a new gricv bsp is added. On the other hand, it looks to me that frdme310arty has FDT and the same PLIC/CLINT drivers that riscv/riscv already uses, which doesn't really need any special handling or additions. I managed, for example, to get bsps/riscv/riscv running on Piccolo [1] on a Xilinx FPGA (with FDT, PLIC, CLINT and 16550 Xilinx UART IP) without having to do anything (except for just two lines of FDT handling code that I submitted patches for). [1] https://github.com/bluespec/Piccolo Cheers, Hesham On Tue, 10 Sep 2019 at 07:34, Pragnesh Patel wrote: > > This series added a support for RISCV freedom E310 Arty A7 bsp > and add bsps/riscv/shared code for reusability > > Changes in v2: > > bsps/riscv/frdme310arty/btimer/btimer.c > - Remove the read_csr() function from btimer.c > - Remove CONFIG_BTIMER_RISCV_GET_MCYCLES macro to get time in > microseconds > > bsps/riscv/frdme310arty/clock/clockdrv.c > bsps/riscv/riscv/clock/clockdrv.c > - Delete both files and Add bsps/riscv/shared/clock/clockdrv.c > - riscv_clock_get_timebase_frequency(): Get timebase-frequency from > cpus or cpu@0 devicetree node because riscv uses "cpus" node and > frdme310arty uses "cpu@0" node to look for timebase-frequency > - Remove rtems_counter_initialize_converter() and > rtems_timecounter_simple_install() functions > > bsps/riscv/frdme310arty/include/bsp/riscv.h > - Remove unused frdme310arty_l2c_base; > > bsps/riscv/frdme310arty/start/bsp_fatal_halt.c > bsps/riscv/riscv/start/bsp_fatal_halt.c > - Delete this file and Add bsps/riscv/shared/start/bsp_fatal_halt.c > > bsps/riscv/frdme310arty/start/bspstart.c > - Remove unused function riscv_get_node_byname() > > bsps/riscv/frdme310arty/start/linkcmds.in > - Use @RISCV_RAM_REGION_BEGIN@ and @RISCV_RAM_REGION_SIZE@ instead of > hard coded values > > c/src/lib/libbsp/riscv/frdme310arty/Makefile.am > - librtemsbsp_a_SOURCES -> bsps/riscv/shared/start/bsp_fatal_halt.c > - librtemsbsp_a_SOURCES -> bsps/riscv/shared/clock/clockdrv.c > > c/src/lib/libbsp/riscv/frdme310arty/configure.ac > - change RISCV_RAM_REGION_SIZE to default 256MiB > > bsps/riscv/riscv/irq/irq.c > - Delete this irq.c and it will now use bsps/riscv/shared/irq/irq.c > > c/src/lib/libbsp/riscv/riscv/Makefile.am > - librtemsbsp_a_SOURCES -> bsps/riscv/shared/start/bsp_fatal_halt.c > - librtemsbsp_a_SOURCES -> bsps/riscv/shared/clock/clockdrv.c > - librtemsbsp_a_SOURCES -> bsps/riscv/shared/irq/irq.c > > Pragnesh Patel (2): > riscv: add freedom E310 Arty A7 bsp > bsp/riscv: Remove duplicate files > > bsps/include/bsp/fatal.h | 6 +- > bsps/riscv/frdme310arty/btimer/btimer.c| 104 ++ > bsps/riscv/frdme310arty/config/frdme310arty.cfg| 11 + > bsps/riscv/frdme310arty/console/console-config.c | 146 > bsps/riscv/frdme310arty/console/uart.c | 100 ++ > bsps/riscv/frdme310arty/dts/frdme310arty.dts | 130 +++ > .../frdme310arty/dts/frdme310arty_dtb_array.c | 259 ++ > bsps/riscv/frdme310arty/headers.am | 15 + > bsps/riscv/frdme310arty/include/bsp.h | 57 > bsps/riscv/frdme310arty/include/bsp/fe310_uart.h | 42 +++ > bsps/riscv/frdme310arty/include/bsp/irq.h | 73 > bsps/riscv/frdme310arty/include/bsp/riscv.h| 59 > bsps/riscv/frdme310arty/include/tm27.h | 334 ++ > bsps/riscv/frdme310arty/start/bsp_specs| 9 + > bsps/riscv/frdme310arty/start/bspstart.c | 204 +++ > bsps/riscv/frdme310arty/start/linkcmds.in | 49 +++ > bsps/riscv/frdme310arty/start/start.S | 147 > bsps/riscv/riscv/clock/clockdrv.c | 212 > bsps/riscv/riscv/irq/irq.c | 379 > - > bsps/riscv/riscv/start/bsp_fatal_halt.c| 53 --- > bsps/riscv/shared/clock/clockdrv.c | 231 + > bsps/riscv/shared/irq/irq.c| 379 > + > bsps/riscv/shared/start/bsp_fatal_halt.c | 53 +++ > c/src/lib/libbsp/riscv/acinclude.m4| 2 + > c/src/lib/libbsp/riscv/frdme310arty/Makefile.am| 75 > c/src/lib/libbsp/riscv/frdme310arty/configure.ac | 68 > c/src/lib/libbsp/riscv/riscv/Makefile.am | 6 +- > 27 files changed, 2555 insertions(+), 648 deletions(-) > create mode 100644
[RTEMS][PATCH v2 0/2] riscv: add freedom E310 Arty A7
This series added a support for RISCV freedom E310 Arty A7 bsp and add bsps/riscv/shared code for reusability Changes in v2: bsps/riscv/frdme310arty/btimer/btimer.c - Remove the read_csr() function from btimer.c - Remove CONFIG_BTIMER_RISCV_GET_MCYCLES macro to get time in microseconds bsps/riscv/frdme310arty/clock/clockdrv.c bsps/riscv/riscv/clock/clockdrv.c - Delete both files and Add bsps/riscv/shared/clock/clockdrv.c - riscv_clock_get_timebase_frequency(): Get timebase-frequency from cpus or cpu@0 devicetree node because riscv uses "cpus" node and frdme310arty uses "cpu@0" node to look for timebase-frequency - Remove rtems_counter_initialize_converter() and rtems_timecounter_simple_install() functions bsps/riscv/frdme310arty/include/bsp/riscv.h - Remove unused frdme310arty_l2c_base; bsps/riscv/frdme310arty/start/bsp_fatal_halt.c bsps/riscv/riscv/start/bsp_fatal_halt.c - Delete this file and Add bsps/riscv/shared/start/bsp_fatal_halt.c bsps/riscv/frdme310arty/start/bspstart.c - Remove unused function riscv_get_node_byname() bsps/riscv/frdme310arty/start/linkcmds.in - Use @RISCV_RAM_REGION_BEGIN@ and @RISCV_RAM_REGION_SIZE@ instead of hard coded values c/src/lib/libbsp/riscv/frdme310arty/Makefile.am - librtemsbsp_a_SOURCES -> bsps/riscv/shared/start/bsp_fatal_halt.c - librtemsbsp_a_SOURCES -> bsps/riscv/shared/clock/clockdrv.c c/src/lib/libbsp/riscv/frdme310arty/configure.ac - change RISCV_RAM_REGION_SIZE to default 256MiB bsps/riscv/riscv/irq/irq.c - Delete this irq.c and it will now use bsps/riscv/shared/irq/irq.c c/src/lib/libbsp/riscv/riscv/Makefile.am - librtemsbsp_a_SOURCES -> bsps/riscv/shared/start/bsp_fatal_halt.c - librtemsbsp_a_SOURCES -> bsps/riscv/shared/clock/clockdrv.c - librtemsbsp_a_SOURCES -> bsps/riscv/shared/irq/irq.c Pragnesh Patel (2): riscv: add freedom E310 Arty A7 bsp bsp/riscv: Remove duplicate files bsps/include/bsp/fatal.h | 6 +- bsps/riscv/frdme310arty/btimer/btimer.c| 104 ++ bsps/riscv/frdme310arty/config/frdme310arty.cfg| 11 + bsps/riscv/frdme310arty/console/console-config.c | 146 bsps/riscv/frdme310arty/console/uart.c | 100 ++ bsps/riscv/frdme310arty/dts/frdme310arty.dts | 130 +++ .../frdme310arty/dts/frdme310arty_dtb_array.c | 259 ++ bsps/riscv/frdme310arty/headers.am | 15 + bsps/riscv/frdme310arty/include/bsp.h | 57 bsps/riscv/frdme310arty/include/bsp/fe310_uart.h | 42 +++ bsps/riscv/frdme310arty/include/bsp/irq.h | 73 bsps/riscv/frdme310arty/include/bsp/riscv.h| 59 bsps/riscv/frdme310arty/include/tm27.h | 334 ++ bsps/riscv/frdme310arty/start/bsp_specs| 9 + bsps/riscv/frdme310arty/start/bspstart.c | 204 +++ bsps/riscv/frdme310arty/start/linkcmds.in | 49 +++ bsps/riscv/frdme310arty/start/start.S | 147 bsps/riscv/riscv/clock/clockdrv.c | 212 bsps/riscv/riscv/irq/irq.c | 379 - bsps/riscv/riscv/start/bsp_fatal_halt.c| 53 --- bsps/riscv/shared/clock/clockdrv.c | 231 + bsps/riscv/shared/irq/irq.c| 379 + bsps/riscv/shared/start/bsp_fatal_halt.c | 53 +++ c/src/lib/libbsp/riscv/acinclude.m4| 2 + c/src/lib/libbsp/riscv/frdme310arty/Makefile.am| 75 c/src/lib/libbsp/riscv/frdme310arty/configure.ac | 68 c/src/lib/libbsp/riscv/riscv/Makefile.am | 6 +- 27 files changed, 2555 insertions(+), 648 deletions(-) create mode 100644 bsps/riscv/frdme310arty/btimer/btimer.c create mode 100644 bsps/riscv/frdme310arty/config/frdme310arty.cfg create mode 100644 bsps/riscv/frdme310arty/console/console-config.c create mode 100644 bsps/riscv/frdme310arty/console/uart.c create mode 100644 bsps/riscv/frdme310arty/dts/frdme310arty.dts create mode 100644 bsps/riscv/frdme310arty/dts/frdme310arty_dtb_array.c create mode 100644 bsps/riscv/frdme310arty/headers.am create mode 100644 bsps/riscv/frdme310arty/include/bsp.h create mode 100644 bsps/riscv/frdme310arty/include/bsp/fe310_uart.h create mode 100644 bsps/riscv/frdme310arty/include/bsp/irq.h create mode 100644 bsps/riscv/frdme310arty/include/bsp/riscv.h create mode 100644 bsps/riscv/frdme310arty/include/tm27.h create mode 100644 bsps/riscv/frdme310arty/start/bsp_specs create mode 100644 bsps/riscv/frdme310arty/start/bspstart.c create mode 100644 bsps/riscv/frdme310arty/start/linkcmds.in create mode 100644 bsps/riscv/frdme310arty/start/start.S delete mode 100644 bsps/riscv/riscv/clock/clockdrv.c delete mode 100644 bsps/riscv/riscv/irq/irq.c delete mode 100644 bsps/riscv/riscv/start/bsp_fatal_halt.c
