Re: RISC-V double float alignment

2019-02-04 Thread Chris Johns
On 5/2/19 10:56 am, Joel Sherrill wrote: > On Mon, Feb 4, 2019 at 5:07 PM Chris Johns > wrote: > > On 2/2/19 6:53 am, Joel Sherrill wrote: > > Then we should ensure proper alignment since we NEVER want an unaligned > > exception on any architecture if it is

Re: RISC-V double float alignment

2019-02-04 Thread Joel Sherrill
On Mon, Feb 4, 2019 at 5:07 PM Chris Johns wrote: > On 2/2/19 6:53 am, Joel Sherrill wrote: > > Then we should ensure proper alignment since we NEVER want an unaligned > > exception on any architecture if it is avoidable. No point in taking the > likely > > performance hit or exception. > > Is

Re: RISC-V double float alignment

2019-02-04 Thread Chris Johns
On 2/2/19 6:53 am, Joel Sherrill wrote: > Then we should ensure proper alignment since we NEVER want an unaligned > exception on any architecture if it is avoidable. No point in taking the > likely > performance hit or exception.  Is this documented anywhere? It is an important issue because a

Re: RISC-V double float alignment

2019-02-02 Thread Jiri Gaisler
On 2/2/19 11:07 AM, Sebastian Huber wrote: > Hello, > > yes, we should avoid misaligned access in RTEMS. Does this commit fix your > problem? > > https://git.rtems.org/rtems/commit/?id=9399473cb83985fd222e299e4581a232f5d35028 Yes, this is exactly the patch I was about to post myself! Thanks..!

Re: RISC-V double float alignment

2019-02-02 Thread Sebastian Huber
Hello, yes, we should avoid misaligned access in RTEMS. Does this commit fix your problem? https://git.rtems.org/rtems/commit/?id=9399473cb83985fd222e299e4581a232f5d35028 ___ devel mailing list devel@rtems.org

Re: RISC-V double float alignment

2019-02-02 Thread Hesham Almatary
I agree with Joel we shouldn't take unaligned accesses. A solution is to add an "unaligned support" configuration option to each RISC-V BSP (similar to HTIF). Then in the CPU_Control struct [1] we add a dummy uint32_t align_padding variable. [1]

Re: RISC-V double float alignment

2019-02-02 Thread Jiri Gaisler
On 2/1/19 5:37 PM, Hesham Almatary wrote: > On Fri, 1 Feb 2019 at 15:08, Jiri Gaisler wrote: >> Hello, >> >> As far as I understand, RISC-V does not require any particular alignment >> of data structures in memory. Nevertheless, the compiler automatically >> aligns data structures on their

Re: RISC-V double float alignment

2019-02-01 Thread Joel Sherrill
On Fri, Feb 1, 2019, 11:38 AM Hesham Almatary On Fri, 1 Feb 2019 at 15:08, Jiri Gaisler wrote: > > > > Hello, > > > > As far as I understand, RISC-V does not require any particular alignment > > of data structures in memory. Nevertheless, the compiler automatically > > aligns data structures on

Re: RISC-V double float alignment

2019-02-01 Thread Hesham Almatary
On Fri, 1 Feb 2019 at 15:08, Jiri Gaisler wrote: > > Hello, > > As far as I understand, RISC-V does not require any particular alignment > of data structures in memory. Nevertheless, the compiler automatically > aligns data structures on their natural sizes, i.e. ints are aligned on > 4-byte and

Re: RISC-V double float alignment

2019-02-01 Thread emanuel stiebler
On 2019-02-01 10:08, Jiri Gaisler wrote: > Hello, > > As far as I understand, RISC-V does not require any particular alignment > of data structures in memory. [ ... ] RISC-V explicitly states somewhere in the manuals, (?) that it supports unaligned access to memory, but it could be emulated in

RISC-V double float alignment

2019-02-01 Thread Jiri Gaisler
Hello, As far as I understand, RISC-V does not require any particular alignment of data structures in memory. Nevertheless, the compiler automatically aligns data structures on their natural sizes, i.e. ints are aligned on 4-byte and doubles on 8-bytes boundaries. sis-riscv with support for