In DxeCheckBootVariable.c, add check for BootOrder and Variable
that return EFI_NOT_FOUND when they are NULL.
In DxeCheckGcd.c, add check for GcdIoMap to ensure it not NULL
when allocating memory to what it points to.
Cc: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Cc: Liming Gao
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2182
In order to support VS2019,
the first thing need to do is add 2019 toolchain on tools_def.template
v2: add ARM/AARCH64/EBC Definitions, Combine VS2017_HOST and VS2019_HOST to
VS_HOST
Cc: Amy Chan
Cc: Bob Feng
Cc: Liming Gao
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2182
Inorder to support VS2019, we add VS2019 config process
in Setup Batch Files,
Because VS2019 and VS2017 could using same vswhere.exe
to detect the InstallationPath,
So we add the -version as the parameter of vswhere
to get the correct
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2182
In order to support VS2019 on EDK2, the following patches was modified def and
batch files
1. Add VS2019 x86/64 definitions on tools_def.template
2. Add VS2019 support on toolsetup batches, and add version check with command
vswhere
Reviewed-by: Bob Feng
-Original Message-
From: Fan, ZhijuX
Sent: Thursday, September 19, 2019 5:04 PM
To: devel@edk2.groups.io
Cc: Gao, Liming ; Feng, Bob C
Subject: [PATCH V2] BaseTools:Fix the issue that build report failed
BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=2201
An
On Wed, 18 Sep 2019 at 15:27, Baptiste Gerondeau
wrote:
>
> From: Baptiste GERONDEAU
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1750;
>
> Since RVCT shares the same assembler syntax as MSFT, use .asm files
> and associate them with MSFT, which would be a first step to addressing
>
On Thu, Sep 19, 2019 at 12:38:00PM +0300, Ard Biesheuvel wrote:
> On Wed, 18 Sep 2019 at 15:27, Baptiste Gerondeau
> wrote:
> >
> > From: Baptiste GERONDEAU
> >
> > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1750;
> >
> > Since RVCT shares the same assembler syntax as MSFT, use .asm
EFI_UNSUPPORTED The InformationType is not known.
The description is described as above in UEFI Spec.
In this case, the test gets the InformationType from EFI_ADAPTER_GET_INFO(), so
the SetInformationfunction return EFI_UNSUPPORTED doesn't make sense. The
reason is not covered by spec at least.
> -Original Message-
> From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> Sent: Tuesday, September 17, 2019 10:03 PM
> To: Chang, Abner (HPS SW/FW Technologist)
> Cc: devel@edk2.groups.io
> Subject: Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v1 01/22]:
> RiscVPkg: RISC-V
Hi Liming,
Ok, Thanks for your comments,
I will prepare the patch V3 with your comments,
Thanks,
Best Regards,
Allen
> -Original Message-
> From: Gao, Liming
> Sent: Thursday, September 19, 2019 4:24 PM
> To: Cheng, Ching JenX ;
> devel@edk2.groups.io
> Cc: Chan, Amy ; Feng, Bob C
>
I add my comments.
>-Original Message-
>From: Baptiste Gerondeau [mailto:baptiste.gerond...@linaro.org]
>Sent: Thursday, September 19, 2019 12:05 AM
>To: devel@edk2.groups.io
>Cc: ard.biesheu...@linaro.org; leif.lindh...@linaro.org; Kinney, Michael D
>; Gao, Liming ; Zhang,
>Shenglei ;
> -Original Message-
> From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> Sent: Tuesday, September 17, 2019 9:54 PM
> To: Chang, Abner (HPS SW/FW Technologist)
> Cc: devel@edk2.groups.io
> Subject: Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v1 02/22]:
> RiscVPkg/Include: Add
BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1944
FormatDosFiles.py Intel\ServerSiliconPkg --exclude Library\SimRegisters\
Its parameter "Library\SimRegisters\" ends with '\'
but I can't seem to get it to exclude the SimRegisters directory
This patch is going to fix this issue
Cc: Liming
Reviewed-by: Bob Feng
-Original Message-
From: Fan, ZhijuX
Sent: Wednesday, September 18, 2019 5:43 PM
To: devel@edk2.groups.io
Cc: Gao, Liming ; Feng, Bob C
Subject: [PATCH] BaseTools:Change the way that get some VpdPcd information
Zhiju,
Please update the patch title, "Change the way that get some VpdPcd
information" is not clear for what this patch dose.
Thanks,
Bob
-Original Message-
From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of Bob Feng
Sent: Thursday, September 19, 2019 4:27 PM
To:
Jordan:
Thanks for your suggestion. I update the style and push @
d652b458f576de785e9f905e6690e28904b1eed1
Thanks
Liming
>-Original Message-
>From: Justen, Jordan L
>Sent: Thursday, September 19, 2019 2:53 AM
>To: Gao, Liming ; devel@edk2.groups.io
>Cc: Johnson, Michael ; Andrew Fish
Please update commit message as the latest change does not return EFI_NOT_FOUND
in DxeCheckBootVariable.c.
With above updated, Reviewed-by: Chasel Chiu
> -Original Message-
> From: Zhang, Shenglei
> Sent: Thursday, September 19, 2019 4:08 PM
> To: devel@edk2.groups.io
> Cc: Kubacki,
On Wed, 18 Sep 2019 at 15:27, Baptiste Gerondeau
wrote:
>
> From: Baptiste GERONDEAU
>
> Add a space between the '|' and the name of the toolchain to use,
> as is the case in all other INF files.
Why?
> Note that I did not touch the RVCT lines, since a following commit in
> the set will
Hi Liming,
On Thu, Sep 19, 2019 at 06:19:42AM +, Gao, Liming wrote:
> I add my comments.
>
> >-Original Message-
> >From: Baptiste Gerondeau [mailto:baptiste.gerond...@linaro.org]
> >Sent: Thursday, September 19, 2019 12:05 AM
> >To: devel@edk2.groups.io
> >Cc:
On Thu, 19 Sep 2019 at 12:52, Leif Lindholm wrote:
>
> On Thu, Sep 19, 2019 at 12:38:00PM +0300, Ard Biesheuvel wrote:
> > On Wed, 18 Sep 2019 at 15:27, Baptiste Gerondeau
> > wrote:
> > >
> > > From: Baptiste GERONDEAU
> > >
> > > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1750;
> > >
Allen:
In my machine, I install VS2017, but not install VS2019. I call edksetup.bat.
It will set up VS2017 environment.
But with this change, it will set the wrong WINSDK10_PREFIX. I add the
comments in the patch.
>-Original Message-
>From: Cheng, Ching JenX
>Sent: Tuesday,
On Wed, 18 Sep 2019 at 15:27, Baptiste Gerondeau
wrote:
>
> From: Baptiste GERONDEAU
>
> RVCT and MSFT's ARM assembler share the same file syntax, but some
> instructions use pre-UAL syntax that is not picked up
> by MSFT's ARM assembler, this commit translates those instructions
> into
On Thu, 19 Sep 2019 at 12:48, Leif Lindholm wrote:
>
> On Thu, Sep 19, 2019 at 12:32:56PM +0300, Ard Biesheuvel wrote:
> > On Wed, 18 Sep 2019 at 15:27, Baptiste Gerondeau
> > wrote:
> > >
> > > From: Baptiste GERONDEAU
> > >
> > > RVCT and MSFT's ARM assembler share the same file syntax, but
Reviewed-by: Sami Mujawar
Regards,
Sami Mujawar
-Original Message-
From: Leif Lindholm
Sent: 18 September 2019 11:43 PM
To: devel@edk2.groups.io
Cc: Sami Mujawar ; Alexei Fedorov
Subject: [PATCH 6/9] DynamicTablesPkg: fix .dsc line ending
Correct line ending in package .dsc.
Cc:
On Thu, Sep 19, 2019 at 12:32:56PM +0300, Ard Biesheuvel wrote:
> On Wed, 18 Sep 2019 at 15:27, Baptiste Gerondeau
> wrote:
> >
> > From: Baptiste GERONDEAU
> >
> > RVCT and MSFT's ARM assembler share the same file syntax, but some
> > instructions use pre-UAL syntax that is not picked up
> > by
BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=2201
An error occurs using special VpdPcd that is not used in the Inf file
In dsc:
[PcdsDynamicExVpd.common.DEFAULT]
gBoardModuleTokenSpaceGuid.test1|*|{CODE({
{0x0} // terminator
})}
In dec:
[PcdsDynamicEx]
# Vpd GPIO table
Hi, Andrew:
Thanks a lot.
Best wishes,
-邮件原件-
发件人: devel@edk2.groups.io 代表 Andrew Fish via Groups.Io
发送时间: 2019年9月19日 1:11
收件人: devel@edk2.groups.io; Tiger Liu(BJ-RD)
抄送: Laszlo Ersek
主题: Re: [edk2-devel] [edk2] DxeIpl : create page table, occupied too much
memory range
> On Sep
I have no objection to this addition, but I do have two questions - and
really I realise this is a follow-on for 81a8a52a6bb21 ("ShellBinPkg:
Remove ShellBinPkg"):
1) Since ShellBinPkg no longer exists, what is the intent of listing
this in the Maintainers.txt file? Generally, this is so that
Leif:
> -Original Message-
> From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> Sent: Thursday, September 19, 2019 5:18 PM
> To: Gao, Liming
> Cc: Gao, Zhichao ; devel@edk2.groups.io; Andrew Fish
> ; Laszlo Ersek ;
> Kinney, Michael D ; Ni, Ray ;
> Ard Biesheuvel
> Subject: Re:
On Thu, 19 Sep 2019 at 13:09, Leif Lindholm wrote:
>
> On Thu, Sep 19, 2019 at 01:01:04PM +0300, Ard Biesheuvel wrote:
> > On Thu, 19 Sep 2019 at 12:48, Leif Lindholm
> > wrote:
> > >
> > > On Thu, Sep 19, 2019 at 12:32:56PM +0300, Ard Biesheuvel wrote:
> > > > On Wed, 18 Sep 2019 at 15:27,
On Thu, 19 Sep 2019 at 13:47, Leif Lindholm wrote:
>
> On Thu, Sep 19, 2019 at 01:37:40PM +0300, Ard Biesheuvel wrote:
> > On Thu, 19 Sep 2019 at 13:34, Baptiste Gerondeau
> > wrote:
> > >> In any case, I'd strongly prefer it if the .S and .asm files produced
> > >> identical object code, so
On Thu, Sep 19, 2019 at 03:36:50PM +0300, Ard Biesheuvel wrote:
> On Thu, 19 Sep 2019 at 14:25, Leif Lindholm wrote:
> > > The problem is that the first branch instruction is patched into the
> > > FV files by the BaseTools, and so the startup code is entered in ARM
> > > mode by default.
> > >
>
Sorry, for replying on this thread, this is the correct one (messed up the
author's email, sorry again !)
Ard Biescheuvel asks : "Why ?"
The practical reason would be because it breaks an "grep -nr "|
${toolchain}" "
(although with some regex magic I guess it can be circumvented, but one
would
On Thu, 19 Sep 2019 at 14:25, Leif Lindholm wrote:
>
> On Thu, Sep 19, 2019 at 01:53:35PM +0300, Ard Biesheuvel wrote:
> > > > I mean that I'd prefer to assemble the .asm files in ARM mode,
> > > > especially since I am not convinced that the startup code we have is
> > > > guaranteed to switch
>
>
>
> > > So is this simply the default of the compiler? I'd prefer it if we
> > > could add a 'CODE 32' directive instead, that way, we may not need any
> > > of the other changes to begin with.
>
> Oh, and the CODE 32 directive is not supported - it's ARM or THUMB :)
>
On Thu, Sep 19, 2019 at 02:16:44PM +, Gao, Liming wrote:
> Leif:
>
> > -Original Message-
> > From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> > Sent: Thursday, September 19, 2019 5:18 PM
> > To: Gao, Liming
> > Cc: Gao, Zhichao ; devel@edk2.groups.io; Andrew Fish
> > ;
Leif:
For this special case of the single patch to include the changes in cross
packages, I include Laszlo, Fish and Mike for the discussion.
Thanks
Liming
> -Original Message-
> From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> Sent: Thursday, September 19, 2019 5:45 PM
> To:
Shenglei:
I have one comment.
> -Original Message-
> From: Zhang, Shenglei
> Sent: Wednesday, September 18, 2019 4:31 PM
> To: devel@edk2.groups.io
> Cc: Zhang, Shenglei ; Feng, Bob C
> ; Gao, Liming
> Subject: [PATCH v3] BaseTools/LzmaCompress: Add two switches
>
> From: "Zhang,
Responses below.
Mike
> -Original Message-
> From: Gao, Liming
> Sent: Friday, August 30, 2019 1:44 AM
> To: r...@edk2.groups.io; Kinney, Michael D
> ; devel@edk2.groups.io
> Subject: RE: [RFC] EDK II Continuous Integration Phase
> 1
>
> Mike:
> I add my comments.
>
> >-Original
Leif:
> -Original Message-
> From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> Sent: Thursday, September 19, 2019 10:39 PM
> To: Gao, Liming
> Cc: Gao, Zhichao ; devel@edk2.groups.io; Andrew Fish
> ; Laszlo Ersek ;
> Kinney, Michael D ; Ni, Ray ;
> Ard Biesheuvel
> Subject: Re:
OK I'll update that then.
Thanks,
Shenglei
> -Original Message-
> From: Chiu, Chasel
> Sent: Thursday, September 19, 2019 5:27 PM
> To: Zhang, Shenglei ; devel@edk2.groups.io
> Cc: Kubacki, Michael A ; Desimone, Nathaniel L
> ; Gao, Liming
> Subject: RE: [edk2-platforms PATCH v5]
Hi Igor,
(+Brijesh)
long-ish pondering ahead, with a question at the end.
On 09/17/19 15:07, Igor Mammedov wrote:
> Use commit (2f295167e0 q35/mch: implement extended TSEG sizes) for
> inspiration and (ab)use reserved register in config space at 0x9c
> offset [*] to extend q35 pci-host with
A file header license/copyright header copied around in commit
5b3e695d8ac5 ("BaseTools: add centralized location for git config files")
was missing a CR - add it in both faulty locations.
Cc: Bob Feng
Cc: Liming Gao
Signed-off-by: Leif Lindholm
Reviewed-by: Bob Feng
---
This file contained what looked like windows 1250 encoded single
quotation marks. Convert them to regular 's. Rework the file to
markdown format and and rename it Readme.md while we're at it.
Cc: Ard Biesheuvel
Cc: "Kinney, Michael D"
Signed-off-by: Leif Lindholm
---
A paragraph sign in a comment came from some ISO8859 encoding,
convert it to the word "section" to remain 7-bit safe, since we're
not actually doing anything special.
Cc: Ard Biesheuvel
Cc: "Kinney, Michael D"
Signed-off-by: Leif Lindholm
---
Correct line ending in package .dsc.
Cc: Sami Mujawar
Cc: Alexei Fedorov
Signed-off-by: Leif Lindholm
Reviewed-by: Sami Mujawar
---
DynamicTablesPkg/DynamicTablesPkg.dsc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/DynamicTablesPkg/DynamicTablesPkg.dsc
While looking at encoding and line ending errors, I found this file
in fact simply points to a sourceforge page which no longer exists.
Since there is nothing more to say than "this is an import of
libfdt", let's just delete it.
Cc: Ard Biesheuvel
Signed-off-by: Leif Lindholm
---
Cc: Bob Feng
Cc: Liming Gao
Signed-off-by: Leif Lindholm
Reviewed-by: Bob Feng
---
BaseTools/Scripts/ConvertFceToStructurePcd.py | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/BaseTools/Scripts/ConvertFceToStructurePcd.py
Cc: Ard Biesheuvel
Signed-off-by: Leif Lindholm
---
ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
b/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
index f4fecbb4098a..5028a955afac 100644
Cc: Jordan Justen
Cc: Andrew Fish
Cc: Ray Ni
Signed-off-by: Leif Lindholm
---
EmulatorPkg/Readme.md | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/EmulatorPkg/Readme.md b/EmulatorPkg/Readme.md
index 5ea61ca7ab5a..0c2eea6a9a02 100644
--- a/EmulatorPkg/Readme.md
+++
On Thu, 19 Sep 2019 at 17:31, Leif Lindholm wrote:
>
> On Thu, Sep 19, 2019 at 03:36:50PM +0300, Ard Biesheuvel wrote:
> > On Thu, 19 Sep 2019 at 14:25, Leif Lindholm
> > wrote:
> > > > The problem is that the first branch instruction is patched into the
> > > > FV files by the BaseTools, and
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2204
These build failures can be reproduced simply by building the
AdvancedFeaturePkg.dsc file in GCC5 for X64 architecture. To
build the whole package DSC (not pull individual features into
other packages), set the WORKSPACE variable to the edk2
Some scripts in Source/Python were missing newlines at end of files,
so add them.
Cc: Bob Feng
Cc: Liming Gao
Signed-off-by: Leif Lindholm
Reviewed-by: Bob Feng
---
BaseTools/Source/Python/AutoGen/DataPipe.py | 2 +-
BaseTools/Source/Python/Common/DataType.py | 2 +-
I have started looking into doing the CRLF->native conversion for EDK2,
and as part of my initial scan, I found a bunch of trivial issues that
would be easier to just fix beforehand.
Mike asked me to also do a trainling whitespace cleanup, and that will
be coming next. I will refrain from pushing
Cc: Ard Biesheuvel
Signed-off-by: Leif Lindholm
---
EmbeddedPkg/Library/TemplateResetSystemLib/TemplateResetSystemLib.inf | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/EmbeddedPkg/Library/TemplateResetSystemLib/TemplateResetSystemLib.inf
Add missing newline at end of WifiConnectionManagerDxe .uni.
Cc: Siyuan Fu
Cc: Jiaxin Wu
Signed-off-by: Leif Lindholm
Reviewed-by: Siyuan Fu
---
NetworkPkg/WifiConnectionManagerDxe/WifiConnectionManagerDxeStrings.uni | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Cc: Ard Biesheuvel
Signed-off-by: Leif Lindholm
---
ArmPlatformPkg/Scripts/Ds5/profile.py | 2 +-
ArmPlatformPkg/Scripts/Makefile | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/ArmPlatformPkg/Scripts/Ds5/profile.py
b/ArmPlatformPkg/Scripts/Ds5/profile.py
index
*cough* 5-6/7 do take a bit of a shotgun approach with the Cc:s, but I
would prefer not breaking the set up any more than it already is.
The changes are however trivial, so hopefully not much of an issue.
Before we start looking into migrating the repository to native
line endings, let's start by
Cc: Jian J Wang
Cc: Hao A Wu
Cc: Dandan Bi
Cc: Liming Gao
Cc: Eric Dong
Cc: Zhichao Gao
Cc: Ray Ni
Signed-off-by: Leif Lindholm
---
MdeModulePkg/Application/UiApp/FrontPageVfr.Vfr|
8
MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerVfr.Vfr
On 09/19/19 11:44, Leif Lindholm wrote:
> Hi Liming,
>
> On Thu, Sep 19, 2019 at 06:19:42AM +, Gao, Liming wrote:
>> I add my comments.
>>
>>> -Original Message-
>>> From: Baptiste Gerondeau [mailto:baptiste.gerond...@linaro.org]
>>> Sent: Thursday, September 19, 2019 12:05 AM
>>>
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
A per-CPU implementation for holding values specific to a CPU when
running as an SEV-ES guest, specifically to hold the Debug Register
value. Allocate an extra page immediately after the GHCB page for each
AP.
Using the
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
During BSP startup, the reset vector code will issue a CPUID instruction
while in 32-bit mode. When running as an SEV-ES guest, this will trigger
a #VC exception.
Add exception handling support to the early reset vector
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
A GHCB page is needed during the Sec phase, so this new page must be
created. Since the GHCB must be marked as an un-encrypted, or shared,
page, an additional pagetable page is required to break down the 2MB
region
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Allocate memory for the GHCB pages during SEV initialization for use
during Pei and Dxe phases. The GHCB page(s) must be shared pages, so
clear the encryption mask from the current page table entries. Upon
successful
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
GHCB pages must be mapped as shared pages, so modify the process of
creating identity mapped pagetable entries so that GHCB entries are
created without the encryption bit set.
Cc: Jian J Wang
Cc: Hao A Wu
Cc: Dandan
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
To support issuing a VMGEXIT instruction, create a library that can be
used to perform GHCB and VMGEXIT related operations and to issue the
actual VMGEXIT instruction when using the GHCB.
Cc: Eric Dong
Cc: Ray Ni
Cc:
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
For SEV-ES, the GHCB page address is stored in the GHCB MSR register
(0xc0010130). Define the register and the format used for register
during GHCB protocol negotiation.
Cc: Michael D Kinney
Cc: Liming Gao
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
The SEV support will clear the C-bit from non-RAM areas. The early GDT
lives in a non-RAM area, so when an exception occurs (like a #VC) the GDT
will be read as un-encrypted even though it is encrypted. This will result
From: Tom Lendacky
Protect the memory used by an SEV-ES guest when S3 is supported. This
includes the page table used to break down the 2MB page that contains
the GHCB so that it can be marked un-encrypted, as well as the GHCB
area.
Regarding the lifecycle of the GHCB-related memory areas:
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
VMGEXIT is a new instruction used for Hypervisor/Guest communication when
running as an SEV-ES guest. A VMGEXIT will cause an automatic exit (AE)
to occur, resulting in a #VMEXIT with an exit code value of 0x403.
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Under SEV-ES, a RDPMC intercept generates a #VC exception. VMGEXIT must be
used to allow the hypervisor to handle this intercept.
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Signed-off-by: Tom Lendacky
---
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
An SEV-ES guest will generate a #VC exception when it encounters a
non-automatic exit (NAE) event. It is expected that the #VC exception
handler will communicate with the hypervisor using the GHCB to handle
the NAE
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Under SEV-ES, a MSR_PROT intercept generates a #VC exception. VMGEXIT must
be used to allow the hypervisor to handle this intercept.
Add support to construct the required GHCB values to support an MSR_PROT
NAE event.
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Under SEV-ES, a IOIO_PROT intercept generates a #VC exception. VMGEXIT
must be used to allow the hypervisor to handle this intercept.
Add support to construct the required GHCB values to support a IOIO_PROT
NAE event.
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Under SEV-ES, a CPUID intercept generates a #VC exception. VMGEXIT must be
used to allow the hypervisor to handle this intercept.
Add support to construct the required GHCB values to support a CPUID NAE
event.
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
The GHCB is used by an SEV-ES guest for communicating between the guest
and the hypervisor. Create the GHCB definition as defined by the GHCB
protocol definition.
Cc: Michael D Kinney
Cc: Liming Gao
Signed-off-by: Tom
From: Tom Lendacky
This patch series provides support for running EDK2/OVMF under SEV-ES.
Secure Encrypted Virtualization - Encrypted State (SEV-ES) expands on the
SEV support to protect the guest register state from the hypervisor. See
"AMD64 Architecture Programmer's Manual Volume 2: System
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Create a function that can be used to determine if the VM is running
as an SEV-ES guest.
Cc: Jordan Justen
Cc: Laszlo Ersek
Cc: Ard Biesheuvel
Signed-off-by: Tom Lendacky
---
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Three new PCDs are needed to support SEV-ES under OVMF:
- PcdSevEsActive: BOOLEAN value used to indicate if SEV-ES is active
- PcdGhcbBase:UINT64 value that is the base address of the GHCB
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Add support to the #VC exception handler to handle string IO. This
requires expanding the IO instruction parsing to recognize string based
IO instructions as well as preparing an un-encrypted buffer to be used
to
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Currently, the OVMF code relies on the hypervisor to enable the cache
support on the processor in order to improve the boot speed. However,
with SEV-ES, the hypervisor is not allowed to change the CR0 register
to enable
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Under SEV-ES, a NPF intercept for an NPT entry with a reserved bit set
generates a #VC exception. This condition is assumed to be an MMIO access.
VMGEXIT must be used to allow the hypervisor to handle this intercept.
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
The SEC phase of OVMF will need access to the MemEncryptSevLib library,
so make the library available during SEC.
Cc: Jordan Justen
Cc: Laszlo Ersek
Cc: Ard Biesheuvel
Signed-off-by: Tom Lendacky
---
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Under SEV-ES, a RDTSC intercept generates a #VC exception. VMGEXIT must be
used to allow the hypervisor to handle this intercept.
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Signed-off-by: Tom Lendacky
---
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Add base support to handle #VC exceptions. This includes a stub routine
to invoke when a #VC exception occurs and special checks in the common
exception handlers to invoke the #VC exception handler routine.
Cc: Eric
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Under SEV-ES, a WBINVD intercept generates a #VC exception. VMGEXIT must be
used to allow the hypervisor to handle this intercept.
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Signed-off-by: Tom Lendacky
---
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
When SEV-ES is active, then SEV is also active. Add support to the SEV
initialization function to also check for SEV-ES being active. If SEV-ES
is active, set the SEV-ES active PCD (PcdSevEsActive).
Cc: Jordan Justen
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Signed-off-by: Leif Lindholm
---
UefiCpuPkg/Application/Cpuid/Cpuid.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/UefiCpuPkg/Application/Cpuid/Cpuid.c
b/UefiCpuPkg/Application/Cpuid/Cpuid.c
index f39a7fb33ae5..cee64f2fb5fc
On Thu, 19 Sep 2019 at 21:06, Leif Lindholm wrote:
>
> *cough* 5-6/7 do take a bit of a shotgun approach with the Cc:s, but I
> would prefer not breaking the set up any more than it already is.
> The changes are however trivial, so hopefully not much of an issue.
>
> Before we start looking into
On Thu, Sep 19, 2019 at 09:24:15PM +0200, Laszlo Ersek wrote:
> On 09/19/19 11:44, Leif Lindholm wrote:
> > I agree with this as a general rule, but for this (hopefully never to
> > be repeated) operation, it makes sense to me to keep each change in
> > this set as one patch.
> >
> > For the
On 09/19/19 04:34, Jian J Wang wrote:
> Update all occurrences of "Jian Wang" to be "Jian J Wang".
>
> Cc: Laszlo Ersek
> Cc: Liming Gao
> Signed-off-by: Jian J Wang
> ---
> Maintainers.txt | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Maintainers.txt
Reviewed-by: Ray Ni
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Leif Lindholm
> Sent: Thursday, September 19, 2019 11:06 AM
> To: devel@edk2.groups.io
> Cc: Justen, Jordan L ; Andrew Fish
> ; Ni, Ray
> Subject: [edk2-devel] [PATCH 4/7] EmulatorPkg: strip trailing
Reviewed-by: Ray Ni
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Leif Lindholm
> Sent: Thursday, September 19, 2019 11:06 AM
> To: devel@edk2.groups.io
> Cc: Dong, Eric ; Ni, Ray ; Laszlo
> Ersek
> Subject: [edk2-devel] [PATCH 7/7] UefiCpuPkg: strip trailing
On 09/19/19 16:56, Gao, Liming wrote:
> Leif:
>
>> -Original Message-
>> From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
>> Sent: Thursday, September 19, 2019 10:39 PM
>> To: Gao, Liming
>> Cc: Gao, Zhichao ; devel@edk2.groups.io; Andrew Fish
>> ; Laszlo Ersek ;
>> Kinney, Michael
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Under SEV-ES, a INVD intercept generates a #VC exception. VMGEXIT must be
used to allow the hypervisor to handle this intercept.
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Signed-off-by: Tom Lendacky
---
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Under SEV-ES, a RDTSCP intercept generates a #VC exception. VMGEXIT must be
used to allow the hypervisor to handle this intercept.
Cc: Eric Dong
Cc: Ray Ni
Cc: Laszlo Ersek
Signed-off-by: Tom Lendacky
---
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
When starting APs in an SMP configuration, the AP needs to know if it is
running as an SEV-ES guest in order to assign a GHCB page.
Add a field to the CPU_MP_DATA structure that will indicate if SEV-ES is
active. This
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Typically, an AP is booted using the INIT-SIPI-SIPI sequence. This
sequence is intercepted by the hypervisor, which sets the AP's registers
to the values requested by the sequence. At that point, the hypervisor can
start
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
A hypervisor is not allowed to update an SEV-ES guests register state,
so when booting an SEV-ES guest AP, the hypervisor is not allowed to
set the RIP to the guest requested value. Instead, an SEV-ES AP must be
From: Tom Lendacky
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Expand the CPU protocol to include a finalization function that can be
used to perform any final AP processing or AP environment setup before
transferring control over to an OS.
Cc: Michael D Kinney
Cc: Liming Gao
1 - 100 of 133 matches
Mail list logo
