I no longer use m...@semihalf.com email. Update Marvell entry with
my alternative address. As there are more than one SolidRun
pltaforms, on the occasion extend the scope.
Signed-off-by: Marcin Wojtas
---
Maintainers.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a
Commit ec5de71d83 ("Silicon/Marvell: Restructure package")
broke Armada80x0Db build by unintentional removal of
device tree component. Restore it.
Signed-off-by: Marcin Wojtas
---
Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc | 3 +++
1 file changed, 3 insertions(+)
diff --git
e patch, that introduced regression:
https://github.com/tianocore/edk2-platforms/commit/ec5de71d83f3a6327c90887456782d15565e6e36#diff-ce7de187b6e203a8e22916145bdc2a35f7c922609105c4282932f02dee7bb84fL34
Best regards,
Marcin
> Thanks
> Narinder
>
> > -Original Message-
&g
śr., 3 sty 2024 o 00:39 Marcin Wojtas napisał(a):
>
> Hi Narinder,
>
> wt., 2 sty 2024 o 21:57 Narinder Dhillon napisał(a):
> >
> > Marcin,
> > I don't see this folder in code, how is it generated ?
>
> It's simply exisitng there:
> Platf
wt., 20 lut 2024 o 11:35 Gahan Saraiya napisał(a):
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4689
>
> Bug 4689 - GetInfo() of Adapter Information Protocol
> should have a provision for IHV to return no data for
> UEFI Spec compliance 2.9 [mantis #1866]
>
>
wt., 2 kwi 2024 o 17:59 Michael D Kinney
napisał(a):
>
> Reviewed-by: Michael D Kinney
>
> > -Original Message-
> > From: Leif Lindholm
> > Sent: Tuesday, April 2, 2024 8:40 AM
> > To: devel@edk2.groups.io
> > Cc: Marcin Wojtas ; Narinder Dhill
Hi Narinder,
sob., 20 lip 2024 o 21:54 napisał(a):
>
> From: Narinder Dhillon
>
> New Marvell Odyssey SoC
>
> This patchset contains only the very basic elements needed to boot to
> EDK2 UiApp on Marvell Odyssey SoC
> - ARM BL31 firmware component copies EDK2 image into memory, so it is
> alw
h | 1 +
> Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.c | 59
> ----
> 3 files changed, 51 insertions(+), 10 deletions(-)
>
Tested-by: Marcin Wojtas
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply O
PhyDev->Addr,
> +PhyConnection));
>*OutPhyDev = PhyDev;
>
>DeviceIds = PcdGetPtr (PcdPhyDeviceIds);
> --
Tested-by: Marcin Wojtas
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#47066): https://edk2.group
controllers. One that has been
> failing
> with old driver and one that has been passing with old driver. Both
> controllers
> pass all tests with multiple eMMC devices used.
>
> Note: We were unable to test DDR speed mode because on test machines both
> new flow
> and ol
Thanks! Everything keep working on my boards:
Tested-by: Marcin Wojtas
Best regards,
Marcin
pt., 27 wrz 2019 o 03:38 Wu, Hao A napisał(a):
> Hello Marcin,
>
>
>
> I have uploaded the V2 series to my fork.
>
> You can get the patch at:
>
> https://github.com/hwu2
MdeModulePkg/SdMmcHcDxe update to use rev 3 of SdMmcOverrideProtocol
reworked SD card initialization and added new enums describing lower
speeds. Include this in XenonDxe, which fixes Armada70x0Db SD interface.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.c
Hitherto code was executing by mistake the first
possible initialization routine (valid for 88E1512 PHY),
regardless the setting in gMarvellTokenSpaceGuid.PcdPhyDeviceIds.
Fix this.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.h | 3 ++-
Silicon/Marvell
Hi Leif,
śr., 9 paź 2019 o 14:00 Leif Lindholm napisał(a):
>
> Cc: Marcin Wojtas
> Signed-off-by: Leif Lindholm
> ---
> Maintainers.txt | 14 --
> 1 file changed, 4 insertions(+), 10 deletions(-)
>
> diff --git a/Maintainers.txt b/Maintainers.txt
> index
-upstream-r20191009
I'm looking forward to your comments or remarks.
Best regards,
Marcin
Marcin Wojtas (3):
Marvell/Cn9130Db: Add DeviceTree
Marvell/Cn9131Db: Add DeviceTree
Marvell/Cn9132Db: Add DeviceTree
Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9130DbA.inf | 22 +
Si
This patch adjusts the top device tree for the CN9132 development board
(variant A), based on the sources which are common for the Cn913x SoCs.
Also an .inf file is added to allow its compilation.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9132DbA.inf | 22
This patch adjusts the top device tree for the CN9131 development board
(variant A), based on the sources which are common for the Cn913x SoCs.
Also an .inf file is added to allow its compilation.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9131DbA.inf | 22
Hitherto SoC description and MppLib libraries code assumed
that there could be only two Xenon SdMmc controller
instances in the SoC. Remove those limitations, so that
to support CN913x SoCs, which may have up to 4 of such interfaces.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k
This patch adds ACPI tables and necessary headers,
which are common for Cn913x SoCs and the CN9130 development board
(variant A). Wiring up of support will be done in the follow-up
commits.
Signed-off-by: Marcin Wojtas
Acked-by: Leif Lindholm
---
Silicon/Marvell/OcteonTx/AcpiTables/T91
This patch adds device tree sources which are common for Cn913x SoCs
and the CN9130 development board (variant A).
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9130DbA.inf | 22 +
Silicon/Marvell/OcteonTx/DeviceTree/T91/armada-ap806-quad.dtsi | 43
From: Patryk Duda
This patch implements convenient way of changing strings included
in SMBIOS Table1, Table2, Table3.
Strings can be altered by defining following PCDs:
gMarvellTokenSpaceGuid.PcdProductManufacturer
gMarvellTokenSpaceGuid.PcdProductPlatformName
gMarvellTokenSpaceGuid.PcdPro
f.inc - they are used by all variants
* 8,9/10
- remove redundant .dsc / .fdf files
- enable building with '-D CN9131' / '-D CN9132' flags
- fix OEM Table ID length in SSDT (CN9131)
Marcin Wojtas (8):
Marvell/Armada7k8k: Fix 32-bit compilation
Marvell/Cn9130Db: A
This patch introduces all necessary components required
for building EDK2 firmware for CN9131-DB setup A.
In order to build this variant, '-D CN9131' flag should be added.
Signed-off-by: Marcin Wojtas
---
Platform/Marvell/Cn913xDb/Cn9131DbA.dsc.inc
Now that the customization of Type1/2/3 SBMIOS
tables strings is possible, adjust them for all
supported boards.
Signed-off-by: Marcin Wojtas
---
Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc| 4
Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc| 4
Platform/Marvell
variant, '-D CN9130' flag should be added.
Signed-off-by: Marcin Wojtas
---
Platform/Marvell/Cn913xDb/Cn9130DbA.dsc.inc |
107 +++
Platform/Marvell/Cn913xDb/Cn913xDbA.dsc |
48 +++
Platform/Marvel
It turned out, that the recently added features broke
ARM compilation. Fix all issues:
* Update signatures types in structures (UINTN -> UINT64)
* Use fixed type for address in ICU
* Limit memory for ARM build to 1GB and stop using non-existent PCD
Signed-off-by: Marcin Wojtas
---
Sili
should be added.
Signed-off-by: Marcin Wojtas
---
Platform/Marvell/Cn913xDb/Cn9132DbA.dsc.inc |
72 +++
Platform/Marvell/Cn913xDb/Cn913xDbA.dsc |
13 +-
Platform/Marvell/Cn913xDb/BoardDescriptionLib/Cn9132DbABoardDescLib.in
In case the number of CP11x components exceeded the maximum
of currently supported, the user is informed with the information.
It turned out that the print arguments were incorrect - fix it.
Signed-off-by: Marcin Wojtas
Reviewed-by: Leif Lindholm
---
Silicon/Marvell/Library/IcuLib/IcuLib.c | 4
czw., 10 paź 2019 o 18:59 Leif Lindholm
napisał(a):
> On Thu, Oct 10, 2019 at 07:41:15AM +0200, Marcin Wojtas wrote:
> > Hi,
> >
> > As agreed, due to the licencing concerns (GPL/MIT), it is
> > better to keep the device trees for newly added SoC family
>
Hi Leif,
pt., 11 paź 2019 o 01:07 Leif Lindholm napisał(a):
>
> On Thu, Oct 10, 2019 at 07:42:19AM +0200, Marcin Wojtas wrote:
> > Now that the customization of Type1/2/3 SBMIOS
> > tables strings is possible, adjust them for all
> > supported boards.
> >
&g
Hi Leif,
pt., 11 paź 2019 o 01:04 Leif Lindholm napisał(a):
>
> On Thu, Oct 10, 2019 at 07:42:18AM +0200, Marcin Wojtas wrote:
> > From: Patryk Duda
> >
> > This patch implements convenient way of changing strings included
> > in SMBIOS Table1, Table2, Table3.
>
Hi Leif,
pt., 11 paź 2019 o 01:51 Leif Lindholm napisał(a):
>
> On Fri, Oct 11, 2019 at 01:33:49AM +0200, Marcin Wojtas wrote:
> > Hi Leif,
> >
> > pt., 11 paź 2019 o 01:04 Leif Lindholm
> > napisał(a):
> > >
> > > On Thu, Oct 10, 2019 at 07:
Leif,
pt., 11 paź 2019 o 09:30 Marcin Wojtas napisał(a):
>
> Hi Leif,
>
> pt., 11 paź 2019 o 01:51 Leif Lindholm napisał(a):
> >
> > On Fri, Oct 11, 2019 at 01:33:49AM +0200, Marcin Wojtas wrote:
> > > Hi Leif,
> > >
> > > pt.,
This patch adds ACPI tables and necessary headers,
which are common for Cn913x SoCs and the CN9130 development board
(variant A). Wiring up of support will be done in the follow-up
commits.
Signed-off-by: Marcin Wojtas
Acked-by: Leif Lindholm
---
Silicon/Marvell/OcteonTx/AcpiTables/T91
This patch introduces all necessary components required
for building EDK2 firmware for CN9131-DB setup A.
In order to build this variant, '-D CN9131' flag should be added.
Signed-off-by: Marcin Wojtas
Reviewed-by: Leif Lindholm
---
Platform/Marvell/Cn913xDb/Cn9131D
Hitherto SoC description and MppLib libraries code assumed
that there could be only two Xenon SdMmc controller
instances in the SoC. Remove those limitations, so that
to support CN913x SoCs, which may have up to 4 of such interfaces.
Signed-off-by: Marcin Wojtas
Acked-by: Leif Lindholm
ble building with '-D CN9131' / '-D CN9132' flags
- fix OEM Table ID length in SSDT (CN9131)
Marcin Wojtas (8):
Marvell/Armada7k8k: Fix 32-bit compilation
Marvell/Cn9130Db: Add ACPI tables
Marvell/Cn9130Db: Introduce board support
Marvell/Library: ArmadaSoCDescLib/MppL
From: Patryk Duda
This patch implements convenient way of changing strings included
in SMBIOS Table1, Table2, Table3.
Strings can be altered by defining following PCDs:
gMarvellTokenSpaceGuid.PcdProductManufacturer
gMarvellTokenSpaceGuid.PcdProductPlatformName
gMarvellTokenSpaceGuid.PcdPro
Now that the customization of Type1/2/3 SBMIOS
tables strings is possible, adjust them for all
supported boards.
Signed-off-by: Marcin Wojtas
---
Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc| 4
Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc| 4
Platform/Marvell
should be added.
Signed-off-by: Marcin Wojtas
Reviewed-by: Leif Lindholm
---
Platform/Marvell/Cn913xDb/Cn9132DbA.dsc.inc |
72 +++
Platform/Marvell/Cn913xDb/Cn913xDbA.dsc |
13 +-
Platform/Marvell/Cn913xDb/BoardDesc
It turned out, that the recently added features broke
ARM compilation. Fix all issues:
* Update signatures types in structures (UINTN -> UINT64)
* Use fixed type for address in ICU
* Limit memory for ARM build to 1GB and stop using non-existent PCD
Signed-off-by: Marcin Wojtas
Reviewed-by: L
In case the number of CP11x components exceeded the maximum
of currently supported, the user is informed with the information.
It turned out that the print arguments were incorrect - fix it.
Signed-off-by: Marcin Wojtas
Reviewed-by: Leif Lindholm
---
Silicon/Marvell/Library/IcuLib/IcuLib.c | 4
variant, '-D CN9130' flag should be added.
Signed-off-by: Marcin Wojtas
Reviewed-by: Leif Lindholm
---
Platform/Marvell/Cn913xDb/Cn9130DbA.dsc.inc |
107 +++
Platform/Marvell/Cn913xDb/Cn913xDbA.dsc
From: Patryk Duda
This patch implements convenient way of changing strings included
in SMBIOS Table1, Table2, Table3.
Strings can be altered by defining following PCDs:
gMarvellTokenSpaceGuid.PcdProductManufacturer
gMarvellTokenSpaceGuid.PcdProductPlatformName
gMarvellTokenSpaceGuid.PcdPro
.groups.io
> > > Cc: Albecki, Mateusz; Wu, Hao A; Marcin Wojtas; Gao, Zhichao; Gao, Liming
> > > Subject: [PATCH 1/2] SdMmcPciHcDxe: Send EdkiiSdMmcSwitchClockFreq after
> > > SD clock start
> >
> >
> > Hello Mateusz,
> >
> > Just a minor format
Hi,
wt., 24 gru 2019 o 03:52 Wu, Hao A napisał(a):
>
> > -Original Message-
> > From: Albecki, Mateusz
> > Sent: Saturday, December 21, 2019 1:13 AM
> > To: devel@edk2.groups.io
> > Cc: Albecki, Mateusz; Wu, Hao A; Marcin Wojtas; Gao, Zhichao; Ga
Hi Leif,
wt., 15 paź 2019 o 20:07 Leif Lindholm napisał(a):
>
> On Mon, Oct 14, 2019 at 03:25:04PM +0200, Marcin Wojtas wrote:
> > From: Patryk Duda
> >
> > This patch implements convenient way of changing strings included
> > in SMBIOS Table1, Table2, Table3.
>
SmbiosPlatformDxe is used both by Armada 7k8k and CN913x platforms.
Replace board name placeholder in order to avoid confusion.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a
This patch adds ACPI tables and necessary headers,
which are common for Cn913x SoCs and the CN9130 development board
(variant A). Wiring up of support will be done in the follow-up
commits.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9130DbA.inf | 56
- fix OEM Table ID length in SSDT (CN9131)
Marcin Wojtas (10):
Marvell/Armada7k8k: Fix 32-bit compilation
Marvell/Cn9130Db: Add ACPI tables
Marvell/Cn9130Db: Add DeviceTree
Marvell/Cn9130Db: Introduce board support
Marvell/Library: ArmadaSoCDescLib: Extend Xenon information
Marvell/Li
Hitherto MppLib code assumed that there could be only two
Xenon SdMmc controllers' PHYs. Remove this limitation, so that to
support CN913x SoCs, which may have up to 4 of such interfaces.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Library/MppLib/MppLib.c | 4 +---
1 file chang
This patch introduces all necessary components required
for building EDK2 firmware for CN9131-DB setup A.
In order to build this variant, '-D CN9131' flag should be added.
Otherwise the default (CN9130) will be compiled.
Signed-off-by: Marcin Wojtas
---
Platform/Marvel
This patch introduces all necessary components required
for building EDK2 firmware for CN9130-DB setup A.
Because the board is modular and can be extended to support
also CN9131 and CN9132 SoC variants, extract common part into
.dsc.inc file, which will be included by them.
Signed-off-by: Marcin
It turned out, that the recently added features broke
ARM compilation. Fix all issues:
* Use SIGNATURE_32 only
* Do not shift address by 32-bit in ICU
* Limit memory for ARM build to 1GB and stop using non-existent PCD
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Drivers/BoardDesc
should be added.
Otherwise the default (CN9130) will be compiled.
Signed-off-by: Marcin Wojtas
---
Platform/Marvell/Cn913xDb/Cn9132DbA.dsc.inc |
72 +++
Platform/Marvell/Cn913xDb/Cn913xDbA.dsc |
15 ++-
Platform/Marvel
Hitherto SoC description library code assumed that there could
be only two Xenon SdMmc controller instances in the SoC. Remove this
limitation, so that to support CN913x SoCs, which may have up to 4 of
such interfaces.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k/Library
This patch adds device tree sources which are common for Cn913x SoCs
and the CN9130 development board (variant A). Wiring up of support
will be done in the follow-up commits.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9130DbA.inf | 22 +
Silicon/Marvell
In case the number of CP11x components exceeded the maximum
of currently supported, the user is informed with the information.
It turned out that the print arguments were incorrect - fix it.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Library/IcuLib/IcuLib.c | 4 ++--
1 file changed, 2
Hi Leif,
pt., 16 sie 2019 o 19:41 Leif Lindholm napisał(a):
>
> On Thu, Aug 15, 2019 at 04:54:14AM +0200, Marcin Wojtas wrote:
> > SmbiosPlatformDxe is used both by Armada 7k8k and CN913x platforms.
> > Replace board name placeholder in order to avoid confusion.
>
> Stup
Hi Leif,
pt., 16 sie 2019 o 19:10 Leif Lindholm napisał(a):
>
> On Thu, Aug 15, 2019 at 04:54:07AM +0200, Marcin Wojtas wrote:
> > This patch adds device tree sources which are common for Cn913x SoCs
> > and the CN9130 development board (variant A). Wiring up of support
>
Hi Leif,
pt., 16 sie 2019 o 19:36 Leif Lindholm napisał(a):
>
> On Thu, Aug 15, 2019 at 04:54:10AM +0200, Marcin Wojtas wrote:
> > Hitherto MppLib code assumed that there could be only two
> > Xenon SdMmc controllers' PHYs. Remove this limitation, so that to
> > s
Hi Leif, Laszlo
śr., 21 sie 2019 o 11:11 Laszlo Ersek napisał(a):
>
> On 08/19/19 19:14, Leif Lindholm wrote:
> > +Stewards (don't panic!)
> >
> > On Fri, Aug 16, 2019 at 11:03:42PM +0200, Marcin Wojtas wrote:
> >> Hi Leif,
> >>
> >>
2019-March/037669.html
> V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html
>
> Email thread with approval from Marvell:
>
> https://edk2.groups.io/g/devel/message/41507
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Cc: Marcin Wojtas
> Signed-off-b
Until now, during the USB device enumeration when its PortState
USB_PORT_STAT_CONNECTION bit was not set, the stack was not informed
that the device is not present. Fix that by returning appropriate
error code.
Change-Id: I588f82b987993e9755f64ce76cde9eb690ef1d54
Signed-off-by: Marcin Wojtas
ll be returned.
>
> Best Regards,
> Hao Wu
>
>
> >
> > Thanks,
> > Ray
> >
> > > -Original Message-
> > > From: devel@edk2.groups.io On Behalf Of
> > Marcin Wojtas
> > > Sent: Wednesday, July 31, 2019 2:25 PM
>
case of SlowMode or 3.3V operation, the HS400 capability
will be disabled in the SdMmc driver, along with other highest-speed
modes.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdhci.h | 1 +
Silicon/Marvell/Drivers/SdMmc/XenonDxe/XenonSdMmcOverride.c | 5
This patch adds ACPI tables and necessary headers,
which are common for Cn913x SoCs and the CN9130 development board
(variant A). Wiring up of support will be done in the follow-up
commits.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9130DbA.inf | 56
This patch adds device tree sources which are common for Cn913x SoCs
and the CN9130 development board (variant A). Wiring up of support
will be done in the follow-up commits.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/OcteonTx/DeviceTree/T91/Cn9130DbA.inf | 22 +
Silicon/Marvell
This patch introduces all necessary components required
for building EDK2 firmware for CN9131-DB setup A.
Signed-off-by: Marcin Wojtas
---
Platform/Marvell/Cn913xDb/Cn9131DbA.dsc.inc | 72
++
Platform/Marvell/Cn913xDb/Cn9131DbA.dsc
Hitherto MppLib code assumed that there could be only two
Xenon SdMmc controllers' PHYs. Remove this limitation, so that to
support CN913x SoCs, which may have up to 4 of such interfaces.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Library/MppLib/MppLib.c | 4 +---
1 file chang
In case the number of CP11x components exceeded the maximum
of currently supported, the user is informed with the information.
It turned out that the print arguments were incorrect - fix it.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Library/IcuLib/IcuLib.c | 4 ++--
1 file changed, 2
github:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/cn913x-upstream-r20190808
I'm looking forward to your comments or remarks.
Best regards,
Marcin
Marcin Wojtas (9):
Marvell/Cn9130Db: Add ACPI tables
Marvell/Cn9130Db: Add DeviceTree
Marvell/Cn9130Db: Intr
Hitherto SoC description library code assumed that there could
be only two Xenon SdMmc controller instances in the SoC. Remove this
limitation, so that to support CN913x SoCs, which may have up to 4 of
such interfaces.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k/Library
This patch introduces all necessary components required
for building EDK2 firmware for CN9132-DB setup A.
Signed-off-by: Marcin Wojtas
---
Platform/Marvell/Cn913xDb/Cn9132DbA.dsc.inc |
72 +++
Platform/Marvell/Cn913xDb/Cn9132DbA.dsc
This patch introduces all necessary components required
for building EDK2 firmware for CN9130-DB setup A.
Because the board is modular and can be extended to support
also CN9131 and CN9132 SoC variants, extract common part into
.dsc.inc file, which will be included by them.
Signed-off-by: Marcin
SmbiosPlatformDxe is used both by Armada 7k8k and CN913x platforms.
Replace board name placeholder in order to avoid confusion.
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a
Hi Leif,
czw., 8 sie 2019 o 13:51 Leif Lindholm napisał(a):
>
> Hi Marcin,
>
> On Thu, Aug 08, 2019 at 01:30:21AM +0200, Marcin Wojtas wrote:
> > Hi,
> >
> > Marvell Octeon CN913X SoC is a new device, which is built of
> > upgraded hardware blocks known from p
czw., 8 sie 2019 o 18:48 Leif Lindholm napisał(a):
>
> Hi Marcin.
>
> On Thu, Aug 08, 2019 at 03:51:15PM +0200, Marcin Wojtas wrote:
> > > > This patchset adds all necessary components (.dsc/.fdf,
> > > > libraries, ACPI, DT) to support all 3 variants, whic
Hi Leif,
czw., 8 sie 2019 o 19:53 Leif Lindholm napisał(a):
>
> On Thu, Aug 08, 2019 at 07:05:29PM +0200, Marcin Wojtas wrote:
> > > On a higher level, I confess to not being entirely convinced about the
> > > triplicate .dsc/.dsc.inc/.fdf.inc setup. (Of the three, the .
Hi Jeremy,
Thanks for the patch. However I played with booting with ACPI with and
without your patch - I may be missing something, but I don't see a
difference, when using earlycon (both
'earlycon=uart,mmio32,0xf0512000' and
'earlycon=uart8250,mmio32,0xf0512000'). Can you please show what
booting
Jeremy,
wt., 9 kwi 2019 o 06:03 Jeremy Linton napisał(a):
>
> Hi Marcin,
>
> On 4/8/19 8:31 PM, Marcin Wojtas wrote:
> > Hi Jeremy,
> >
> > Thanks for the patch. However I played with booting with ACPI with and
> > without your patch - I may be missing somethi
pt., 24 maj 2019 o 14:50 Ard Biesheuvel napisał(a):
>
> On Mon, 20 May 2019 at 17:27, Marcin Wojtas wrote:
> >
> > From: Ard Biesheuvel
> >
> > Implement a special version of PciExpressLib that takes the quirky
> > nature of the Synopsys Designware PCIe IP
Hi Ard,
czw., 23 maj 2019 o 22:24 Ard Biesheuvel napisał(a):
>
> On Thu, 23 May 2019 at 21:11, Leif Lindholm wrote:
> >
> > On Thu, May 23, 2019 at 07:13:20PM +0100, Ard Biesheuvel wrote:
> > > > Connect: PcieRoot(0x0)/Pci(0x0,0x0): Not Found
> > > >
> > > > Hmm, that's actually interesting. Ma
pt., 24 maj 2019 o 15:12 Ard Biesheuvel napisał(a):
>
> On Fri, 24 May 2019 at 15:08, Marcin Wojtas wrote:
> >
> > Hi Ard,
> >
> > czw., 23 maj 2019 o 22:24 Ard Biesheuvel
> > napisał(a):
> > >
> > > On Thu, 23 May 2019 at 21:11, Leif
pt., 24 maj 2019 o 15:08 Ard Biesheuvel napisał(a):
>
> On Fri, 24 May 2019 at 15:03, Marcin Wojtas wrote:
> >
> > pt., 24 maj 2019 o 14:50 Ard Biesheuvel
> > napisał(a):
> > >
> > > On Mon, 20 May 2019 at 17:27, Marcin Wojtas w
pt., 24 maj 2019 o 17:32 Leif Lindholm napisał(a):
>
> > > Looking forward to your feedback. Other than that - do you have any
> > > remarks to the rest of the patches in v2?
> >
> > The rest looks fine.
>
> And I'm happy that all of my comments on v1 have been addressed.
>
Great, thanks. Ok, wit
Introduce new callback that can provide information
about PCIE controller per-board description.
A new structure is defined containing base addresses,
windows/bus configuration and reset GPIO usage indication.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
Introduce new callback that can provide information about PCIE
controllers, which are used on the platform. According ArmadaSoCDescLib
ArmadaBoardDescLib routines are used for obtaining required data.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
In order to avoid hardcoding the controller type when using
MV_GPIO_PIN, extend this structure with new according field.
This patch is required to properly handle PCIE slot reset
with the GPIO pin.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon
and Jing Hua /
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib/PciHostBridgeLib.inf
| 52 +++
Silicon/Marvell/Armada7k8k/Library/Armada7k8kPciHostBridgeLib
Mistakenly in all Marvell Armada7k8k .dsc files
'[LibraryClasses.common]' section was split.
Merge entries into one for each platform.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db.inf | 1 +
Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Pcie.h| 26 +
Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 108
-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin.inf | 1 +
Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Pcie.h| 26 +
Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 108
Now as the OS clock configuration is inherited from the firmware,
and PCIE is also configured, switch safely MacchiatoBin board to
use the pci-host-generic driver.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k/DeviceTree
To help diagnose ACPI related boot problems, include the 'acpiview'
builtin shell command to Armada7k8k build of the UEFI Shell.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 1 +
1 file
: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db.inf | 1 +
Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Pcie.h| 26 +
Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl | 108
in whatever device is in the slot to appear at each
of the 32 device positions. The patch is based on Socionext Synquacer
PciSegmentLib implementation and will later be extended to support
multiple PCIE slots.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
oCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
| 6 +++
Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
| 20 +
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDe
This patch extends ArmadaBoardDescLib libraries for all
existing Armada7k8k-based platforms with PCIE.
It introduces ArmadaBoardPcieControllerGet routine with
per-board PCIE controllers description.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
et
- keep the reset active for 150ms
- assign translation values instead of asserting
*8/14
- assign gArmTokenSpaceGuid.PcdPciIoTranslation value in .dsc
* 9-11/14
- correct line endings
- remove unused methods
- extend commit messages with 32k shift description
Marcin Wojtas (14)
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