The commit is pushed to "branch-rh7-3.10.0-514.26.1.vz7.35.x-ovz" and will appear at https://src.openvz.org/scm/ovz/vzkernel.git after rh7-3.10.0-514.26.1.vz7.33.22 ------> commit 79cf059f7fbbdb12900628a7c8c31918b69ac37b Author: Radim KrÄmáŠ<rkrc...@redhat.com> Date: Mon Aug 7 14:41:09 2017 +0400
ms/KVM: x86: add Align16 instruction flag Patchset description: FXSR emulation backport Upstream backport of FXSR (FXSAVE, FXRSTOR) emulation + bugfixes on it Fixes PSBM-69206 Radim KrÄmáŠ(4): KVM: x86: add Align16 instruction flag KVM: x86: save one bit in ctxt->d KVM: x86: add asm_safe wrapper KVM: x86: emulate FXSAVE and FXRSTOR =============================================================== This patch description: Needed for FXSAVE and FXRSTOR. Signed-off-by: Radim KrÄmáŠ<rkrc...@redhat.com> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> https://jira.sw.ru/browse/PSBM-69206 ms commit: d3fe959f81024072068e9ed86b39c2acfd7462a9 Signed-off-by: Evgeny Yakovlev <eyakov...@virtuozzo.com> --- arch/x86/kvm/emulate.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c index 7b19846..aeb96c4 100644 --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c @@ -172,6 +172,7 @@ #define NearBranch ((u64)1 << 52) /* Near branches */ #define No16 ((u64)1 << 53) /* No 16 bit operand */ #define IncSP ((u64)1 << 54) /* SP is incremented before ModRM calc */ +#define Aligned16 ((u64)1 << 55) /* Aligned to 16 byte boundary (e.g. FXSAVE) */ #define DstXacc (DstAccLo | SrcAccHi | SrcWrite) @@ -652,21 +653,24 @@ static void set_segment_selector(struct x86_emulate_ctxt *ctxt, u16 selector, * depending on whether they're AVX encoded or not. * * Also included is CMPXCHG16B which is not a vector instruction, yet it is - * subject to the same check. + * subject to the same check. FXSAVE and FXRSTOR are checked here too as their + * 512 bytes of data must be aligned to a 16 byte boundary. */ -static bool insn_aligned(struct x86_emulate_ctxt *ctxt, unsigned size) +static unsigned insn_alignment(struct x86_emulate_ctxt *ctxt, unsigned size) { if (likely(size < 16)) - return false; + return 1; if (ctxt->d & Aligned) - return true; + return size; else if (ctxt->d & Unaligned) - return false; + return 1; else if (ctxt->d & Avx) - return false; + return 1; + else if (ctxt->d & Aligned16) + return 16; else - return true; + return size; } static __always_inline int __linearize(struct x86_emulate_ctxt *ctxt, @@ -723,7 +727,7 @@ static __always_inline int __linearize(struct x86_emulate_ctxt *ctxt, la &= (u32)-1; break; } - if (insn_aligned(ctxt, size) && ((la & (size - 1)) != 0)) + if (la & (insn_alignment(ctxt, size) - 1)) return emulate_gp(ctxt, 0); *linear = la; return X86EMUL_CONTINUE;
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