What is the procedure to add gdb patches to RBS?
I have a few patches that fixes the erc32 simulator and also
add support for leon2 and leon3. This would allow us to drop
the sis bsp, and also to test the leon2 and leon3 bsp's with
sis.
Jiri.
___
On 11/14/2014 02:34 AM, Chris Johns wrote:
On 14/11/2014 9:12 am, Jiri Gaisler wrote:
What is the procedure to add gdb patches to RBS?
Patches are first accepted by the RTEMS Project as the definition of the
tools belongs to the project and tool packagers, ie the RSB, need to adopt
On 11/14/2014 04:18 PM, Joel Sherrill wrote:
On 11/14/2014 5:27 AM, Jiri Gaisler wrote:
On 11/14/2014 02:34 AM, Chris Johns wrote:
On 14/11/2014 9:12 am, Jiri Gaisler wrote:
What is the procedure to add gdb patches to RBS?
Patches are first accepted by the RTEMS Project
to update rtems-tools.
Jiri.
From fff12ec9eb81f6078b5078db866b61c70810739d Mon Sep 17 00:00:00 2001
From: Jiri Gaisler j...@gaisler.se
Date: Sat, 15 Nov 2014 20:56:43 +0100
Subject: [PATCH] rtems-sparc: switch to gdb-7.8.1
---
rtems/config/4.11/rtems-sparc.bset | 4 +-
rtems/config/tools
Mon Sep 17 00:00:00 2001
From: Jiri Gaisler j...@gaisler.se
Date: Sun, 16 Nov 2014 19:54:48 +0100
Subject: [PATCH] bare/qemu: add patches for leon3 support.
---
bare/config/devel/qemu-git-1.cfg | 10 ++
1 file changed, 10 insertions(+)
diff --git a/bare/config/devel/qemu-git-1.cfg b/bare
/tests/cdtest.exe
SIS - SPARC instruction simulator 2.8, copyright Jiri Gaisler 1995
Bug-reports to j...@gaisler.se
LEON3 emulation enabled
sis run
GLOBAL: Hey I'm in base class constructor number 1 for 0x40033254.
GLOBAL: Hey I'm in base class constructor number 2 for 0x40033248.
GLOBAL: Hey
Condition needs to be inverted, as a 1 in the mask register means
that the interrupt is enabled. Solves ticket #1958 in trac.
---
c/src/lib/libbsp/sparc/leon3/include/leon.h | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/c/src/lib/libbsp/sparc/leon3/include/leon.h
On 11/26/2014 08:12 AM, Sebastian Huber wrote:
On 25/11/14 23:25, Joel Sherrill wrote:
How long is this test supposed to run?
It takes 4:42 using sis on my computer which is a 2.9 Ghz i7 .
SIS is a slow simulator. On Qemu it runs much faster.
I agree, qemu runs crypt01 in about 8
On 02/02/2015 05:25 PM, Joel Sherrill wrote:
On 2/2/2015 9:45 AM, Jiri Gaisler wrote:
Should be fixed now, sorry for the trouble.
No problem. My build is past that now. I thought I built
qemu with the RSB last week while teaching an RTEMS class.
When did the server switch occur?
I made
This is my fault, a server switch failed to move the qemu directory
to the new server. I will restore the files as soon as possible.
Jiri.
On 02/02/2015 03:47 PM, Joel Sherrill wrote:
Hi Daniel
Qemu doesn't build with the RSB because the Gaisler patches that
were referenced seem to have
If you build gdb and sis through RSB, leon2 and leon3 emulation will be
provided. You should start sis with -leon2 or -leon3 to enable it. In
gdb, do 'target sim -leon3'.
You can also build gdb-7.11 separately, after applying this patch:
https://gaisler.org/gdb/gdb-7.11-sis-leon2-leon3.diff
On 10/11/16 18:17, Joel Sherrill wrote:
> Hi
>
> After I get through bumping newlib and gcc, is it time
> to bump the master from gdb 7.11 to 7.12?
>
> Looking at the 7.11 bset, I see three sets of patches.
>
> (1) sis simulator patches
> (2) addition of aarch64 and x86_64 rtems targets
> (3)
It seems that you have compiled RTEMS with a gcc version that can use
%fpu registers to move integer data. The work-around could be to compile
the kernel with -msoft-float, or to move to a (later) version of gcc
that does not do this anymore. Which gcc version do you use?
Jiri.
On 22/10/16
I have attached a patch for RSB/gdb-7.11 that brings the sis simulator
up to date and adds support for leon2/3 emulation. Some seg-faults have
also been fixed, and breakpoints and watchpoints work correctly with gdb
and DDD now. The patch is pulled in from gaisler.org, and consists of
the
The previous patch also contained a non-related fix to binutils, sorry
for that. I have attached the correct patch.
Jiri.
On 14/11/16 13:58, Jiri Gaisler wrote:
> I have attached a patch for RSB/gdb-7.11 that brings the sis simulator
> up to date and adds support for leon2/3 emulation. So
On 01/12/16 17:43, Joel Sherrill wrote:
> Hi
>
> erc32 has a couple of test failures on master:
>
>
> *** BEGIN OF TEST PSXSPIN 1 ***
> pthread_spin_init( , PTHREAD_PROCESS_PRIVATE ) -- OK
> pthread_spin_destroy( ) -- OK
> pthread_spin_init( , PTHREAD_PROCESS_SHARED ) -- OK
>
test would be:
rtems-test --rtems-bsp=leon3-sis sparc-rtems4.12/c/leon3/testsuites
Jiri.
>From 3e0bd1b41942c4a992e47417657c92acfa117b12 Mon Sep 17 00:00:00 2001
From: Jiri Gaisler <j...@gaisler.se>
Date: Thu, 23 Mar 2017 22:30:01 +0100
Subject: [PATCH] gdb: update to latest sis patches
On 03/21/2017 10:26 PM, Joel Sherrill wrote:
>
>
> On Tue, Mar 21, 2017 at 5:17 AM, Jiri Gaisler <j...@gaisler.se
> <mailto:j...@gaisler.se>> wrote:
>
> The culprit seems to be the CASA instruction. The leon3 bsp is
> built to always need th
This could also be a simulator issue, the leon3 port of sis is quite
new. I will investigate a bit.
Jiri.
On 03/19/2017 02:32 PM, Joel Sherrill wrote:
> Hi
>
> I was following up on Gedare's testing and tried leon3. There
> were a surprising number of failures there with SMP disabled.
> This is
The culprit seems to be the CASA instruction. The leon3 bsp is built to
always need this instruction, regardless if SMP is enabled or not. The
sis simulator does not support CASA at the moment, hence the failures.
The erc32 and leon2 bsp does not use CASA since the hardware does not
support it. If
This seems to be a problem with the leon3 bsp, most of the failing tests
work fine on erc32 and leon2. This is regardless of which simulator is
used. Maybe the SMP additions to leon3 breaks something when SMP is
disabled ...? It also goes back in time - I am using git master from
early December
Sorry, this is my fault. I updated the diff yesterday but forgot that
the checksum also needs to be changed. I have restored the original diff
so RSB should build OK now. I will send a proper patch for the new diff
on the list later...
Jiri.
On 07/29/2017 05:52 PM, Aditya Upadhyay wrote:
>
Please merge.
>From b14821b4ac72913139cc1758e9757443f697a642 Mon Sep 17 00:00:00 2001
From: Jiri Gaisler <j...@gaisler.se>
Date: Sun, 30 Jul 2017 21:27:38 +0200
Subject: [PATCH] Update gdb-7.12 config to pull in latest sis patches.
* Will make sure sis uses LMA rather than VMA when lo
On 07/31/2017 02:21 PM, Sebastian Huber wrote:
> On 31/07/17 14:18, Jiri Gaisler wrote:
>
>> Sorry - previous post had the wrong patch. Here is the correct one.
>
> Ok, could you please check that it is now all right.
>
It's pe
Sorry - previous post had the wrong patch. Here is the correct one.
Jiri.
>From a5462f874eef326d47753abeffd2043034bccecf Mon Sep 17 00:00:00 2001
From: Jiri Gaisler <j...@gaisler.se>
Date: Sun, 30 Jul 2017 21:27:38 +0200
Subject: [PATCH] Update gdb-7.12 config to pull in latest si
It was my understanding that later versions of GCC no longer use FPU
registers for integer variables. If so, then the -msoft-float option is
not needed when compiling the kernel.
Jiri.
On 07/13/2017 10:43 AM, Sebastian Huber wrote:
> All the BSPs use -msoft-float. How do we want to address the
On 07/19/2017 04:04 PM, Sebastian Huber wrote:
> Hello Jiri,
>
> I fixed a couple of tests. One remaining failure on the leon2 is mathf:
>
> *** BEGIN OF TEST MATHF ***
> acosf : 1.570796
> acoshf : -nan
> asinf : 1.570796
> asinhf : 0.881374
> atanf :
Can somebody review and merge this to rtems-tools.git?
Thanks, Jiri.
>From cacac45250ae9c0c8d45e9179090bb3992750628 Mon Sep 17 00:00:00 2001
From: Jiri Gaisler <j...@gaisler.se>
Date: Mon, 17 Jul 2017 10:42:42 +0200
Subject: [PATCH] Added test scripts for standalone sis
---
tes
Sorry, forgot to add the patch. Should not be doing this on a Friday
night ... :-)
On 07/21/2017 10:24 PM, Jiri Gaisler wrote:
> Can somebody review and merge this to RSB?
>
> Thanks, Jiri.
>
>From ae34bb8a2dedcff60ca25a83786c09d7bac3b794 Mon Sep 17 00:00:00 2001
From:
Can somebody review and merge this to RSB?
Thanks, Jiri.
___
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel
I updated RSB and RTEMS to git head. RSB built fine for sparc, but
building the libtests/tar01 RTEMS test now fails with:
mv -f .deps/initial_filesystem_tar_xz.Tpo .deps/initial_filesystem_tar_xz.Po
sparc-rtems4.12-gcc -B../../../../../leon3/lib/ -specs bsp_specs -qrtems
-mcpu=leon3 -O2 -g
My fault, the file cpukit/libmisc/xz/xz_config.h had somehow been
changed to enable XZ_USE_CRC64. A new checkout and regeneration of
makefiles with bootstrap solved the problem ...
Jiri.
On 07/25/2017 10:11 PM, Jiri Gaisler wrote:
> I updated RSB and RTEMS to git head. RSB built fine for sp
On 07/19/2017 07:36 PM, Sebastian Huber wrote:
> ----- Jiri Gaisler <j...@gaisler.se> schrieb:
>>
>> On 07/19/2017 04:04 PM, Sebastian Huber wrote:
>>> Hello Jiri,
>>>
>>> I fixed a couple of tests. One remaining failure on the leon2 is math
On 07/28/2017 12:30 AM, Chris Johns wrote:
> On 27/07/2017 22:46, Sebastian Huber wrote:
>> I build currently a tool set using Binutils 2.29 instead of 2.28. I will
>> build
>> all BSPs tomorrow with it. In case this is successful, then I will commit
>> this
>> to RSB.
> There is also gdb-8.0.
On 06/17/2017 10:28 AM, Cillian O'Donnell wrote:
> On 16 June 2017 at 22:00, Jiri Gaisler <j...@gaisler.se> wrote:
>> Hi Cillian,
>>
>> the gaisler.org server is currently down due to a power problem last
>> week. I am in the Caribbean at the moment so I can't
Hi Cillian,
the gaisler.org server is currently down due to a power problem last
week. I am in the Caribbean at the moment so I can't fix it until
Tuesday next week. I suggest you skip the LEON3 patches until I fix the
server next week. Let me know if you get problems merging the patches,
and I
On 05/04/2017 04:00 PM, Joel Sherrill wrote:
On Thu, May 4, 2017 at 12:34 AM, Sebastian Huber
> wrote:
On 03/05/17 22:52, Joel Sherrill wrote:
Has anyone run the whetstone benchmark on real leon3
On 09/08/2017 03:41 PM, Sebastian Huber wrote:
> On 08/09/17 15:37, Jiri Gaisler wrote:
>
>> On 09/08/2017 02:12 PM, Sebastian Huber wrote:
>>> On 08/09/17 13:53, Sebastian Huber wrote:
>>>
>>>> Hello,
>>>>
>>>> Jiri was so kind
on details.
For bug reporting instructions, please see:
<http://www.gnu.org/software/gdb/bugs/>.
Find the GDB manual and other documentation resources online at:
<http://www.gnu.org/software/gdb/documentation/>.
For help, type "help".
Type "apropos word" to search f
On 12/05/2017 09:01 PM, Joel Sherrill wrote:
>
>
> On Tue, Dec 5, 2017 at 1:55 PM, Jiri Gaisler <j...@gaisler.se
> <mailto:j...@gaisler.se>> wrote:
>
> Building RSB installs automake-1.12.6, but RTEMS Makefile.am files
> seem
> to need (exactly)
Building RSB installs automake-1.12.6, but RTEMS Makefile.am files seem
to need (exactly) automake-1.13. On top of that, many linux systems have
1.15 installed by default. Is there a reason why RSB installs 1.12.6 and
not 1.13? And why can't we use 1.15?
Sorry if this is a dumb question, but I am
On 10/24/2017 11:16 PM, Chris Johns wrote:
> On 25/10/2017 08:08, Jiri Gaisler wrote:
>> After the latest pull, building of psxclockrealtime01 fails. Any ideas
>> why this is?
> Please add '#define TEST_INIT' to the start of init.c just like:
>
> https://git.rtems.o
After the latest pull, building of psxclockrealtime01 fails. Any ideas
why this is?
Jiri.
build log:
Making all-am in psxclockrealtime01
gmake[6]: Entering directory
'/home/jiri/src/rtems/b1/sparc-rtems4.12/c/erc32/testsuites/psxtests/psxclockrealtime01'
sparc-rtems4.12-gcc
On 02/01/2018 09:07 AM, Sebastian Huber wrote:
On 31/01/18 17:54, Joel Sherrill wrote:
Hi
Perfect timing. Just as the RSB was updated and we have built new
tools. :)
Should we bump to 8.1? I would think it makes sense if it doesn't
break anything.
Needs the SIS patch an update?
%patch
On 02/04/2018 09:59 PM, Joel Sherrill wrote:
On Feb 4, 2018 2:35 PM, "Jiri Gaisler" <j...@gaisler.se
<mailto:j...@gaisler.se>> wrote:
On 02/01/2018 09:07 AM, Sebastian Huber wrote:
On 31/01/18 17:54, Joel Sherrill wrote:
Hi
Hello Juan, I provided the patches for leon3/qemu and also sent them to the qemu list. They were not merged and I had no time to follow it up. If you would be willing to do this it would be great. Jiri.___
devel mailing list
devel@rtems.org
>From 0769cd7ba4832bfe46b2036cbd64219f5f26bc25 Mon Sep 17 00:00:00 2001
From: Sebastian Huber
Date: Sun, 23 Dec 2018 12:37:46 +0100
Subject: [PATCH 3/5] grlib: Fix inludes
---
bsps/include/grlib/ambapp.h | 2 +-
bsps/include/grlib/ambapp_bus.h | 2 +-
>From bfa21dcbacbcb36531f22f8a636aeda7af9a1fb8 Mon Sep 17 00:00:00 2001
From: Jiri Gaisler
Date: Sat, 5 Jan 2019 15:35:56 +0100
Subject: [PATCH 5/5] Add bsp riscv/grlib
---
bsps/riscv/grlib/clock/clockdrv.c | 203 +
bsps/riscv/grlib/config/grlib.cfg |
>From 9644a4432f7c2a5df88c8f424b8a57ee16b6b112 Mon Sep 17 00:00:00 2001
From: Jiri Gaisler
Date: Fri, 28 Dec 2018 11:28:39 -0400
Subject: [PATCH 4/5] Fixup grlib files to compile on RISCV
---
bsps/headers.am | 65 +++
bsps/include/grlib/apbuar
These patches moves the leon3 grlib drivers to the shared bsp driver area, and
adds a RISC-V/grlib bsp.
The grlib RISC-V bsp can be simulated on the RISC-V version of sis, and
supports SMP.
Many thanks to Sebastian who provided the patches to move the grlib drivers.
Jiri.
Could somebody take a look and approve this?
Thanks, Jiri.
Forwarded Message
Subject:Your message to devel awaits moderator approval
Date: Wed, 16 Jan 2019 14:42:32 +
From: devel-ow...@rtems.org
To: j...@gaisler.se
Your mail to 'devel' with the subject
This patch adds the RISC-V version of the sis simulator to gdb-8.2. The
SPARC build of RSB is also switched to gdb-8.2 to use the new simulator
as it provides both SPARC and RISC-V emulation.
diff --git a/rtems/config/5/rtems-sparc.bset b/rtems/config/5/rtems-sparc.bset
index 187d337..8b13625
Attached is a config file for rtems-test, that allows running the RISC-V
sis simulator like this:
rtems-test --rtems-bsp=riscv-sis riscv-rtems5/c/grlib/testsuites
Jiri.
#
# RTEMS Tools Project (http://www.rtems.org/)
# Copyright 2015 On-Line Applications Research Corporation (OAR).
# All rights
> grlib is a bit too unspecific. What about griscv?
Very clever - I like that ...!
I will rework the patch set according to the various comments - stay tuned ...
Jiri.
>
> On 16/01/2019 15:44, Jiri Gaisler wrote:
>> bsps/riscv/grlib/clock/clockdrv.c | 203 +
&g
On 1/17/19 8:04 AM, Sebastian Huber wrote:
> Hello Jiri,
>
> it would be nice if we could use the new license for this new BSP:
>
I realized that the most of my new bsp (>90%) is actually copied/tweaked from
the other riscv and leon3 bsps. I don't think it is right to change the license
since
>From 733fba37d9685e41f561cee140acf03d3d0e05d8 Mon Sep 17 00:00:00 2001
From: Jiri Gaisler
Date: Fri, 18 Jan 2019 12:44:50 +0100
Subject: [PATCH v2 0/7] Adding griscv bsp
Second take on adding a bsp for a RISC-V GRLIB cpu.
The patch is much smaller now, as I removed some redundant include f
>From 0880ccb3cc3b18fac82e4c889ffcc862892fc70e Mon Sep 17 00:00:00 2001
From: Jiri Gaisler
Date: Fri, 18 Jan 2019 11:29:08 +0100
Subject: [PATCH v2 5/7] grlib: use rtems_interrupt_handler_install() for all
interrupt handlers
---
bsps/shared/grlib/ascs/grascs.c | 7 +--
b
>From 733fba37d9685e41f561cee140acf03d3d0e05d8 Mon Sep 17 00:00:00 2001
From: Jiri Gaisler
Date: Fri, 18 Jan 2019 12:37:55 +0100
Subject: [PATCH v2 7/7] riscv: add griscv bsp
---
bsps/headers.am | 1 -
bsps/riscv/griscv/clock/clockdrv.c|
>From 083d9883f82a4fece3740079038830aeaa411025 Mon Sep 17 00:00:00 2001
From: Jiri Gaisler
Date: Thu, 17 Jan 2019 22:20:26 +0100
Subject: [PATCH v2 3/7] grlib: Fix inludes
---
bsps/headers.am | 65 +++
bsps/include/grlib/ambap
>From b612514622c579910bfd30c2c3eec1a97be3292a Mon Sep 17 00:00:00 2001
From: Sebastian Huber
Date: Sat, 22 Dec 2018 07:13:44 +0100
Subject: [PATCH v2 1/7] grlib: Move header files
---
.../include/bsp => include/grlib}/ahbstat.h | 0
.../{sparc/include => include/grlib}/ambapp.h | 0
>From bd0ba3cc2c624baa56446acd684f82f1c15c1b04 Mon Sep 17 00:00:00 2001
From: Sebastian Huber
Date: Sat, 22 Dec 2018 18:31:04 +0100
Subject: [PATCH v2 2/7] grlib: Move source files
---
bsps/shared/grlib-sources.am | 67 +++
.../shared => shared/grlib}/1553/b1553brm.c
>From 02c67c905e4ed02678ee8efc6d9e6cbc946fdf77 Mon Sep 17 00:00:00 2001
From: Jiri Gaisler
Date: Fri, 18 Jan 2019 11:32:28 +0100
Subject: [PATCH v2 6/7] grlib: use cpu-independent routines for uncached
access
---
bsps/include/grlib/grlib_impl.h | 54 +++
b
Third take on adding a bsp for a RISC-V GRLIB cpu, taking into account
previous comments.
Jiri Gaisler (6):
grlib: Fix inludes
grlib: make apbuart driver independent of bsp
grlib: use rtems_interrupt_handler_install() for all interupt handlers
grlib: use cpu-independent routines
---
bsps/headers.am | 64 +++
bsps/include/grlib/ambapp.h | 2 +-
bsps/include/grlib/ambapp_bus.h | 2 +-
bsps/include/grlib/apbuart.h | 4 +-
bsps/include/grlib/apbuart_termios.h | 2 +-
From: Sebastian Huber
---
bsps/shared/grlib-sources.am | 67 +++
.../shared => shared/grlib}/1553/b1553brm.c | 0
.../shared => shared/grlib}/1553/b1553rt.c| 0
.../shared => shared/grlib}/1553/gr1553b.c| 0
.../shared => shared/grlib}/1553/gr1553bc.c
---
bsps/riscv/griscv/clock/clockdrv.c| 202 ++
bsps/riscv/griscv/config/griscv.cfg | 9 +
bsps/riscv/griscv/console/console.c | 162 ++
bsps/riscv/griscv/console/printk_support.c| 126 +++
bsps/riscv/griscv/headers.am
---
bsps/include/grlib/apbuart.h | 1 +
bsps/shared/grlib/uart/apbuart_cons.c | 32 +--
2 files changed, 17 insertions(+), 16 deletions(-)
diff --git a/bsps/include/grlib/apbuart.h b/bsps/include/grlib/apbuart.h
index d30ad0bcef..6a89bb949a 100644
---
---
bsps/shared/grlib/ascs/grascs.c | 7 +--
bsps/shared/grlib/can/satcan.c | 6 --
bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c | 7 ---
bsps/shared/grlib/slink/grslink.c | 7 +--
4 files changed, 18 insertions(+), 9 deletions(-)
diff --git
---
bsps/include/grlib/grlib_impl.h | 52 +++
bsps/shared/grlib/1553/b1553brm.c | 10 +---
bsps/shared/grlib/1553/b1553rt.c | 11 +---
bsps/shared/grlib/can/grcan.c | 27 ++
bsps/shared/grlib/pci/grpci2dma.c
---
bsps/shared/grlib/spw/grspw.c | 6 +++---
bsps/sparc/leon2/include/bsp.h| 2 +-
bsps/sparc/leon2/start/bspstart.c | 4 ++--
bsps/sparc/leon3/include/bsp.h| 2 +-
bsps/sparc/leon3/start/bspstart.c | 4 ++--
5 files changed, 9 insertions(+), 9 deletions(-)
diff --git
From: Sebastian Huber
---
.../include/bsp => include/grlib}/ahbstat.h | 0
.../{sparc/include => include/grlib}/ambapp.h | 0
.../drvmgr => include/grlib}/ambapp_bus.h | 0
.../grlib}/ambapp_bus_grlib.h | 0
.../include => include/grlib}/ambapp_ids.h| 0
---
bsps/include/grlib/grlib_impl.h | 52 +++
bsps/shared/grlib/1553/b1553brm.c | 10 +---
bsps/shared/grlib/1553/b1553rt.c | 11 +---
bsps/shared/grlib/can/grcan.c | 27 ++
bsps/shared/grlib/pci/grpci2dma.c
---
bsps/riscv/griscv/clock/clockdrv.c| 202 ++
bsps/riscv/griscv/config/griscv.cfg | 9 +
bsps/riscv/griscv/console/console.c | 162 ++
bsps/riscv/griscv/console/printk_support.c| 126 +++
bsps/riscv/griscv/headers.am
---
bsps/include/grlib/apbuart.h | 1 +
bsps/shared/grlib/uart/apbuart_cons.c | 32 +--
2 files changed, 17 insertions(+), 16 deletions(-)
diff --git a/bsps/include/grlib/apbuart.h b/bsps/include/grlib/apbuart.h
index d30ad0bcef..6a89bb949a 100644
---
From: Sebastian Huber
---
bsps/shared/grlib-sources.am | 67 +++
.../shared => shared/grlib}/1553/b1553brm.c | 0
.../shared => shared/grlib}/1553/b1553rt.c| 0
.../shared => shared/grlib}/1553/gr1553b.c| 0
.../shared => shared/grlib}/1553/gr1553bc.c
---
bsps/headers.am | 64 +++
bsps/include/grlib/ambapp.h | 2 +-
bsps/include/grlib/ambapp_bus.h | 2 +-
bsps/include/grlib/apbuart.h | 4 +-
bsps/include/grlib/apbuart_termios.h | 2 +-
---
bsps/shared/grlib/ascs/grascs.c | 7 +--
bsps/shared/grlib/can/satcan.c | 6 --
bsps/shared/grlib/drvmgr/ambapp_bus_grlib.c | 7 ---
bsps/shared/grlib/slink/grslink.c | 7 +--
4 files changed, 18 insertions(+), 9 deletions(-)
diff --git
---
bsps/shared/grlib/spw/grspw.c | 6 +++---
bsps/sparc/leon2/include/bsp.h| 2 +-
bsps/sparc/leon2/start/bspstart.c | 4 ++--
bsps/sparc/leon3/include/bsp.h| 2 +-
bsps/sparc/leon3/start/bspstart.c | 4 ++--
5 files changed, 9 insertions(+), 9 deletions(-)
diff --git
Third take on adding a bsp for a RISC-V GRLIB cpu, taking into account
previous comments.
Resending - it seems that some parts were lost in the previous batch.
Jiri Gaisler (6):
grlib: Fix inludes
grlib: make apbuart driver independent of bsp
grlib: use rtems_interrupt_handler_install
From: Sebastian Huber
---
.../include/bsp => include/grlib}/ahbstat.h | 0
.../{sparc/include => include/grlib}/ambapp.h | 0
.../drvmgr => include/grlib}/ambapp_bus.h | 0
.../grlib}/ambapp_bus_grlib.h | 0
.../include => include/grlib}/ambapp_ids.h| 0
On 1/21/19 11:33 AM, Sebastian Huber wrote:
> On 21/01/2019 11:30, Jiri Gaisler wrote:
>> diff --git a/bsps/shared/grlib/spw/grspw.c
>> b/bsps/shared/grlib/spw/grspw.c
>> index fbaadd1e13..7d99831e71 100644
>> --- a/bsps/shared/grlib/spw/grspw.c
>> +++ b/bsps/sha
On 1/21/19 7:26 AM, Sebastian Huber wrote:
> On 18/01/2019 23:34, Jiri Gaisler wrote:
>> */
>> -extern int CPU_SPARC_HAS_SNOOPING;
>> +extern int GRLIB_DMA_IS_CACHE_COHERENT;
>
> I would leave the SPARC BSPs as is. Maybe someone uses this
> CPU_SPARC_HA
---
bsps/riscv/griscv/clock/clockdrv.c| 202 ++
bsps/riscv/griscv/config/griscv.cfg | 9 +
bsps/riscv/griscv/console/console.c | 162 ++
bsps/riscv/griscv/console/printk_support.c| 126 +++
bsps/riscv/griscv/headers.am
---
bsps/include/grlib/grlib_impl.h | 52 +++
bsps/shared/grlib/1553/b1553brm.c | 10 +---
bsps/shared/grlib/1553/b1553rt.c | 11 +---
bsps/shared/grlib/can/grcan.c | 27 ++
bsps/shared/grlib/pci/grpci2dma.c
---
bsps/include/grlib/grlib_impl.h | 5 +
bsps/shared/grlib/spw/grspw.c | 6 +-
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/bsps/include/grlib/grlib_impl.h b/bsps/include/grlib/grlib_impl.h
index f1260671e0..68cc292886 100644
--- a/bsps/include/grlib/grlib_impl.h
+++
---
bsps/include/grlib/apbuart.h | 1 +
bsps/shared/grlib/uart/apbuart_cons.c | 32 +--
2 files changed, 17 insertions(+), 16 deletions(-)
diff --git a/bsps/include/grlib/apbuart.h b/bsps/include/grlib/apbuart.h
index d30ad0bcef..6a89bb949a 100644
---
From: Sebastian Huber
---
bsps/shared/grlib-sources.am | 67 +++
.../shared => shared/grlib}/1553/b1553brm.c | 0
.../shared => shared/grlib}/1553/b1553rt.c| 0
.../shared => shared/grlib}/1553/gr1553b.c| 0
.../shared => shared/grlib}/1553/gr1553bc.c
Fourth take on adding a bsp for a RISC-V GRLIB cpu, taking into account
previous comments.
Jiri Gaisler (6):
grlib: Fix inludes
grlib: make apbuart driver independent of bsp
grlib: use rtems_interrupt_handler_install() for all interrupt
handlers
grlib: use cpu-independent routines
---
bsps/headers.am | 64 +++
bsps/include/grlib/ambapp.h | 2 +-
bsps/include/grlib/ambapp_bus.h | 2 +-
bsps/include/grlib/apbuart.h | 4 +-
bsps/include/grlib/apbuart_termios.h | 2 +-
On 1/21/19 1:11 PM, Sebastian Huber wrote:
> On 21/01/2019 12:56, Jiri Gaisler wrote:
>> On 1/21/19 11:33 AM, Sebastian Huber wrote:
>>> On 21/01/2019 11:30, Jiri Gaisler wrote:
>>>> diff --git a/bsps/shared/grlib/spw/grspw.c
>>>> b/bsps/shared/grlib/spw
I have now implemented code coverage support for both SPARC and RISC-V
in the SIS simulator. Can somebody point me to a manual or web page on
how to use covoar to produce a coverage report? I can't seem to be able
to find any relevant documentation on this. The coverage data is in TSIM
format so
On 1/23/19 9:31 PM, Jiri Gaisler wrote:
> I have now implemented code coverage support for both SPARC and RISC-V
> in the SIS simulator. Can somebody point me to a manual or web page on
> how to use covoar to produce a coverage report? I can't seem to be able
> to find any relevant d
On 12/12/18 10:26 AM, Sebastian Huber wrote:
> - Am 12. Dez 2018 um 10:01 schrieb Jiri Gaisler j...@gaisler.se:
>
>> After implementing the interrupt broadcast function, and stop telling
>> the software that there are 5 cores in the system when there really only
>> a
On 12/11/18 3:33 PM, Joel Sherrill wrote:
> The order in which threads are assigned to cores has changed since the
> first smp work. It used to be from 0 up, now from the highest core
> associated with a scheduler down. If that's the only difference, the
> screen is out of date.
Good to know,
On 12/11/18 3:47 PM, Sebastian Huber wrote:
> On 11/12/2018 15:42, Jiri Gaisler wrote:
>> On 12/11/18 3:24 PM, Sebastian Huber wrote:
>>> Hello Jiri,
>>>
>>> On 11/12/2018 15:15, Jiri Gaisler wrote:
>>>> What is the status of the smptests of
On 12/11/18 4:01 PM, Sebastian Huber wrote:
> On 11/12/2018 15:55, Jiri Gaisler wrote:
>>> Even if the screen is a guide of what to expect in some cases.
>>>
>>> How does the smp support in sis switch back and forth between the
>>> cores? Per cyc
On 12/11/18 3:24 PM, Sebastian Huber wrote:
> Hello Jiri,
>
> On 11/12/2018 15:15, Jiri Gaisler wrote:
>> What is the status of the smptests of RTEMS 5 ?
>>
>> I have added SMP capability to the sis simulator, and have tested it
>> with the smptes
> I use the SIS every day for RTEMS development and test suite runs. The
> SMP support would be a very valuable for RTEMS development. If we can
> get also code coverage from it, then it would be perfect.
I can look at the coverage support. Is there a standardized format for
coverage data that I
Hello Sebastian,
I have started to copy the basic AMBA p routines and the drivers for
irqmp and gptimer to bsps/shared/amba. The routines are somewhat
entangled with LEON3-specific code, so I have cleaned them up and made
them cpu independent. I don't intend to touch the original code under
On 12/27/18 4:25 AM, Sebastian Huber wrote:
> Hello Jiri,
>
> - Am 27. Dez 2018 um 3:16 schrieb Jiri Gaisler j...@gaisler.se:
>
>> Hello Sebastian,
>>
>> I have started to copy the basic AMBA p routines and the drivers for
>> irqmp and gptimer to bsps/shar
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