Re: [PATCH v3] aarch64/versal: Support DDRMC0 region 0 and 1

2022-07-28 Thread Chris Johns
On 28/7/2022 4:57 pm, Sebastian Huber wrote: > Hello, > > I get now linker errors: > > /opt/rtems/6/lib/gcc/aarch64-rtems6/12.1.1/../../../../aarch64-rtems6/bin/ld: > ./librtemsbsp.a(bspstartmmu.c.7.o):(.rodata.bsp_r1_region+0x0): undefined > reference to `bsp_r1_ram_base' >

Re: [PATCH v3] aarch64/versal: Support DDRMC0 region 0 and 1

2022-07-28 Thread Sebastian Huber
Hello, I get now linker errors: /opt/rtems/6/lib/gcc/aarch64-rtems6/12.1.1/../../../../aarch64-rtems6/bin/ld: ./librtemsbsp.a(bspstartmmu.c.7.o):(.rodata.bsp_r1_region+0x0): undefined reference to `bsp_r1_ram_base' /opt/rtems/6/lib/gcc/aarch64-rtems6/12.1.1/../../../../aarch64-rtems6/bin/ld:

[PATCH v3] aarch64/versal: Support DDRMC0 region 0 and 1

2022-07-26 Thread chrisj
Hi, The Versal's DDRMC0 supports two separate regions. Region 0 is from 0 up to 2G where the Versal's hard IP regions start. DDR memory above the 2G mark is moved to region 1 and its base address is in the A64 address space. The patch will place all memory up to 2G in region 0 and if more is