Tomasz,
On Thu, Jul 31, 2014 at 12:40 PM, Tomasz Figa wrote:
> Andreas,
>
> On 31.07.2014 21:20, Andreas Färber wrote:
>> Am 31.07.2014 21:05, schrieb Tomasz Figa:
>>> On 31.07.2014 18:08, Andreas Färber wrote:
Adds initial support for the HP Chromebook 11.
>>>
>>> [snip]
>>>
+ gpio-k
Heiko,
On Fri, Aug 1, 2014 at 2:17 AM, Heiko Stübner wrote:
> Am Donnerstag, 31. Juli 2014, 15:49:35 schrieb Doug Anderson:
>> The EHCI and HSIC device tree nodes were added in the wrong place.
>> Fix them.
>>
>> Signed-off-by: Doug Anderson
>> Signed-off-by: Kever Yang
>
> hmm, not sure if thi
Andreas,
On Fri, Aug 1, 2014 at 2:10 PM, Andreas Färber wrote:
> Hi Doug,
>
> Am 01.08.2014 22:28, schrieb Doug Anderson:
>> On Thu, Jul 31, 2014 at 9:54 PM, Andreas Färber wrote:
>>> exynos5250-cros-common.dtsi had an empty /chosen node.
>>> Fill in exemplary boot arguments.
>>>
>>> Signed-off-
Hi,
On Fri, Aug 1, 2014 at 7:34 PM, Javier Martinez Canillas
wrote:
> Hello Andreas
>
> On 08/02/2014 02:52 AM, Andreas Färber wrote:
>>
>> Based on the preinstalled 3.8 based ChromeOS kernel and previous 3.15
>> based attempts by Stephan and me that broke for 3.16, I've prepared a
>> device tree
Andreas,
On Fri, Aug 1, 2014 at 5:52 PM, Andreas Färber wrote:
> Use the new style of referencing inherited nodes and use symbolic names.
> Reorder one pinctrl node in GPIO order.
>
> Goal is the alignment of all exynos5250 based device trees for comparison.
>
> Suggested-by: Doug Anderson
> Rev
Andreas,
On Fri, Aug 1, 2014 at 5:52 PM, Andreas Färber wrote:
> Allows them to be extended by reference.
>
> Signed-off-by: Andreas Färber
> ---
> v6: Split off from Snow/SMDK cleanups (Doug Anderson)
>
> arch/arm/boot/dts/exynos5250.dtsi | 24
> 1 file changed, 12 in
Hello Andreas
On 08/02/2014 02:52 AM, Andreas Färber wrote:
>
> Based on the preinstalled 3.8 based ChromeOS kernel and previous 3.15
> based attempts by Stephan and me that broke for 3.16, I've prepared a
> device tree for the HP Chromebook 11 aka Google Spring.
>
> v6 renames a node and reve
Hello Andreas,
Sorry for missing your v5.
On 08/02/2014 02:52 AM, Andreas Färber wrote:
>
> chosen {
> + bootargs = "console=tty1";
> };
While I agree with you that having a chosen node with a default bootargs is
better than having an empty one, I second Doug that this
On Wed, Jul 30, 2014 at 11:46:07AM +0100, Mark Brown wrote:
> On Wed, Jul 30, 2014 at 12:45:00AM -0700, Brian Norris wrote:
> > On Wed, Jul 30, 2014 at 02:44:13PM +0800, Huang Shijie wrote:
> > > IMHO, the DDR modes can _NOT_ be handled by the driver/spi/*.
>
> > I agree to some extent, but I want
Allows them to be extended by reference.
Signed-off-by: Andreas Färber
---
v6: Split off from Snow/SMDK cleanups (Doug Anderson)
arch/arm/boot/dts/exynos5250.dtsi | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b
exynos5250-cros-common.dtsi was meant for sharing common pieces across
ChromeOS devices. This turned out premature, as several devices ended up
in the common file that are not common after all. Since the remaining
common ChromeOS pieces are fairly minor, exynos5250-cros-common.dtsi
was requested t
Use the new style of referencing inherited nodes and use symbolic names.
Reorder one pinctrl node in GPIO order.
Goal is the alignment of all exynos5250 based device trees for comparison.
Suggested-by: Doug Anderson
Reviewed-by: Doug Anderson
Signed-off-by: Andreas Färber
---
v5 -> v6:
* Spl
exynos5250-cros-common.dtsi had an empty /chosen node.
Fill in exemplary boot arguments.
Reviewed-by: Tomasz Figa
Signed-off-by: Andreas Färber
---
v5 -> v6: Unchanged
v5: New
Cleanup for /chosen node moved into -snow.dts.
arch/arm/boot/dts/exynos5250-snow.dts | 1 +
1 file changed, 1 inse
Use the new style of referencing inherited nodes, use symbolic names,
tidy indentation and reorder includes.
Goal is the alignment of all exynos5250 based device trees for comparison.
Signed-off-by: Andreas Färber
---
v5 -> v6:
* Updated for mfc node label
v5: New
Aligns with SMDK.
arch/
The GPIO flag 2 has no constant assigned, so this was probably active-low.
Reviewed-by: Tomasz Figa
Signed-off-by: Andreas Färber
---
v5 -> v6: Unchanged
v5: New
Spotted during cleanup.
arch/arm/boot/dts/exynos5250-arndale.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --
Use the new style for referencing inherited nodes and use symbolic names.
Goal is the alignment of all exynos5250 based device trees for comparison.
Signed-off-by: Andreas Färber
---
v5 -> v6:
* Renamed node label codec -> mfc for alignment with "add System MMU nodes"
* Rebased for leaving dp
Adds initial support for the HP Chromebook 11.
Cc: Vincent Palatin
Cc: Doug Anderson
Cc: Stephan van Schaik
Signed-off-by: Andreas Färber
---
v5 -> v6:
* Updated for mfc node label
* Reverted to dp-hpd-gpio node in pinctrl_0 (Doug Anderson)
* Fixed alphabetical order of sd1_* nodes (Doug A
There's no need for a simple-bus, place the smsc,usb3503a directly into
the root node. That's what we're going to do on exynos5250-spring.
Reported-by: Tomasz Figa
Reviewed-by: Tomasz Figa
Signed-off-by: Andreas Färber
---
v5 -> v6: Unchanged
v5: New
Aligns with Spring's new USB3503 node.
The pinctrl properties should be on the device directly and not on the
slot sub-node.
Reported-by: Doug Anderson
Cc: Jaehoon Chung
Reviewed-by: Tomasz Figa
Reviewed-by: Doug Anderson
Signed-off-by: Andreas Färber
---
v3 -> v4 -> v5 -> v6: Unchanged
v3: New (Doug Anderson)
Redundant with
Hello,
Based on the preinstalled 3.8 based ChromeOS kernel and previous 3.15
based attempts by Stephan and me that broke for 3.16, I've prepared a
device tree for the HP Chromebook 11 aka Google Spring.
v6 renames a node and reverts dp_hpd.
Not yet enabled are trackpad, Wifi and sound.
My reb
On Fri 2014-08-01 17:28:38, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> Add basic sysfs interface. Only exports two files:
>
> /sys/class/fpga_manager/fpga0/name
>Name of low level driver.
>
> /sys/class/fpga_manager/fpga0/status
>status of fpga framework as returned by co
Hi!
> Here's a simple example. Start with:
> * the altera-gpio driver built in to the kernel but not in the
> device tree.
> * raw fpga image at /lib/firmware/soc_system.rbf
> * Load appropriate device tree overlay in configfs by doing
> $ mkdir /config/device-tree/overlays/1
> $
Hi!
> + nr = ida_simple_get(&fpga_mgr_ida, start, FPGA_MAX_MINORS, GFP_KERNEL);
> +
Actually, are you sure ida framework is a good idea here? AFAICT, you
only use it to keep track of used minors.
pavel
--
(english) http://www.
Hi!
> +static int fpga_mgr_get_new_minor(struct fpga_manager *mgr, int request_nr)
> +{
> + int nr, start;
> +
> + /* check specified minor number */
> + if (request_nr >= FPGA_MAX_MINORS) {
> + dev_err(mgr->parent, "Out of device minors (%d)\n", request_nr);
> +
Define the Henninger board dependent part of the VIN0 device node. Add the
device node for Analog Devices ADV7180 video decoder to I2C2 bus. Add the
necessary subnodes to interconnect VIN0 and ADV7180 devices.
Signed-off-by: Sergei Shtylyov
---
Changes in version 2:
- refreshed the patch.
arc
Define the generic R8A7791 parts of the VIN[0-2] device nodes. Add aliases for
the VIN[0-2] device nodes.
Signed-off-by: Sergei Shtylyov
---
Changes in version 2:
- fixed the "compatible" properties;
- refreshed the patch.
arch/arm/boot/dts/r8a7791.dtsi | 27 +++
1 f
Hello.
Here's the set of 2 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-v3.16-rc7-20140731v2' tag. Here we add the VIN and ADV7180 video
decoder device tree support on the R8A7791/Henninger board. The patchset
requires Ben Dooks' 'rcar_vin' and 'soc_camera' DT support patch
From: Alan Tull
This driver allows programming the fpga from
device tree overlays.
This code is dependent on Pantelis Antoniou's current
work on Device Tree overlays, a method of dynamically
altering the kerel's live Device Tree. This patchset
was tested with Pantelis's and Grant Likely's stuff
From: Alan Tull
Add basic sysfs interface. Only exports two files:
/sys/class/fpga_manager/fpga0/name
Name of low level driver.
/sys/class/fpga_manager/fpga0/status
status of fpga framework as returned by core
fpga-mgr.c's fpga_mgr_ops_framework_status
function or by the low level
From: Alan Tull
This core exports methods of doing operations on FPGAs.
EXPORT_SYMBOL_GPL(fpga_mgr_write);
Write FPGA given a buffer and count.
EXPORT_SYMBOL_GPL(fpga_mgr_firmware_write);
Request firmware and write that to a fpga
EXPORT_SYMBOL_GPL(fpga_mgr_status_get);
Get a status strin
From: Alan Tull
[resend with fixed email settings]
The idea of the framework is to provide consistent ways of
programming raw images into FPGA's.
Programming from device tree overlays is supported.
The core (fpga-mgr.c) does not include a userspace interface
and just exports kernel functions.
On 08/01/2014 03:13 AM, Lee Jones wrote:
On Thu, 31 Jul 2014, Thor Thayer wrote:
On 07/31/2014 03:26 AM, Lee Jones wrote:
On Wed, 30 Jul 2014, ttha...@opensource.altera.com wrote:
From: Thor Thayer
Add a simple MFD for the Altera SDRAM Controller.
Signed-off-by: Alan Tull
Signed-off-by:
Hi Doug,
Am 01.08.2014 22:28, schrieb Doug Anderson:
> On Thu, Jul 31, 2014 at 9:54 PM, Andreas Färber wrote:
>> exynos5250-cros-common.dtsi had an empty /chosen node.
>> Fill in exemplary boot arguments.
>>
>> Signed-off-by: Andreas Färber
>> ---
>> v5: New
>> Cleanup for /chosen node moved i
Hi Andreas,
On 01.08.2014 06:54, Andreas Färber wrote:
> Hello,
>
> Based on the preinstalled 3.8 based ChromeOS kernel and previous 3.15
> based attempts by Stephan and me that broke for 3.16, I've prepared a
> device tree for the HP Chromebook 11 aka Google Spring.
>
> v5 cleans up a regulat
Hi Vinod,
On Fri, 1 Aug 2014, Vinod Koul wrote:
> On Thu, Jul 31, 2014 at 03:42:44PM +0200, Guennadi Liakhovetski wrote:
> > Ok. This doesn't seem to progress. You suggested in your previous mail,
> > that I can provide an incremental patch to add devm_free(_threaded)_irq()
> > and synchronize_
Just wanted to report one issue unrelated to your changes I spotted
while reviewing this patch. See below.
On 01.08.2014 06:54, Andreas Färber wrote:
> Use the new style of referencing inherited nodes, use symbolic names,
> tidy indentation and reorder includes.
>
> Goal is the alignment of all e
On 01.08.2014 22:54, Andreas Färber wrote:
> Doug,
>
> Am 01.08.2014 22:33, schrieb Doug Anderson:
>> On Thu, Jul 31, 2014 at 9:54 PM, Andreas Färber wrote:
>>> Spring uses a different GPIO, so this is not a generic SoC piece.
>>>
>>> Suggested-by: Tomasz Figa
>>> Signed-off-by: Andreas Färber
Doug,
Am 01.08.2014 22:33, schrieb Doug Anderson:
> On Thu, Jul 31, 2014 at 9:54 PM, Andreas Färber wrote:
>> Spring uses a different GPIO, so this is not a generic SoC piece.
>>
>> Suggested-by: Tomasz Figa
>> Signed-off-by: Andreas Färber
>> ---
>> v5: New (Tomasz Figa)
>> Frees dp_hpd for
Am 01.08.2014 22:24, schrieb Doug Anderson:
> Andreas,
>
> On Thu, Jul 31, 2014 at 9:54 PM, Andreas Färber wrote:
>> Use the new style of referencing inherited nodes and use symbolic names.
>> Reorder one pinctrl node in GPIO order.
>>
>> Goal is the alignment of all exynos5250 based device trees
Andreas,
On Thu, Jul 31, 2014 at 9:54 PM, Andreas Färber wrote:
> Use the new style for referencing inherited nodes and use symbolic names.
>
> Goal is the alignment of all exynos5250 based device trees for comparison.
>
> Signed-off-by: Andreas Färber
> ---
> v5: New
> Follow-up after adding
Andreas,
On Thu, Jul 31, 2014 at 9:54 PM, Andreas Färber wrote:
> Spring uses a different GPIO, so this is not a generic SoC piece.
>
> Suggested-by: Tomasz Figa
> Signed-off-by: Andreas Färber
> ---
> v5: New (Tomasz Figa)
> Frees dp_hpd for Spring.
>
> arch/arm/boot/dts/exynos5250-pinctrl.
Hi,
On Thu, Jul 31, 2014 at 9:54 PM, Andreas Färber wrote:
> exynos5250-cros-common.dtsi had an empty /chosen node.
> Fill in exemplary boot arguments.
>
> Signed-off-by: Andreas Färber
> ---
> v5: New
> Cleanup for /chosen node moved into -snow.dts.
>
> arch/arm/boot/dts/exynos5250-snow.dts
Andreas,
On Thu, Jul 31, 2014 at 9:54 PM, Andreas Färber wrote:
> Use the new style of referencing inherited nodes and use symbolic names.
> Reorder one pinctrl node in GPIO order.
>
> Goal is the alignment of all exynos5250 based device trees for comparison.
>
> Suggested-by: Doug Anderson
> Si
On Fri, Aug 01, 2014 at 12:29:11PM -0700, Florian Fainelli wrote:
> Hello,
>
> 2014-08-01 7:33 GMT-07:00 Rob Herring :
> > On Wed, Jul 30, 2014 at 9:23 PM, Brian Norris
> > wrote:
> >> Hi Rob,
> >>
> >> I appreciate your comments, but where were many of these 5 months ago on
> >> the first 7 revi
Hello,
2014-08-01 7:33 GMT-07:00 Rob Herring :
> On Wed, Jul 30, 2014 at 9:23 PM, Brian Norris
> wrote:
>> Hi Rob,
>>
>> I appreciate your comments, but where were many of these 5 months ago on
>> the first 7 revisions? :)
>
> Sorry, but that is the nature of upstreaming. But given some of the
>
On Fri, Aug 01, 2014 at 06:02:45PM +0530, Jassi Brar wrote:
> +Optional property:
> +- mbox-names: List of identifier strings for each mailbox channel
> + required by the client. The use of this property
> + is discouraged in favor of using index in list of
> +
On Fri, Aug 01, 2014 at 06:01:36PM +0530, Jassi Brar wrote:
> Introduce common framework for client/protocol drivers and
> controller drivers of Inter-Processor-Communication (IPC).
>
> Client driver developers should have a look at
> include/linux/mailbox_client.h to understand the part of
> the
On Fri, Aug 01, 2014 at 06:00:57PM +0530, Jassi Brar wrote:
> From: Suman Anna
>
> The patch 30058677 "ARM / highbank: add support for pl320 IPC"
> added a pl320 IPC specific header file as a generic mailbox.h.
> This file has been renamed appropriately to allow the
> introduction of the generic
On Fri, Aug 01, 2014 at 05:59:54PM +0530, Jassi Brar wrote:
> Hello,
> Here's v10. Not much different from v9. The code and the generic
> bindings looked good enough to relevant gods, but the patchset still
> needs some formal loving in the form of Acked-by's.
>
> Changes since v9:
> o Purely co
On Fri, Aug 01, 2014 at 07:40:32PM +0300, Grygorii Strashko wrote:
> From: Murali Karicheri
>
> Currently driver supports only configuration of GPIO CS through
> platform data. This patch enhances the driver to configure GPIO
> CS through DT. Also update the DT binding documentation to
> reflect
On Fri, Aug 01, 2014 at 06:04:11PM +0100, Robert Richter wrote:
> Mark,
Hi Robert,
> On 31.07.14 12:33:01, Mark Rutland wrote:
> > On Thu, Jul 31, 2014 at 12:12:33PM +0100, Ganapatrao Kulkarni wrote:
> > >We mark RAM used by ATF as secure-RAM, however we don't support
> > >secure/non-secu
On 08/01/2014 08:35 PM, Mark Brown wrote:
> On Fri, Aug 01, 2014 at 07:40:32PM +0300, Grygorii Strashko wrote:
>> From: Murali Karicheri
>>
>> Currently driver supports only configuration of GPIO CS through
>> platform data. This patch enhances the driver to configure GPIO
>> CS through DT. Also u
On Fri, Aug 01, 2014 at 07:40:32PM +0300, Grygorii Strashko wrote:
> From: Murali Karicheri
>
> Currently driver supports only configuration of GPIO CS through
> platform data. This patch enhances the driver to configure GPIO
> CS through DT. Also update the DT binding documentation to
> reflect
This patch implements the feature to skip the PHY and clock
initialization if it is already configured by the firmware.
Signed-off-by: Loc Ho
Signed-off-by: Suman Tripathi
---
drivers/ata/ahci_xgene.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/ata/ahci_xgene.
On 08/01/2014 08:26 PM, Mark Brown wrote:
On Fri, Aug 01, 2014 at 07:40:32PM +0300, Grygorii Strashko wrote:
From: Murali Karicheri
Currently driver supports only configuration of GPIO CS through
platform data. This patch enhances the driver to configure GPIO
CS through DT. Also update the DT
The value of the csr-mask of the SATA PHY clock DTS node has a
wrong value resulting a kernel panic as the clock/reset is not
proper for the PHY of the SATA host controller 1. This patch
fixes the correct csr-mask value of the SATA PHY clock DTS node
for the SATA Host controller 1.
As the 'ok' is
This patch set contains a couple of fixes related to APM X-Gene SATA
controller driver.
v2 Change:
1. Drop the Link down retry patch from this patch set.
v4 Change:
1. Drop the patch to fix the csr-mask in dts for PHY clock
node of SATA Host Controller 1.
2. Add the patch to correct
This patch removes the NCQ support from the APM X-Gene SoC AHCI
Host Controller driver as it doesn't support it.
Signed-off-by: Loc Ho
Signed-off-by: Suman Tripathi
---
drivers/ata/ahci_xgene.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/ata/ahci_xgene.c b/dr
On Fri, Aug 01, 2014 at 07:40:32PM +0300, Grygorii Strashko wrote:
> From: Murali Karicheri
>
> Currently driver supports only configuration of GPIO CS through
> platform data. This patch enhances the driver to configure GPIO
> CS through DT. Also update the DT binding documentation to
> reflect
On Fri, Aug 01 2014 at 5:29:40 pm BST, Suravee Suthikulanit
wrote:
> On 8/1/2014 10:42 AM, Suravee Suthikulanit wrote:
+#ifdef CONFIG_SMP
+ .irq_set_affinity = gic_set_affinity,
+#endif
+#ifdef CONFIG_PM
+ .irq_set_wake = gic_set_wake,
+#
Mark,
On 31.07.14 12:33:01, Mark Rutland wrote:
> On Thu, Jul 31, 2014 at 12:12:33PM +0100, Ganapatrao Kulkarni wrote:
> >We mark RAM used by ATF as secure-RAM, however we don't support
> >secure/non-secure address aliasing.
> >i.e, a DRAM address that can be referenced from both a sec
Hi,
Am 01.08.2014 18:24, schrieb Ajay Kumar:
> Add DT nodes for panel-simple "auo,b133htn01" panel.
> Add backlight enable pin and backlight power supply for pwm-backlight.
> Also add panel phandle needed by dp to enable display on peach_pi.
>
> Signed-off-by: Ajay Kumar
> ---
> Changes since V1
On 8/1/2014 10:42 AM, Suravee Suthikulanit wrote:
+#ifdef CONFIG_SMP
+ .irq_set_affinity = gic_set_affinity,
+#endif
+#ifdef CONFIG_PM
+ .irq_set_wake = gic_set_wake,
+#endif
+};
+
+#ifdef CONFIG_OF
+static int __init
+gicv2m_of_init(struct device_node *node, struct de
Andreas,
On Thu, Jul 31, 2014 at 9:54 PM, Andreas Färber wrote:
> exynos5250-cros-common.dtsi was meant for sharing common pieces across
> ChromeOS devices. This turned out premature, as several devices ended up
> in the common file that are not common after all. Since the remaining
> common Chro
Hi Mark,
On 08/01/2014 06:28 PM, Grygorii Strashko wrote:
> Hi Mark,
> On 07/31/2014 10:35 PM, Mark Brown wrote:
>> On Thu, Jul 31, 2014 at 08:33:15PM +0300, Grygorii Strashko wrote:
>>
>>> + if (np && master->cs_gpios != NULL && spi->cs_gpio >= 0) {
>>> + /* SPI core parse and update
On Thu, Jul 31, 2014 at 03:42:44PM +0200, Guennadi Liakhovetski wrote:
> Ok. This doesn't seem to progress. You suggested in your previous mail,
> that I can provide an incremental patch to add devm_free(_threaded)_irq()
> and synchronize_irq() to .release(). I still think, that this doesn't make
+Kukjin
On Fri, Aug 1, 2014 at 9:54 PM, Ajay Kumar wrote:
> Add DT nodes for panel-simple "auo,b133htn01" panel.
> Add backlight enable pin and backlight power supply for pwm-backlight.
> Also add panel phandle needed by dp to enable display on peach_pi.
>
> Signed-off-by: Ajay Kumar
> ---
> Cha
Add DT nodes for panel-simple "auo,b133htn01" panel.
Add backlight enable pin and backlight power supply for pwm-backlight.
Also add panel phandle needed by dp to enable display on peach_pi.
Signed-off-by: Ajay Kumar
---
Changes since V1:
Remove "simple-panel" compatible string and use only ""auo
Hi,
On Thu, Jul 31, 2014 at 9:54 PM, Andreas Färber wrote:
> The pinctrl properties should be on the device directly and not on the
> slot sub-node.
>
> Reported-by: Doug Anderson
> Cc: Jaehoon Chung
> Reviewed-by: Tomasz Figa
> Signed-off-by: Andreas Färber
Let's land this one before Jaehoo
Olof,
On 30.07.14 11:14:23, Olof Johansson wrote:
> On Wed, Jul 30, 2014 at 8:06 AM, Robert Richter wrote:
> > From: Radha Mohan Chintakuntla
> >
> > Add initial device tree nodes for Cavium Thunder SoCs with support of
> > 48 cores and gicv3. The dts file requires further changes, esp. for
> >
On 8/1/2014 9:51 AM, Marc Zyngier wrote:
Hi Suravee,
On 01/08/14 15:36, Suravee Suthikulanit wrote:
On 7/30/2014 10:16 AM, Marc Zyngier wrote:
Why do we need this complexity at all? Is there any case where we'd want
to limit ourselves to a single vector for MSI?
I think the ARM64 GICv2m shou
On Fri, Jul 25, 2014 at 02:42:31PM -0700, Mike Turquette wrote:
> Quoting Sylwester Nawrocki (2014-07-03 10:25:53)
> > On 18/06/14 17:29, Sylwester Nawrocki wrote:
> > > This patch adds helper functions to configure clock parents and rates
> > > as specified through 'assigned-clock-parents', 'assig
On Fri, Aug 01 2014 at 4:42:26 pm BST, Suravee Suthikulanit
wrote:
> On 7/30/2014 9:57 AM, Marc Zyngier wrote:
>> On Thu, Jul 10 2014 at 12:05:03 am BST, "suravee.suthikulpa...@amd.com"
>> wrote:
>>
>> Hi Suravee,
>>
>>> From: Suravee Suthikulpanit
>>>
> >> ..
> >>
>>> - first region i
Rework Davinci SPI driver to store GPIO CS number in cs_gpio field
of SPI device structure (spi_device) for both DT and non-DT cases.
This will make Davinci SPI driver code simpler and allows to reuse
more SPI core functionality.
Signed-off-by: Grygorii Strashko
---
drivers/spi/spi-davinci.c |
From: Murali Karicheri
Currently driver supports only configuration of GPIO CS through
platform data. This patch enhances the driver to configure GPIO
CS through DT. Also update the DT binding documentation to
reflect the availability of cs-gpios.
Signed-off-by: Murali Karicheri
Signed-off-by:
This small series enables GPIO chip select feature for Davinci SPI
when DT-boot mode is used.
This is actual for Keystone 2 which supports DT-boot mode only.
Changes in v2:
- gpio_request_one() is used
- as suggested by Mark Brown, new patch has been added which updates
Davinci SPI driver to use
On 7/30/2014 9:57 AM, Marc Zyngier wrote:
On Thu, Jul 10 2014 at 12:05:03 am BST, "suravee.suthikulpa...@amd.com"
wrote:
Hi Suravee,
From: Suravee Suthikulpanit
>> ..
>>
- first region is the GIC distributor register base and size. The 2nd region is
- the GIC cpu interface register
Ajay,
Am 01.08.2014 09:02, schrieb Ajay kumar:
> On Thu, Jul 31, 2014 at 7:52 PM, Andreas Färber wrote:
>> Am 31.07.2014 12:23, schrieb Thierry Reding:
>>> On Thu, Jul 31, 2014 at 10:57:55AM +0200, Andreas Färber wrote:
Am 31.07.2014 10:38, schrieb Ajay kumar:
> With just the spring-brid
Hi Suravee,
On 01/08/14 15:36, Suravee Suthikulanit wrote:
> On 7/30/2014 10:16 AM, Marc Zyngier wrote:
>> Why do we need this complexity at all? Is there any case where we'd want
>> to limit ourselves to a single vector for MSI?
>
> I think the ARM64 GICv2m should not be the limitation for the d
Hi Mark,
On 07/31/2014 10:35 PM, Mark Brown wrote:
> On Thu, Jul 31, 2014 at 08:33:15PM +0300, Grygorii Strashko wrote:
>
>> +if (np && master->cs_gpios != NULL && spi->cs_gpio >= 0) {
>> +/* SPI core parse and update master->cs_gpio */
>> gpio_chipsel = true;
>> +
This patch adds support for the Cirrus Logic CS35L32 Boosted Amplifier
I2S output provides monitor data to the SOC/CODEC/DSP for speaker protection
algorithms
Changes for v2:
- Interrupt Status registers added to regmap volatile
- Use Speaker for volume control name
- Zero Cross Switch rename
- R
This patch adds device tree bindings file for the Cirrus Logic CS35L32
Changes for v2:
- Remove Gain Manager from DT and move to driver kcontrol
- Add VP-Supply for regulator
Signed-off-by: Brian Austin
---
.../devicetree/bindings/sound/cs35l32.txt | 62
1 file c
Hello Mark,
thank you for your advice. I figured out what I did wrong now.
And my function has "bt" in its name and not "dt". So, don't worry, I don't
mess with the DT there.
Greetings
Sebastian Priebe
==
CADCON
Ingenieurgesellschaft mbH & Co. KG
Gesc
On 7/30/2014 10:16 AM, Marc Zyngier wrote:
Why do we need this complexity at all? Is there any case where we'd want
to limit ourselves to a single vector for MSI?
I think the ARM64 GICv2m should not be the limitation for the devices
multiple MSI if there is no real hardware/design limitation.
On Wed, Jul 30, 2014 at 9:23 PM, Brian Norris
wrote:
> Hi Rob,
>
> I appreciate your comments, but where were many of these 5 months ago on
> the first 7 revisions? :)
Sorry, but that is the nature of upstreaming. But given some of the
issues, it is obvious the reviews were not sufficient.
> On
The pm8941 and pm8841 spmi devicetree nodes are childrens of
spmi pmic arbiter. The msm8974 SoC uses two PMIC chips
pm8941 and pm8841. Every PMIC chip has two spmi bus slave id's.
Signed-off-by: Stanimir Varbanov
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 37 +++
Document DT bindings used to describe the Qualcomm SPMI PMICs.
Signed-off-by: Stanimir Varbanov
---
.../devicetree/bindings/mfd/qcom,spmi-pmic.txt | 64
1 files changed, 64 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/qcom,spm
From: Josh Cartwright
The Qualcomm SPMI PMIC chips are components used with the
Snapdragon 800 series SoC family. This driver exists
largely as a glue mfd component, it exists to be an owner
of an SPMI regmap for children devices described in
device tree.
Signed-off-by: Josh Cartwright
Signed-
Hello all,
Changes since v3:
- rename the driver to qcom-spmi-pmic - suggested by David Collins
- spmi regmap config now initialize .fast_io to true
- added generalized comptatible string in DT binding document and driver
- I dropped the pm8921 rename patch for now, it will be subject of anoth
On Fri, Aug 01, 2014 at 02:55:42PM +0100, Priebe, Sebastian wrote:
> Hello,
>
> I want to use kernel command line parameters within my machine file.
> If I use the __setup macro I get the following build error:
> error: __setup_str_model_bt causes a section type conflict with
> myboard_dt_board_c
Hello,
I want to use kernel command line parameters within my machine file.
If I use the __setup macro I get the following build error:
error: __setup_str_model_bt causes a section type conflict with
myboard_dt_board_compat
static const char *myboard_dt_board_compat[] __initconst = {
"ve
Hi,
On Fri, Aug 01, 2014 at 03:26:34PM +0300, Tero Kristo wrote:
> >>I might have sent the wrong version as I had that same build error and
> >>fixed it localy.
> >>
> >>>it fixes the regression for me, Also now the whole series works for
> >>>me :)
> >>
> >>good to kno
From: Thierry Reding
Use "sharp" as the vendor prefix for Sharp Microelectronics in device
tree compatible strings.
Signed-off-by: Thierry Reding
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vend
On Mon, Jul 07, 2014 at 02:04:32PM +0200, Thierry Reding wrote:
> From: Thierry Reding
>
> According to Wikipedia, Innolux started out in 2003 as InnoLux Display
> Corporation and merged with Chi Mei Optoelectronics in 2006. It went by
> the name of Chimei Innolux Corporation for a while and chan
Hi,
On 08/01/2014 04:13 PM, Sergei Shtylyov wrote:
> Hello.
>
> On 08/01/2014 05:02 PM, Peter Ujfalusi wrote:
>
>>> I do. We should follow the standard consistently. Why not call the node
>>> "sound-codec"?
>
>> Well, there is _zero_ cases when the audio codec node is named as
>> "sound-cod
Hello.
On 08/01/2014 03:49 PM, Yoshihiro Shimoda wrote:
> Document the device tree bindings for the Renesas USBHS controller.
> Signed-off-by: Yoshihiro Shimoda
> ---
> .../devicetree/bindings/usb/renesas_usbhs.txt | 24
>
> 1 file changed, 24 insertions(+)
> c
External clock provider can now be used to register external clocks under
it. This is needed as the TI clock driver only registers clocks
hierarchically under clock providers, and external clocks do not belong
under any of the current ones.
Signed-off-by: Tero Kristo
---
.../devicetree/bindings/
Hi,
This patch adds possibility to register external clocks (outside the main
SoC) on TI boards through device tree. Clock sources as such include for
example twl-6030 / twl-6040 chips and variants which can be used to clock
for example audio / WLAN chips.
This patch can be queued once someone ha
Hello.
On 08/01/2014 05:02 PM, Peter Ujfalusi wrote:
I do. We should follow the standard consistently. Why not call the node
"sound-codec"?
Well, there is _zero_ cases when the audio codec node is named as
"sound-codec" in linux-next but we have wm, tlv, twl, max etc.
On 08/01/2014 03:49 PM, Sergei Shtylyov wrote:
>I do. We should follow the standard consistently. Why not call the node
> "sound-codec"?
Well, there is _zero_ cases when the audio codec node is named as
"sound-codec" in linux-next but we have wm, tlv, twl, max etc.
Yeah, there
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