On Fri, Jul 12, 2013 at 09:47:17AM -0500, Rob Herring wrote:
On Fri, May 17, 2013 at 10:20 AM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
In order to extend the current cpu nodes bindings to newer CPUs
inclusive of AArch64 and to update support for older ARM CPUs this
patch updates
On Fri, Jun 14, 2013 at 05:43:03PM +0900, Alexandre Courbot wrote:
On Thu, Jun 13, 2013 at 11:35 PM, Dave Martin dave.mar...@arm.com wrote:
diff --git a/Documentation/devicetree/bindings/arm/tegra.txt
b/Documentation/devicetree/bindings/arm/tegra.txt
index ed9c853..d59bc19 100644
On Thu, Jun 13, 2013 at 06:12:23PM +0900, Alexandre Courbot wrote:
Add basic support for booting secondary processors on Tegra devices
using the Trusted Foundations secure monitor.
Signed-off-by: Alexandre Courbot acour...@nvidia.com
---
Documentation/devicetree/bindings/arm/tegra.txt|
On Mon, Jun 10, 2013 at 05:11:15PM +0900, Alexandre Courbot wrote:
On Sat, Jun 8, 2013 at 1:33 AM, Stephen Warren swar...@wwwdotorg.org wrote:
I think we need to separate the concept of support for *a* secure
monitor, from support for a *particular* secure monitor.
Agreed. In this case,
On Mon, Jun 10, 2013 at 05:05:04PM +0900, Alexandre Courbot wrote:
On Sat, Jun 8, 2013 at 3:13 AM, Dave Martin dave.mar...@arm.com wrote:
One way to make the backend generic would be to have something like
one of the following (some syntax omitted due to laziness):
u32 __naked
On Fri, Jun 07, 2013 at 04:25:07PM +0900, Alexandre Courbot wrote:
On Thu, Jun 6, 2013 at 8:02 PM, Dave Martin dave.mar...@arm.com wrote:
+static int __attribute__((used)) __tegra_smc_stack[10];
Use __used instead of using GCC attributes directly.
+
+/*
+ * With EABI, subtype
On Thu, Jun 06, 2013 at 12:29:14PM -0600, Stephen Warren wrote:
On 06/06/2013 12:08 PM, Dave Martin wrote:
On Thu, Jun 06, 2013 at 10:44:48AM -0600, Stephen Warren wrote:
On 06/06/2013 01:28 AM, Alexandre Courbot wrote:
Boot loaders on some Tegra devices can be unlocked but do not let
On Fri, Jun 07, 2013 at 06:03:54PM +0900, Alexandre Courbot wrote:
On Fri, Jun 7, 2013 at 3:08 AM, Dave Martin dave.mar...@arm.com wrote:
I think we need to separate the concept of support for *a* secure
monitor, from support for a *particular* secure monitor.
There is no fixed set
On Thu, Jun 06, 2013 at 04:28:07PM +0900, Alexandre Courbot wrote:
Boot loaders on some Tegra devices can be unlocked but do not let the
system operate without SecureOS. SecureOS prevents access to some
registers and requires the operating system to perform certain
operations through Secure
On Thu, Jun 06, 2013 at 12:17:02PM +0200, Tomasz Figa wrote:
Hi Alex,
On Thursday 06 of June 2013 16:28:07 Alexandre Courbot wrote:
Boot loaders on some Tegra devices can be unlocked but do not let the
system operate without SecureOS. SecureOS prevents access to some
registers and
On Thu, Jun 06, 2013 at 10:44:48AM -0600, Stephen Warren wrote:
On 06/06/2013 01:28 AM, Alexandre Courbot wrote:
Boot loaders on some Tegra devices can be unlocked but do not let the
system operate without SecureOS. SecureOS prevents access to some
registers and requires the operating
On Tue, Apr 23, 2013 at 02:52:08PM +0100, Jon Medhurst (Tixy) wrote:
On Thu, 2013-04-11 at 15:47 +0100, Lorenzo Pieralisi wrote:
[...]
[...]
diff --git a/drivers/bus/arm-cci.c b/drivers/bus/arm-cci.c
+/*
+ * cci_port_control()
+ * @port = index of the port to setup
+ * @enable = if
On Wed, Apr 17, 2013 at 12:36:08PM -0400, Nicolas Pitre wrote:
On Wed, 17 Apr 2013, Stephen Warren wrote:
On 04/17/2013 10:02 AM, Nicolas Pitre wrote:
On Wed, 17 Apr 2013, Stephen Warren wrote:
On 04/17/2013 03:14 AM, Mark Rutland wrote:
Hi Stephen,
+ - enable-method
On Mon, Apr 15, 2013 at 01:26:02PM -0600, Stephen Warren wrote:
On 04/15/2013 10:13 AM, Lorenzo Pieralisi wrote:
[...]
+ - enable-method
+ Usage: required on ARM 64-bit systems, optional on ARM 32-bit
+ systems
If we define no meaningful enumerations for
. I've not
thought enough about it yet to really get my head around it.
What I really really want to avoid is implementing something for CCI and then
realize that it does not work for other components with similar requirements.
With Mark and Dave Martin we tried to come up with a solution
On Fri, Apr 12, 2013 at 12:44:58PM +0100, Lorenzo Pieralisi wrote:
On Thu, Apr 11, 2013 at 07:01:25PM +0100, Dave Martin wrote:
[...]
+===
+2 - cpu-map node
+===
+
+The ARM CPU topology
On Thu, Apr 11, 2013 at 04:50:54PM +0100, Lorenzo Pieralisi wrote:
On Thu, Apr 11, 2013 at 04:00:47PM +0100, Rob Herring wrote:
On 04/11/2013 04:12 AM, Mark Rutland wrote:
From: Lorenzo Pieralisi lorenzo.pieral...@arm.com
The advent of multi-cluster ARM systems requires a mechanism to
On Thu, Apr 11, 2013 at 12:55:20PM -0500, Rob Herring wrote:
On 04/11/2013 10:50 AM, Lorenzo Pieralisi wrote:
On Thu, Apr 11, 2013 at 04:00:47PM +0100, Rob Herring wrote:
On 04/11/2013 04:12 AM, Mark Rutland wrote:
From: Lorenzo Pieralisi lorenzo.pieral...@arm.com
[...]
On Thu, Feb 14, 2013 at 09:10:08AM +0530, Padmavathi Venna wrote:
This patch adds #dma-cells property to PL330 DMA controller
nodes for supporting generic dma dt bindings on samsung
exynos5250 platform.
Can you comment on the following thread?
On Fri, Feb 15, 2013 at 05:52:06PM +, Dave Martin wrote:
On Fri, Feb 15, 2013 at 05:21:02PM +, Lorenzo Pieralisi wrote:
Hi all,
in order to come up with a solid solution to the affinity bindings concept
we are facing in the ARM world, I am posting this RFC so that hopefully
On Fri, Feb 15, 2013 at 05:21:02PM +, Lorenzo Pieralisi wrote:
Hi all,
in order to come up with a solid solution to the affinity bindings concept
we are facing in the ARM world, I am posting this RFC so that hopefully people
on the list can chime in and help us in this endeavour.
I
On Mon, Jan 28, 2013 at 09:02:40AM +, Mark Rutland wrote:
On Fri, Jan 25, 2013 at 07:15:48PM +, Kukjin Kim wrote:
Tomasz Figa wrote:
[...]
Well, the number of CPU types does not grow rapidly. It will be much
less than one per SoC -- so keeping the list up to date
On Mon, Jan 14, 2013 at 03:05:32PM +, Lorenzo Pieralisi wrote:
On Mon, Jan 14, 2013 at 02:48:41PM +, Mark Rutland wrote:
Hello,
This all looks good. I just have a couple of comments about the cpus node.
On Sun, Jan 13, 2013 at 01:10:57AM +, Tomasz Figa wrote:
This patch
On Thu, Jan 10, 2013 at 11:48:27AM +, Lorenzo Pieralisi wrote:
Since the introduction of /cpu nodes bindings for ARM and the
corresponding parse function arm_dt_init_cpu_maps(), the cpu_logical_map
and the number of possible CPUs are set according to the DT /cpu
nodes entries. Currently
On Fri, Nov 09, 2012 at 02:34:11PM +, Lorenzo Pieralisi wrote:
When booting through a device tree, the kernel cpu logical id map can be
initialized using device tree data passed by FW or through an embedded blob.
This patch adds a function that parses device tree cpu nodes and
retrieves
On Fri, Sep 28, 2012 at 06:15:53PM +0100, Lorenzo Pieralisi wrote:
On Fri, Sep 28, 2012 at 04:57:46PM +0100, Dave Martin wrote:
[ Note: please aim to CC devicetree-discuss@lists.ozlabs.org with any
patches or bindings relevant to device tree. ]
[ Lorenzo, there's a question for you
On Tue, Oct 02, 2012 at 02:44:44PM +0100, Lorenzo Pieralisi wrote:
On Tue, Oct 02, 2012 at 12:27:04PM +0100, Dave Martin wrote:
On Fri, Sep 28, 2012 at 06:15:53PM +0100, Lorenzo Pieralisi wrote:
On Fri, Sep 28, 2012 at 04:57:46PM +0100, Dave Martin wrote:
[...]
There must be a common
[ Note: please aim to CC devicetree-discuss@lists.ozlabs.org with any
patches or bindings relevant to device tree. ]
[ Lorenzo, there's a question for you further down this mail. ]
On Fri, Sep 28, 2012 at 01:28:58PM +0100, Mark Rutland wrote:
On Tue, Sep 25, 2012 at 08:08:47PM +0100, Rohit
On Wed, Sep 12, 2012 at 07:14:58PM +0100, Stefano Stabellini wrote:
On Wed, 12 Sep 2012, Stefano Stabellini wrote:
On Tue, 28 Aug 2012, Rob Herring wrote:
You should look at ePAPR 1.1 which defines hypervisor related bindings.
While it is a PPC doc, we should reuse or extend what makes
On Wed, Sep 12, 2012 at 09:34:28PM -0500, Rob Herring wrote:
On 09/12/2012 01:14 PM, Stefano Stabellini wrote:
On Wed, 12 Sep 2012, Stefano Stabellini wrote:
On Tue, 28 Aug 2012, Rob Herring wrote:
You should look at ePAPR 1.1 which defines hypervisor related bindings.
While it is a PPC
On Mon, Jul 09, 2012 at 11:27:04AM +0200, Vincent Guittot wrote:
Use cpu compatibility field and clock-frequency field of DT to
estimate the capacity of each core of the system and to update
the cpu_power field accordingly.
This patch enables to put more running tasks on big cores than
on
On Wed, Jun 20, 2012 at 10:43:34AM +0100, Will Deacon wrote:
Hi Stephen,
On Wed, Jun 20, 2012 at 02:22:14AM +0100, Stephen Boyd wrote:
On 06/18/12 07:10, Arnd Bergmann wrote:
Instead of checking for trustzone_enabled() in each place where
we call into smc, we can have a generic
On Wed, Jun 20, 2012 at 10:14:01AM -0500, Rob Herring wrote:
On 06/20/2012 05:51 AM, Dave Martin wrote:
On Wed, Jun 20, 2012 at 10:43:34AM +0100, Will Deacon wrote:
Hi Stephen,
On Wed, Jun 20, 2012 at 02:22:14AM +0100, Stephen Boyd wrote:
On 06/18/12 07:10, Arnd Bergmann wrote
On Wed, Feb 22, 2012 at 11:26:19PM +0100, Uwe Kleine-K?nig wrote:
On Wed, Feb 22, 2012 at 07:18:44PM +, Jason Cooper wrote:
Signed-off-by: Jason Cooper ja...@lakedaemon.net
/me claims prior art:
On Tue, Jan 31, 2012 at 11:20:24AM +0800, Shawn Guo wrote:
On Mon, Jan 30, 2012 at 05:46:14PM +, Dave Martin wrote:
Compiled device tree blobs shouldn't be committed in the kernel
tree, so ideally git should ignore them.
This patch will enable ignoring of any .dtb files which appear
On Tue, Jan 31, 2012 at 11:46:59AM +, Dave Martin wrote:
On Tue, Jan 31, 2012 at 11:20:24AM +0800, Shawn Guo wrote:
On Mon, Jan 30, 2012 at 05:46:14PM +, Dave Martin wrote:
Compiled device tree blobs shouldn't be committed in the kernel
tree, so ideally git should ignore them
Compiled device tree blobs shouldn't be committed in the kernel
tree, so ideally git should ignore them.
This patch will enable ignoring of any .dtb files which appear in
arch/arm/boot/
Signed-off-by: Dave Martin dave.mar...@linaro.org
---
arch/arm/boot/.gitignore |1 +
1 files changed, 1
On Thu, Jan 19, 2012 at 01:21:06PM +, Pawel Moll wrote:
Hi,
Sorry about lng delay - I've been on holiday.
On Wed, 2012-01-04 at 16:35 +, David Vrabel wrote:
On 15/12/11 14:02, Pawel Moll wrote:
This patch adds support for RS1 memory map based Versatile Express
On Fri, Jan 27, 2012 at 02:02:40PM +, Pawel Moll wrote:
On Thu, 2012-01-19 at 16:46 +, David Vrabel wrote:
__create_page_tables has only mapped the single physical
page at 0x1c09 and thus the test for the UART in the other memory
map faults.
I got to the bottom of the
On Wed, Jan 25, 2012 at 05:43:16PM +, Pawel Moll wrote:
On Thu, 2012-01-19 at 17:00 +, David Vrabel wrote:
Ok, /include/ skeleton.dtsi is gone then :-)
The problem wasn't with including skeleton.dtsi. With
CONFIG_ARM_ATAG_DTB_COMPAT the zImage decompressor modifies the appended
Compiled device tree blobs shouldn't be committed in the kernel
tree, so ideally git should ignore them.
This patch will enable ignoring of any .dtb files which appear in
arch/arm/boot/
Signed-off-by: Dave Martin dave.mar...@linaro.org
---
arch/arm/boot/.gitignore |1 +
1 files changed, 1
On Mon, Jan 09, 2012 at 11:26:38PM +, Tabi Timur-B04825 wrote:
On Wed, Sep 21, 2011 at 4:19 AM, Dave Martin dave.mar...@linaro.org wrote:
? ? ?* edid -- It should be possible to have a fairly generic binding
? ? ? ?for EDID interfaces, but none seems to exist yet. ?Discussion
On Wed, Dec 07, 2011 at 07:09:34PM +, Pawel Moll wrote:
On Wed, 2011-12-07 at 15:33 +, Dave Martin wrote:
Oh, we should select HAVE_PATA_PLATFORM in here somewhere too.
But that's not critical for this series.
It's already selected in arch/arm/Kconfig:
config ARCH_VEXPRESS
On Tue, Dec 06, 2011 at 03:43:48PM +, Pawel Moll wrote:
[...]
+/include/ vexpress-v2m.dtsi
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 56a61fb..c1cd08d 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -1,13 +1,23
On Tue, Dec 06, 2011 at 03:43:48PM +, Pawel Moll wrote:
[...]
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 56a61fb..c1cd08d 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -1,13 +1,23 @@
menu Versatile Express
On Mon, Dec 05, 2011 at 02:47:29PM -0600, Rob Herring wrote:
On 12/05/2011 02:21 PM, Anton Vorontsov wrote:
On Mon, Dec 05, 2011 at 01:16:39PM -0600, Rob Herring wrote:
[...]
At least for DT enabled platforms, we could force no irq to be 0 in
the DT irq code. Searching the dts files, I
On Mon, Dec 05, 2011 at 02:49:01PM -0500, Nicolas Pitre wrote:
[...]
Unfortunately, NO_IRQ is often not spelled NO_IRQ. It looks like the
assumption
irq 0 === no irq may be quite a lot more widespread than NO_IRQ
=== no irq.
Since there's no specific thing we can grep for
On Tue, Dec 06, 2011 at 10:46:54AM +, Russell King - ARM Linux wrote:
On Tue, Dec 06, 2011 at 09:37:09AM +, Dave Martin wrote:
To clarify, you're suggesting that the meanings of all other IRQ values
would not change initially? (i.e., we remap HW irq 0, if there is one,
to some
On Tue, Dec 06, 2011 at 11:49:52AM +, Russell King - ARM Linux wrote:
On Tue, Dec 06, 2011 at 11:37:35AM +, Dave Martin wrote:
1) All OF code and drivers should be migrating to use 0 instead of NO_IRQ
for the no-interrupt case. Code which receives irq numbers directly
from
On Sat, Dec 03, 2011 at 10:12:53AM +1100, Benjamin Herrenschmidt wrote:
On Fri, 2011-12-02 at 11:28 -0800, Linus Torvalds wrote:
On Fri, Dec 2, 2011 at 11:26 AM, Dave Martin dave.mar...@linaro.org wrote:
This is now broken on ARM where, for good or bad, NO_IRQ currently is
used
On Tue, Nov 29, 2011 at 03:11:11PM +, Pawel Moll wrote:
This patch provides hooks for DT-based tile machine implementations
and adds Device Tree description for the motherboard.
[...]
+static struct of_dev_auxdata v2m_dt_auxdata_lookup[] __initdata = {
+
On Mon, Dec 05, 2011 at 05:24:40PM +, Pawel Moll wrote:
On Thu, 2011-12-01 at 12:21 +, Dave Martin wrote:
That will work, but we should make it clear that this option does not
provide board support all by itself, maybe:
Provides common dependencies for VE platforms based
On Mon, Dec 05, 2011 at 12:40:16PM -0500, Nicolas Pitre wrote:
On Mon, 5 Dec 2011, Dave Martin wrote:
On Sat, Dec 03, 2011 at 10:12:53AM +1100, Benjamin Herrenschmidt wrote:
On Fri, 2011-12-02 at 11:28 -0800, Linus Torvalds wrote:
Don't *change* NO_IRQ to zero (that whole #define
On Mon, Dec 05, 2011 at 05:47:36PM +, Pawel Moll wrote:
On Mon, 2011-12-05 at 17:37 +, Dave Martin wrote:
I have an idea of spinning the compatible values again to get something
like that:
compatible = arm,vexpress-v2p-ca5s, arm,vexpress-cortex_a5;
compatible = arm
On Mon, Dec 05, 2011 at 01:18:30PM -0500, Nicolas Pitre wrote:
On Mon, 5 Dec 2011, Dave Martin wrote:
On Mon, Dec 05, 2011 at 12:40:16PM -0500, Nicolas Pitre wrote:
On Mon, 5 Dec 2011, Dave Martin wrote:
On Sat, Dec 03, 2011 at 10:12:53AM +1100, Benjamin Herrenschmidt wrote
On Fri, Dec 02, 2011 at 02:53:17PM +0100, Nicolas Ferre wrote:
Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
---
Error found while using those iterators in an irq controller
initialization function.
May also need protection around irq and hwirq macro variables
but those values are
On Fri, Dec 02, 2011 at 02:30:09PM +0100, Nicolas Ferre wrote:
Signed-off-by: Nicolas Ferre nicolas.fe...@atmel.com
Looks OK to me:
Acked-by: Dave Martin dave.mar...@linaro.org
---
v2: add brackets to each macro variable.
include/linux/irqdomain.h | 10 ++
1 files changed, 6
Data read direct from device tree properties will be in the device
tree's native endianness (i.e., big-endian).
This patch uses of_property_read_u32() to read the bus-width
property in host byte order instead.
Signed-off-by: Dave Martin dave.mar...@linaro.org
Acked-by: Pawel Moll pawel.m
On Thu, Nov 10, 2011 at 08:28:59PM +0400, Anton Vorontsov wrote:
Drivers should not use NO_IRQ; moreover, some architectures don't
have it nowadays. '0' is the 'no irq' case.
Signed-off-by: Anton Vorontsov cbouatmai...@gmail.com
Acked-by: Alan Cox a...@linux.intel.com
---
On Thu, Nov 10,
[expanding CC -- apologies to anyone who gets this mail twice]
On Thu, Nov 10, 2011 at 08:28:59PM +0400, Anton Vorontsov wrote:
Drivers should not use NO_IRQ; moreover, some architectures don't
have it nowadays. '0' is the 'no irq' case.
Signed-off-by: Anton Vorontsov cbouatmai...@gmail.com
On Fri, Dec 02, 2011 at 09:41:12AM -0800, Stephen Warren wrote:
Stephen Warren wrote at Thursday, December 01, 2011 9:20 AM:
Dave Martin wrote at Thursday, December 01, 2011 5:14 AM:
On Thu, Dec 01, 2011 at 11:10:50AM +, Mark Brown wrote:
On Wed, Nov 30, 2011 at 04:38:26PM -0500
On Wed, Nov 30, 2011 at 06:46:19PM +, Pawel Moll wrote:
On Wed, 2011-11-30 at 15:58 +, Dave Martin wrote:
Now that a person may fail to boot on a supported board simply due to
failing to supply a device tree, it may be a good idea to have a more
helpful panic message
On Thu, Dec 01, 2011 at 11:10:50AM +, Mark Brown wrote:
On Wed, Nov 30, 2011 at 04:38:26PM -0500, Nicolas Pitre wrote:
On Wed, 30 Nov 2011, Mark Brown wrote:
Oh, dear. Any pointers to the discussions on the u-boot side?
Certainly. Many different threads actually. Here's a few:
On Tue, Nov 29, 2011 at 05:16:59PM +, Pawel Moll wrote:
On Tue, 2011-11-29 at 17:00 +, Dave Martin wrote:
I'm trying to build... what tree are you basing on?
v3.2-rc3:
$ git log --oneline HEAD...v3.2-rc3~
3b9df1e ARM: vexpress: DT-based support for CoreTiles Express A5x2 and A9x4
On Wed, Nov 30, 2011 at 11:14:00AM +, Pawel Moll wrote:
On Wed, 2011-11-30 at 10:48 +, Dave Martin wrote:
Attached. It's just vexpress_defconfig, plus ARCH_VEXPRESS_V2P_CA5S_CA9=y
Could you try that?
8--
diff --git a/arch/arm/mach
On Tue, Nov 29, 2011 at 03:11:12PM +, Pawel Moll wrote:
This patch adds support for RS1 memory map based Versatile Express
motherboard.
[...]
+config ARCH_VEXPRESS_RS1
+ bool
+ select AUTO_ZRELADDR
+ select ARM_PATCH_PHYS_VIRT
+ help
+ RS1 VE memory map (i.a.
On Tue, Nov 29, 2011 at 03:11:11PM +, Pawel Moll wrote:
This patch provides hooks for DT-based tile machine implementations
and adds Device Tree description for the motherboard.
[...]
+config ARCH_VEXPRESS_DT
+ bool
+ select OF
+ help
+ VE platform *requiring*
On Wed, Nov 30, 2011 at 05:15:02PM +, Pawel Moll wrote:
On Wed, 2011-11-30 at 15:37 +, Dave Martin wrote:
This results in a uImage which is a bit broken if using a normal u-Boot
configured for vexpress-v2p-ca9, because the bootloader makes some
memory map assumptions, and anyway
On Tue, Nov 29, 2011 at 03:11:13PM +, Pawel Moll wrote:
This patch adds Device Trees for ARM Ltd. CoreTile Express A5x2
and CoreTile Express A9x4 used with V2M motherboard and an initial
implementation of the DT machine support (this code is separate
from the current core tile code).
On Mon, Nov 28, 2011 at 10:44:16AM +, Russell King - ARM Linux wrote:
On Fri, Nov 25, 2011 at 04:15:00PM +, Dave Martin wrote:
diff --git a/arch/arm/plat-versatile/headsmp.S
b/arch/arm/plat-versatile/headsmp.S
index d397a1f..0be2efc 100644
--- a/arch/arm/plat-versatile/headsmp.S
On Mon, Nov 28, 2011 at 10:54:22AM +, Pawel Moll wrote:
On Fri, 2011-11-25 at 16:18 +, Dave Martin wrote:
[Since this text is now stable enough to be proofread, I'll list minor
pedantic nits along with the other comments -- they aren't vital to the
meaning though
On Mon, Nov 28, 2011 at 08:25:12AM -0600, Rob Herring wrote:
On 11/23/2011 09:01 AM, Pawel Moll wrote:
Hello again,
This version of the series (hopefully) addresses all the suggestions
made by Dave, Rob and Russell.
The compatible values are specific for the tiles now and the memory
On Mon, Nov 28, 2011 at 08:25:12AM -0600, Rob Herring wrote:
On 11/23/2011 09:01 AM, Pawel Moll wrote:
Hello again,
This version of the series (hopefully) addresses all the suggestions
made by Dave, Rob and Russell.
The compatible values are specific for the tiles now and the memory
On Mon, Nov 28, 2011 at 03:09:07PM +, Pawel Moll wrote:
On Mon, 2011-11-28 at 14:57 +, Dave Martin wrote:
Oh, btw, git am reports a few whitespace errors on the last full post of
the series (v2).
Can you shove the series through checkpatch.pl and/or git am and fix any
minor
On Wed, Nov 23, 2011 at 03:01:48PM +, Pawel Moll wrote:
This patch adds Device Trees for ARM Ltd. CoreTile Express A5x2
and CoreTile Express A9x4 used with V2M motherboard and an initial
implementation of the DT machine support (this code is separate
from the current core tile code).
On Mon, Nov 28, 2011 at 05:00:02PM +, Pawel Moll wrote:
On Mon, 2011-11-28 at 16:29 +, Dave Martin wrote:
+config ARCH_VEXPRESS_V2P_CA5S_CA9
+ bool CoreTile Express A5x2 and A9x4 based platform support
+ select ARCH_VEXPRESS_RS1
+ select ARCH_VEXPRESS_DT
Shouldn't we
On Wed, Nov 23, 2011 at 03:01:45PM +, Pawel Moll wrote:
This patch gets rid of the MMIO_P2V and __MMPIO_P2V macros,
defining constant virtual base for motherboard and tile
peripherals instead.
Additionally, in preparation for the new motherboard memory
map, the motherboard peripherals
On Wed, Nov 23, 2011 at 03:01:46PM +, Pawel Moll wrote:
This patch provides hooks for DT-based tile machine implementations
and adds Device Tree description for the motherboard.
Signed-off-by: Pawel Moll pawel.m...@arm.com
---
Documentation/devicetree/bindings/arm/vexpress| 101
On Thu, Nov 17, 2011 at 01:50:13PM +, Pawel Moll wrote:
On Wed, 2011-11-16 at 17:57 +, Dave Martin wrote:
We should specify a list of all the standard aliases used by the
generic motherboard code here, since these are part of the contract
between each board-specific device
Hi Grant,
There seems to be some confusion about how to define and use compatible
strings in the device tree. The ePAPR specification doesn't seem to
spell this out. If, as is probable, this discussion has happened
already then feel free to point me to the conclusions. I don't mean
to imply
On Thu, Nov 17, 2011 at 04:05:37PM +, Russell King - ARM Linux wrote:
[...]
@@ -383,11 +412,18 @@ static struct clk_lookup v2m_lookups[] = {
},
};
+static void __init v2m_system_id(void)
+{
+ if (!system_rev)
+ system_rev = readl(v2m_sysreg_base +
On Fri, Nov 11, 2011 at 06:27:01PM +, Pawel Moll wrote:
Hello again,
I've manage to clean up the VE DT patches.
Changes since RFC:
* I think I did all the changes suggested by Rob (including
using custom clock lookups instead of auxdata - do
comment, please ;-)
* Merged CA5s
On Wed, Nov 16, 2011 at 04:16:45PM +, Pawel Moll wrote:
On Wed, 2011-11-16 at 15:35 +, Dave Martin wrote:
On Fri, Nov 11, 2011 at 06:27:02PM +, Pawel Moll wrote:
This patch gets rid of the MMIO_P2V and __MMPIO_P2V macros,
defining constant virtual base for motherboard and tile
On Wed, Nov 16, 2011 at 05:07:51PM +, Pawel Moll wrote:
On Wed, 2011-11-16 at 16:59 +, Rob Herring wrote:
It has nothing to do with taste and obviously documentation changes over
time. I'm going to start naming everything with legacy because someday
it all will be...
It's about
On Wed, Nov 16, 2011 at 05:07:51PM +, Pawel Moll wrote:
On Wed, 2011-11-16 at 16:59 +, Rob Herring wrote:
It has nothing to do with taste and obviously documentation changes over
time. I'm going to start naming everything with legacy because someday
it all will be...
It's about
On Wed, Nov 16, 2011 at 04:35:15PM +, Pawel Moll wrote:
[...]
+ - for Coretile Express A5x2 (V2P-CA5s):
+ compatible = arm,vexpress-v2p-ca5s, arm-vexpress;
+ - Coretile Express A9x4 (V2P-CA9):
+ comaptible = arm,vexpress-v2p-ca9, arm,vexpress-legacy,
arm-vexpress;
+
On Fri, Oct 21, 2011 at 09:45:29AM -0700, David Daney wrote:
On 10/21/2011 08:16 AM, Pawel Moll wrote:
This patch adds a function for finding a node in flat tree
based on an alias name. It can be used in early boot code.
Typical use case is a situation when early code needs data
from a
On Wed, Sep 21, 2011 at 07:47:32AM -1000, Mitch Bradley wrote:
On 9/21/2011 7:15 AM, Dave Martin wrote:
On Wed, Sep 21, 2011 at 11:37:54AM -0500, Rob Herring wrote:
On 09/21/2011 09:57 AM, Grant Likely wrote:
On Wed, Sep 21, 2011 at 7:24 AM, Rob Herringrobherri...@gmail.com wrote:
On 09/21
-by: Dave Martin dave.mar...@linaro.org
Acked-by: Paweł Moll pawel.m...@arm.com
---
There are some outstanding issues which need to be discussed, listed
below.
* This patch is not currently based on the GIC bindings being
discussed by Rob Herring et al. Once that discussion reaches
On Wed, Sep 21, 2011 at 10:41:49AM +0100, Pawel Moll wrote:
2. Single DT_MACHINE_START matching (the most generic) arm,vexpress
and doing (rougly) this in v2m_map_io:
of_scan_flat_dt(v2m_dt_iotable_init, NULL);
v2m_dt_iotable_init(...)
{
if (depth != 0)
On Wed, Sep 21, 2011 at 08:24:24AM -0500, Rob Herring wrote:
Dave,
On 09/21/2011 04:19 AM, Dave Martin wrote:
This patch implements initial support for booting using a flattened
device tree on the Versatile Express platform.
Eventually, it should be possible to present a single, core
On Wed, Sep 21, 2011 at 03:33:10PM +0100, Pawel Moll wrote:
OK, I'll try to propose documentation for these:
* arm,pl180
You can skip this one - I'll add the description together with the MMCI
driver bindings (it will be 180 and 181, by the way :-)
Done.
+
On Wed, Sep 21, 2011 at 5:01 PM, Pawel Moll pawel.m...@arm.com wrote:
On Wed, 2011-09-21 at 15:57 +0100, Grant Likely wrote:
On Wed, Sep 21, 2011 at 7:24 AM, Rob Herring robherri...@gmail.com wrote:
On 09/21/2011 04:19 AM, Dave Martin wrote:
* arm,amba-bus -- widely used by other
On Wed, Sep 21, 2011 at 11:37:54AM -0500, Rob Herring wrote:
On 09/21/2011 09:57 AM, Grant Likely wrote:
On Wed, Sep 21, 2011 at 7:24 AM, Rob Herring robherri...@gmail.com wrote:
On 09/21/2011 04:19 AM, Dave Martin wrote:
* arm,amba-bus -- widely used by other boards and patchsets
Hi,
On Fri, Sep 16, 2011 at 10:43 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Fri, Sep 16, 2011 at 03:38:10PM +0100, Dave Martin wrote:
This patch enables device-tree-based probing of the pata-generic
platform driver across all architectures:
[...]
This may
On Mon, Sep 19, 2011 at 11:23 AM, Pawel Moll pawel.m...@arm.com wrote:
This may not be the correct way to support the CF slot on Versatile
Express - it depends whether the CF slot on VE supports just CF
memory cards or whether it can take any CF card.
If the latter, then what may be
On Sun, Sep 18, 2011 at 7:21 AM, Grant Likely grant.lik...@secretlab.ca wrote:
On Fri, Sep 16, 2011 at 05:09:39PM +0100, Dave Martin wrote:
For now, we express the mapping by putting an interrupt-map in the
core-tile DT, but this feels inelegant as well as wasteful -- expressing
+ 32 using
with of_property_read_u32() calls.
Signed-off-by: Dave Martin dave.mar...@linaro.org
---
Tested on ARM Versatile Express, with my soon-to-be-posted device
tree support patches.
I'm not in a position to build/test this for powerpc easily --
if anyone is able to do that, it would be appreciated.
Grant, does
On Thu, Sep 15, 2011 at 12:07:25PM +0200, Cousson, Benoit wrote:
Hi Rob,
On 9/15/2011 9:55 AM, Thomas Abraham wrote:
Hi Rob,
On 14 September 2011 22:01, Rob Herringrobherri...@gmail.com wrote:
From: Rob Herringrob.herr...@calxeda.com
This adds gic initialization using device tree
with of_property_read_u32() calls.
Signed-off-by: Dave Martin dave.mar...@linaro.org
---
v2: correct sense of the check of_property_read_u32(dn, pio-mode,
pio_mode). Somehow I posted an old version of this patch, depite
having already fixed this...
Tested on ARM Versatile Express, with my soon-to-be-posted device
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