On Tue, Mar 26, 2013 at 11:06:56PM +0100, Thomas Petazzoni wrote:
> > The PCIe host driver just seems to get in the way, it has no knowledge
> > it is adding to the process.
> >
> > irqchip knows:
> > - what the physical address of the doorbell is
> > - how to construct an address that is per-c
Dear Jason Gunthorpe,
On Tue, 26 Mar 2013 15:55:46 -0600, Jason Gunthorpe wrote:
> > > FWIW, MSI-X is not restricted to 16 bits, so if you can detect from
> > > the PCI layer if it is setting up MSI or MSI-X you could allocate low
> > > bits first to MSI-X and high bits first to MSI, increasing t
On Tuesday 26 March 2013, Jason Gunthorpe wrote:
> > I'll let Arnd answer this one, but I'm pretty sure that using IRQ
> > domains is the way to go. The fact that a number of drivers don't yet
> > use IRQ domains is maybe just because they haven't been converted yet.
>
> Maybe, but they have irq d
On Tue, Mar 26, 2013 at 10:16:54PM +0100, Thomas Petazzoni wrote:
> > FWIW, MSI-X is not restricted to 16 bits, so if you can detect from
> > the PCI layer if it is setting up MSI or MSI-X you could allocate low
> > bits first to MSI-X and high bits first to MSI, increasing the number
> > of avail
On Tuesday 26 March 2013, Thomas Petazzoni wrote:
> On Tue, 26 Mar 2013 21:10:15 +, Arnd Bergmann wrote:
>
> > > To which children? Only to the main-intc children? If so,
> > > armada_370_xp_mpic_of_init() would be called with a 'device_node *'
> > > that points to the main-intc, correct? Then
Dear Arnd Bergmann,
On Tue, 26 Mar 2013 21:31:45 +, Arnd Bergmann wrote:
> On Tuesday 26 March 2013, Thomas Petazzoni wrote:
> > > FWIW, MSI-X is not restricted to 16 bits, so if you can detect from
> > > the PCI layer if it is setting up MSI or MSI-X you could allocate low
> > > bits first to
Dear Arnd Bergmann,
On Tue, 26 Mar 2013 21:15:40 +, Arnd Bergmann wrote:
> On Tuesday 26 March 2013, Thomas Petazzoni wrote:
> > + msimask = readl_relaxed(per_cpu_int_base +
> > + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS)
> > +
Dear Jason Gunthorpe,
On Tue, 26 Mar 2013 15:14:03 -0600, Jason Gunthorpe wrote:
> On Tue, Mar 26, 2013 at 09:46:13PM +0100, Thomas Petazzoni wrote:
>
> > To me, the topology of the hardware is really that a single device
> > provides two features: the main interrupt controller and the MSI
> > in
Dear Arnd Bergmann,
On Tue, 26 Mar 2013 21:10:15 +, Arnd Bergmann wrote:
> > To which children? Only to the main-intc children? If so,
> > armada_370_xp_mpic_of_init() would be called with a 'device_node *'
> > that points to the main-intc, correct? Then it would have to go back up
> > in the
On Tuesday 26 March 2013, Thomas Petazzoni wrote:
> > FWIW, MSI-X is not restricted to 16 bits, so if you can detect from
> > the PCI layer if it is setting up MSI or MSI-X you could allocate low
> > bits first to MSI-X and high bits first to MSI, increasing the number
> > of available MSI/MSI-X ve
Dear Jason Gunthorpe,
On Tue, 26 Mar 2013 12:02:45 -0600, Jason Gunthorpe wrote:
> > This commit introduces the support for the MSI interrupts in the
> > armada-370-xp interrupt controller driver. It registers an IRQ
> > domain associated with the 'msi' node in the Device Tree, which the
> > PCI
On Tuesday 26 March 2013, Thomas Petazzoni wrote:
> + msimask = readl_relaxed(per_cpu_int_base +
> + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS)
> + & PCI_MSI_DOORBELL_MASK;
> +
> + writel(~PCI_MS
On Tue, Mar 26, 2013 at 09:46:13PM +0100, Thomas Petazzoni wrote:
> To me, the topology of the hardware is really that a single device
> provides two features: the main interrupt controller and the MSI
> interrupt controller. But I will adapt to whatever DT binding you
> propose.
No.. the HW is a
On Tuesday 26 March 2013, Thomas Petazzoni wrote:
> Dear Arnd Bergmann,
>
> On Tue, 26 Mar 2013 18:38:22 +, Arnd Bergmann wrote:
>
> > > Note that both the parent and the child node need to have the
> > > 'interrupt-controller' empty property:
> > >
> > > * The interrupt-co
Dear Arnd Bergmann,
On Tue, 26 Mar 2013 18:38:22 +, Arnd Bergmann wrote:
> > Note that both the parent and the child node need to have the
> > 'interrupt-controller' empty property:
> >
> > * The interrupt-controller property is needed in the main
> > interrupt controll
On Tuesday 26 March 2013, Thomas Petazzoni wrote:
>
> I've tried to explain that in the commit log of PATCH 6, which says:
>
> However, we need the driver to expose two different IRQ domains: one
> for the main interrupt controller itself, and one for the MSI
> interrupt controller.
On Tue, Mar 26, 2013 at 05:52:22PM +0100, Thomas Petazzoni wrote:
> This commit introduces the support for the MSI interrupts in the
> armada-370-xp interrupt controller driver. It registers an IRQ domain
> associated with the 'msi' node in the Device Tree, which the PCI
> controller will refer to
Dear Arnd Bergmann,
On Tue, 26 Mar 2013 17:07:41 +, Arnd Bergmann wrote:
> I think the @d002 part needs to be removed for the nodes that
> have no reg property.
Sure, will fix.
> I think I did not follow the entire discussion. What has led to having
> two subnodes in the end, rather tha
On Tuesday 26 March 2013, Thomas Petazzoni wrote:
> + mpic: main-intc@d002 {
> +#interrupt-cells = <1>;
> +interrupt-controller;
> + };
> +
> + msi: msi-intc@d002 {
> +#interrupt-cells = <1>;
This commit introduces the support for the MSI interrupts in the
armada-370-xp interrupt controller driver. It registers an IRQ domain
associated with the 'msi' node in the Device Tree, which the PCI
controller will refer to in a followup commit.
The MSI interrupts use the 16 high doorbells, and a
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