Re: Is placing data with align(32) on the stack with 16-byte alignment an error?

2016-05-29 Thread Marco Leise via Digitalmars-d
Am Sun, 29 May 2016 13:20:12 + schrieb Johan Engelen : > On Sunday, 29 May 2016 at 12:07:02 UTC, Marco Leise wrote: > > > > void main() { > > import core.simd; > > Matrix4x4 matrix; // No warning > > float8 vector; // No warning > > } > > Did you do some LDC

Re: Is placing data with align(32) on the stack with 16-byte alignment an error?

2016-05-29 Thread Johan Engelen via Digitalmars-d
On Sunday, 29 May 2016 at 12:07:02 UTC, Marco Leise wrote: void main() { import core.simd; Matrix4x4 matrix; // No warning float8 vector; // No warning } Did you do some LDC IR/asm testing? With LDC, the type `float8` has 32-byte alignment and so will be placed with that

Re: Is placing data with align(32) on the stack with 16-byte alignment an error?

2016-05-29 Thread ZombineDev via Digitalmars-d
On Sunday, 29 May 2016 at 12:07:02 UTC, Marco Leise wrote: I'll try to be concise: The stack on x64 is 16-byte aligned, enough for SSE registers, but not the 32-byte AVX registers. Any data structure containing AVX registers, cannot be guaranteed to be correctly aligned on the stack, but we

Re: Is placing data with align(32) on the stack with 16-byte alignment an error?

2016-05-29 Thread Marco Leise via Digitalmars-d
P.S.: From the following bug report, it looks like gcc and icc honor stack alignments >= 16: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=44948 That would be a good solution for dmd, too. -- Marco

Is placing data with align(32) on the stack with 16-byte alignment an error?

2016-05-29 Thread Marco Leise via Digitalmars-d
I'll try to be concise: The stack on x64 is 16-byte aligned, enough for SSE registers, but not the 32-byte AVX registers. Any data structure containing AVX registers, cannot be guaranteed to be correctly aligned on the stack, but we get no warning if we try anyways: align(32) struct Matrix4x4 {