On Thursday, 1 June 2017 at 12:00:45 UTC, Era Scarecrow wrote:
So why is the offset off by 14h (20 bytes)? It's not like we
need a to set a ptr first.
Go figure i probably found a bug...
Well as a side note a simple yet not happy workaround is making
a new array slice of the memory and
On Tuesday, 23 May 2017 at 03:33:38 UTC, Era Scarecrow wrote:
From what I'm seeing, it should be 8, 0ch, 10h, then 14h, all
positive. I'm really scratching my head why I'm having this
issue...
What am i missing here?
More experiments and i think it comes down to static arrays.
The
On Wednesday, 11 January 2017 at 17:32:35 UTC, Era Scarecrow
wrote:
Still I think I'll impliment my own version and then if it's
faster I'll submit it.
Decided I'd give my hand at writing a 'ScaledInt' which is
intended to basically allow any larger unsigned type. Coming
across some
On Wednesday, 11 January 2017 at 15:39:49 UTC, Guillaume Piolat
wrote:
On Wednesday, 11 January 2017 at 06:14:35 UTC, Era Scarecrow
wrote:
Suddenly reminds me some of the speedup assembly I was writing
for wideint, but seems I lost my code. too bad, the 128bit
multiply had sped up and the
On Wednesday, 11 January 2017 at 06:14:35 UTC, Era Scarecrow
wrote:
Suddenly reminds me some of the speedup assembly I was writing
for wideint, but seems I lost my code. too bad, the 128bit
multiply had sped up and the division needed some work.
I'm a taker if you have some algorithm to
On Tuesday, 10 January 2017 at 10:41:54 UTC, Basile B. wrote:
don't forget to flag
asm pure nothrow {}
otherwise it's slow.
Suddenly reminds me some of the speedup assembly I was writing
for wideint, but seems I lost my code. too bad, the 128bit
multiply had sped up and the division needed
On Wednesday, 11 January 2017 at 00:11:50 UTC, Chris M wrote:
On Tuesday, 10 January 2017 at 13:13:17 UTC, Basile B. wrote:
On Tuesday, 10 January 2017 at 11:38:43 UTC, Guillaume Piolat
wrote:
On Tuesday, 10 January 2017 at 10:41:54 UTC, Basile B. wrote:
don't forget to flag
asm pure
On Tuesday, 10 January 2017 at 13:13:17 UTC, Basile B. wrote:
On Tuesday, 10 January 2017 at 11:38:43 UTC, Guillaume Piolat
wrote:
On Tuesday, 10 January 2017 at 10:41:54 UTC, Basile B. wrote:
don't forget to flag
asm pure nothrow {}
otherwise it's slow.
Why?
It's an empirical
On Tuesday, 10 January 2017 at 13:13:17 UTC, Basile B. wrote:
On Tuesday, 10 January 2017 at 11:38:43 UTC, Guillaume Piolat
wrote:
On Tuesday, 10 January 2017 at 10:41:54 UTC, Basile B. wrote:
don't forget to flag
asm pure nothrow {}
otherwise it's slow.
Why?
It's an empirical
On Tuesday, 10 January 2017 at 10:41:54 UTC, Basile B. wrote:
don't forget to flag
asm pure nothrow {}
otherwise it's slow.
Why?
On Monday, 9 January 2017 at 02:31:42 UTC, Chris M. wrote:
Right now I'm working on a project where I'm implementing a VM
in D. I'm on the rotate instructions, and realized I could
*almost* abstract the ror and rol instructions with the
following function
private void rot(string ins)(int
On Monday, 9 January 2017 at 02:31:42 UTC, Chris M. wrote:
asm
{
mov EAX, tmp; // I'd also like to know if I could just
load *op1 directly into EAX
mov ECX, op2[EBP];
mixin(ins ~ " EAX, CL;"); // Issue here
mov tmp, EAX;
}
*op1 = tmp;
}
However,
On Monday, 9 January 2017 at 02:38:01 UTC, Stefan Koch wrote:
On Monday, 9 January 2017 at 02:31:42 UTC, Chris M. wrote:
[...]
Yes make the whole inline asm a mixin.
Awesome, got it working. Thanks to both replies.
On Monday, 9 January 2017 at 02:31:42 UTC, Chris M. wrote:
Right now I'm working on a project where I'm implementing a VM
in D. I'm on the rotate instructions, and realized I could
*almost* abstract the ror and rol instructions with the
following function
private void rot(string ins)(int
Right now I'm working on a project where I'm implementing a VM in
D. I'm on the rotate instructions, and realized I could *almost*
abstract the ror and rol instructions with the following function
private void rot(string ins)(int *op1, int op2)
{
int tmp = *op1;
asm
{
mov
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