Dear Marcus,
At the receiver USRP, does the SBX daughtercard have any mechanism of
phase-lock-loop (PLL) ?
I guess the daughtercard should have it because PLL is essential for
quadrature downconversion.
Please advise, thanks.
Regards,
activecat
On Sat, Jan 11, 2014 at 1:19 PM, Marcus Leech
Dear Sir,
I run this command with SBX daughterboard on N210:
/usr/local/lib/uhd/examples/tx_waveforms --freq 500e6 --wave-type SINE
--wave-freq 5e3 --rate 10e6
What is performed at the SBX, does it multiply (Frequency Modulation) the
5kHz SINE wave with the 500MHz carrier frequency ..?
