See here for the schematics which will help you find the full specs for the AUX
ADC and DAC.
https://files.ettus.com/schematics/n200/
Yes you can certainly modify the FPGA and UHD to support these. But you’ll
mostly be on your own.
Sent from my iPhone
> On Mar 4, 2022, at 9:35 AM, Fabien
Hi All,
I am sorry to be covering what is old ground, but I am having a final loading
issue with an otherwise working OOT block.
The block works under GRC 3.8.2.0 and GRC 3.9.4.0 was built on another computer
without issue.
ImportError:generic_type "channel_signal_generator_cc" referenced
Hi David,
If it works somewhere with GR 3.9, then it's not a porting problem and you've
done everything right there.
I've recently discovered for myself that an OOT's Python bindings will throw this error
when even the compiler version is different between building GNU Radio and the OOT, in
I'm actually on 3.9.5 but I will investigate on the PDUs to know if it
could help me.
RX and TX period are completly random from hundreds of milliseconds to
several seconds.
Thanks for your help,
Best regards,
Fabien, F4CTZ.
Le 04/03/2022 à 13:31, Johannes Demel a écrit :
Hi Fabien,
Dear Fabien,
there's no ADC on these daughterboards. Just an EEPROM for identification, opamps for
amplification and signal conditioning, and on the LFTX a switch-mode power supply.
Best regards,
Marcus
On 04.03.22 10:30, Fabien PELLET wrote:
Hello,
As there are IOs available on LFTX and
Sorry, hit "send" accidentally:
Dear Fabien,
there's no ADC on these daughterboards. Just an EEPROM for identification, opamps for
amplification and signal conditioning, and on the LFTX a switch-mode power supply. You're
right, they do exppose the AUX DACs and ADC lines from the motherboad.
Hello,
As there are IOs available on LFTX and LFRX, there are also ADC and DAC
available.
Is there a way to use them as SOURCE and SINK in gnuradio for low speed
conversion ?
Thanks,
Best regards,
Fabien, F4CTZ.
Hello again,
I build a flowgraph in C++ with an RX chain and a TX chain. I'm using a
USRP N210. When I'm in RX, the TX chain is connected to a constant zero
source and feed a null sink and the RX chain is connected to USRP source
and sink. When I'm in TX, it is the opposite.
I have to keep
Hi Fabien,
do those underruns occur after you lock/unlock and switch from TX to RX
or vice versa? Do you see overruns as well?
I'd assume the USRP expects a constant sample flow and even a short
interuption, like your lock/unlock task interrupts that flow.
Still assuming this is the root
Hi Johannes,
Yes this is exactly my problem : after unlocking the flowgraph, I get
some underruns (only, no overrun).
Do you have an example of code using EOB/SOB ? Ok for sending EOB before
locking but is it necessary to send a SOB also and when ?
Your suggestion of idling the TX
Hi Fabien,
Personally, I use PDUs to control when TX starts. GR 3.10 integrated a
lot more of these.
https://github.com/gnuradio/gnuradio/tree/main/gr-pdu
Besides, the gr-pdu_utils OOT might be a good reference.
https://github.com/sandialabs/gr-pdu_utils
It mentions SOB/EOB in their docs.
EOB
Yes, sorry indeed I was talking about AUX_DAC and AUX_ADC that are
replicated from the motherboard.
I already use IO which works very well. So there is no way to send
samples (or receive) at a specific sample rate using that AUX_DAC or
ADC. It is just some "analog IOs" for reading some
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