Hi Rob,
On Fri, 26 Sep 2014 17:10:49 -0400
Rob Clark wrote:
> On Mon, Sep 8, 2014 at 4:43 AM, Boris BREZILLON
> wrote:
> > The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs (i.e.
> > at91sam9n12, at91sam9x5 family or sama5d3 family) provides a display
> > controller device.
> >
already?
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the bug.
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to play other videos
the system would hang.
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:
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nee for the bug.
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On Mon, Sep 22, 2014 at 06:10:50PM -0400, Alex Deucher wrote:
> >
> > With dual VGA controllers, we can change VGA routing in the chipset so
> > that we can address one device or the other using the VGA address space.
> > This lets things like Xorg switch between cards to initialize a card via
> >
Quoting Thierry Reding (2014-09-23 00:22:05)
> On Mon, Sep 22, 2014 at 06:46:52PM +0100, Mark Rutland wrote:
> > On Fri, Sep 19, 2014 at 08:53:48PM +0100, Sean Paul wrote:
> > > Per NVidia, this clock rate should be around 70MHz in
> > > order to properly sample reads on data lane 0. In order
> >
rashes are mostly happening when watching videos (flash or html5 in whatever
browser);
- logs points to ring 5 not responding for some time?
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that needs to have it's
fence in the first 256MB of VRAM.
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On 09/26/2014 11:12 AM, Leann Ogasawara wrote:
> On Fri, Sep 26, 2014 at 7:10 AM, Peter Hurley
> wrote:
>> [ +cc Leann Ogasawara, Marek Szyprowski, Kyungmin Park, Arnd Bergmann ]
>>
>> On 09/26/2014 08:40 AM, Rik van Riel wrote:
>>> On 09/26/2014 08:28 AM, Rob Clark wrote:
On Fri, Sep 26,
art --
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the latest updates (including firefox).
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are the assignee for the bug.
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Hey,
On 26-09-14 12:00, Lauri Peltonen wrote:
> Modify sync_fence_create to accept an array of 'struct fence' objects.
> This will allow drm drivers to create sync_fence objects and pass sync
> fd's between user space with minimal modifications, without ever creating
> sync_timeline or sync_pt
Hey,
On 26-09-14 12:00, Lauri Peltonen wrote:
> Do not attach fences automatically to buffers that are marked for
> explicit synchronization.
>
> Signed-off-by: Lauri Peltonen
> ---
> drm/nouveau_bo.c | 8
> drm/nouveau_bo.h | 4 ++--
> drm/nouveau_drm.c
On 26-09-14 12:00, Lauri Peltonen wrote:
> Allow user space to provide an explicit sync fence fd when exporting
> a dma-buf from gem handle. The fence will be stored as the explicit
> fence to the reservation object.
>
> Signed-off-by: Lauri Peltonen
> ---
> drivers/gpu/drm/drm_prime.c | 41
https://bugzilla.kernel.org/show_bug.cgi?id=22312
Jarkko K changed:
What|Removed |Added
CC||jarkko_korpi at hotmail.com
--- Comment #11
DPM dies, it goes back to no-dpm mode until it recovers.
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a few drives.
http://ideone.com/V4MkeN
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Restore state of mux switch and power-off state of graphics cards upon
resume from hibernation as the following problems can occur:
If the mux is set to the discrete card prior to hibernation it is reset
to the integrated card by the system upon boot. Thus it stays at the
wrong state after resume
On 2014-09-05 13:28, Jani Nikula wrote:
> On Fri, 31 Jan 2014, Alex Deucher wrote:
>> On Thu, Jan 30, 2014 at 6:46 PM, Stefan Demharter
>> wrote:
>>> Saves the current state of the mux and restores it upon resume from
>>> hibernation.
>>> This is needed for muxed systems because the state of
On Friday, September 26, 2014 10:30:08 AM Aaron Lu wrote:
> Some of the Thinkpads' firmware will issue a backlight change request
> through i915 operation region unconditionally on AC plug/unplug, the
> backlight level used is arbitrary and thus should be ignored. This is
> handled by commit
https://bugs.freedesktop.org/show_bug.cgi?id=81644
--- Comment #119 from Alexandre Demers ---
Small question Alex Deucher or Christian may answer: is it normal ring 5 is
completely in a different GPU's memory address area?
[9.353518] radeon :01:00.0: fence driver on ring 0 use gpu addr
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