[PATCH] drm/radeon: remove unecessary includes

The requirement for these was removed in: 0a168933976eb483da91161316cb74d00486 Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/evergreen.c | 1 - drivers/gpu/drm/radeon/rv770.c | 1 - 2 files changed, 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen.c

[Bug 83810] Blender Weight paint mode doesn't work with enabled VBOs.

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[PATCH v6 05/11] drm: add Atmel HLCDC Display Controller support

On Mon, 29 Sep 2014 16:44:18 +0200 Boris Brezillon wrote: > From: Boris BREZILLON > > The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs (i.e. > at91sam9n12, at91sam9x5 family or sama5d3 family) provides a display > controller device. > > This display controller supports at

[RFC] Explicit synchronization for Nouveau

On Mon, Sep 29, 2014 at 11:42:19AM -0400, Jerome Glisse wrote: > On Mon, Sep 29, 2014 at 09:43:02AM +0200, Daniel Vetter wrote: > > On Fri, Sep 26, 2014 at 01:00:05PM +0300, Lauri Peltonen wrote: > > > > > > Hi guys, > > > > > > > > > I'd like to start a new thread about explicit fence

[Bug 83460] [radeon regression] Backlight turned off since kernel upgrade

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[Bug 70651] cannot write to power_dpm_force_performance_level: invalid argument (radeon 7730m)

https://bugzilla.kernel.org/show_bug.cgi?id=70651 Fabio Sangiovanni changed: What|Removed |Added Status|NEW

[PATCH v6 11/11] ARM: at91/dt: enable the LCD panel on sama5d3xek boards

From: Boris BREZILLON Enable LCD related nodes. Signed-off-by: Boris Brezillon --- arch/arm/boot/dts/sama5d31ek.dts | 20 arch/arm/boot/dts/sama5d33ek.dts | 20 arch/arm/boot/dts/sama5d34ek.dts | 20

[PATCH v6 10/11] ARM: at91/dt: add LCD panel description to sama5d3xdm.dtsi

From: Boris BREZILLON Add LCD panel related nodes (backlight, regulators and panel) to sama5d3 Display Module dtsi. Reference LCD pin muxing used by sama5d3xek boards. Signed-off-by: Boris Brezillon --- arch/arm/boot/dts/sama5d3xdm.dtsi | 58

[PATCH v6 09/11] ARM: at91/dt: define the HLCDC node available on sama5d3 SoCs

From: Boris BREZILLON Define the HLCDC (HLCD Controller) IP available on some sama5d3 SoCs (i.e. sama5d31, sama5d33, sama5d34 and sama5d36) in sama5d3 dtsi file. Signed-off-by: Boris Brezillon Tested-by: Anthony Harivel ---

[PATCH v6 08/11] ARM: AT91/dt: add alternative pin muxing for sama5d3 lcd pins

From: Boris BREZILLON Define alternative pin muxing for the LCDC pins. Signed-off-by: Boris Brezillon Tested-by: Anthony Harivel --- arch/arm/boot/dts/sama5d3_lcd.dtsi | 50 ++ 1 file changed, 50 insertions(+) diff

[PATCH v6 07/11] ARM: AT91/dt: split sama5d3 lcd pin definitions to match RGB mode configs

From: Boris BREZILLON The HLCDC (HLCD Controller) IP supports 4 different output mode (RGB444, RGB565, RGB666 and RGB888) and the pin muxing will depend on the chosen RGB mode. Split pin definitions to be able to set pin config according to the selected mode.

[PATCH v6 06/11] drm: add DT bindings documentation for atmel-hlcdc-dc driver

From: Boris BREZILLON The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5 family or sama5d3 family) provides a display controller device. The HLCDC block provides a single RGB output port, and only supports LCD

[PATCH v6 05/11] drm: add Atmel HLCDC Display Controller support

From: Boris BREZILLON The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5 family or sama5d3 family) provides a display controller device. This display controller supports at least one primary plane and might provide

[PATCH v6 04/11] pwm: add DT bindings documentation for atmel-hlcdc-pwm driver

From: Boris BREZILLON The HLCDC IP available in some Atmel SoCs (i.e. sam9x5i.e. at91sam9n12, at91sam9x5 family or sama5d3 family) provide a PWM device. The DT bindings used for this PWM device is following the default 3 cells bindings described in

[PATCH v6 03/11] pwm: add support for atmel-hlcdc-pwm device

From: Boris BREZILLON The HLCDC IP available in some Atmel SoCs (i.e. sam9x5i.e. at91sam9n12, at91sam9x5 family or sama5d3 family) provide a PWM device. This driver add support for a PWM chip exposing a single PWM device (which will most likely be used to

[PATCH v6 02/11] mfd: add documentation for atmel-hlcdc DT bindings

From: Boris BREZILLON The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5 family or sama5d3 family) exposes 2 subdevices: - a display controller (controlled by a DRM driver) - a PWM chip This patch adds documentation for atmel-hlcdc DT

[PATCH v6 01/11] mfd: add atmel-hlcdc driver

The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5 family or sama5d3 family) exposes 2 subdevices: - a display controller (controlled by a DRM driver) - a PWM chip The MFD device provides a regmap and several clocks (those connected to this hardware block) to its subdevices.

[PATCH v6 00/11] drm: add support for Atmel HLCDC Display Controller

Hello, This patch series adds support for the Atmel HLCDC block (HLCD Controller) available on some Atmel SoCs (i.e. the sama5d3 family). The HLCDC actually provides a Display Controller and a PWM device, hence I decided to declare an MFD device exposing 2 subdevices: a display controller and a

[PATCH v2 1/5] video: move mediabus format definition to a more standard place

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[PATCH v2 1/5] video: move mediabus format definition to a more standard place

On Mon, 29 Sep 2014 16:02:39 +0200 Boris Brezillon wrote: > Rename mediabus formats and move the enum into a separate header file so > that it can be used by DRM/KMS subsystem without any reference to the V4L2 > subsystem. > > Old V4L2_MBUS_FMT_ definitions are now macros that points to

[PATCH v2 5/5] drm: panel: simple-panel: add bus format information for foxlink panel

From: Boris BREZILLON Foxlink's fl500wvr00-a0t supports RGB888 format. Signed-off-by: Boris BREZILLON --- drivers/gpu/drm/panel/panel-simple.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c

[PATCH v2 4/5] drm: panel: simple-panel: add support for bus_format retrieval

From: Boris BREZILLON Provide a way to specify panel requirement in terms of supported media bus format (particularly useful for panels connected to an RGB or LVDS bus). Signed-off-by: Boris BREZILLON --- drivers/gpu/drm/panel/panel-simple.c | 5 + 1

[PATCH v2 3/5] drm: add bus_formats and nbus_formats fields to drm_display_info

From: Boris BREZILLON Add bus_formats and nbus_formats fields and drm_display_info_set_bus_formats helper function to specify the bus formats supported by a given display. This information can be used by display controller drivers to configure the output

[PATCH v2 2/5] video: add RGB444_1X12 and RGB565_1X16 bus formats

Add RGB444 format using a 12 bits bus and RGB565 using a 16 bits bus. These formats will later be used by atmel-hlcdc driver. Signed-off-by: Boris BREZILLON --- include/uapi/linux/v4l2-mediabus.h| 2 ++ include/uapi/linux/video-bus-format.h | 4 +++- 2 files changed, 5 insertions(+), 1

[PATCH v2 1/5] video: move mediabus format definition to a more standard place

Rename mediabus formats and move the enum into a separate header file so that it can be used by DRM/KMS subsystem without any reference to the V4L2 subsystem. Old V4L2_MBUS_FMT_ definitions are now macros that points to VIDEO_BUS_FMT_ definitions. Signed-off-by: Boris BREZILLON Acked-by:

[PATCH v2 0/5] video: describe data bus formats

Hello, This patch series is a proposal to describe the different data formats used by HW components to connect with each other. This is just a copy of the existing V4L2_MBUS_FMT defintions with a neutral name so that it can be used by V4L2 and DRM/KMS subsystem. This series also makes use of

[Bug 81644] Random crashes on RadeonSI with Chromium.

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[Bug 84439] Corruption and freezing issues with Radeon 6670

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[Bug 85241] audio over HDMI on AMD E-350 with radeon driver

https://bugzilla.kernel.org/show_bug.cgi?id=85241 Alex Deucher changed: What|Removed |Added CC||alexdeucher at gmail.com --- Comment #1

[Bug 81644] Random crashes on RadeonSI with Chromium.

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[Bug 81644] Random crashes on RadeonSI with Chromium.

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[Bug 22312] [drm:radeon_get_bios] *ERROR* Unable to locate a BIOS ROM

https://bugzilla.kernel.org/show_bug.cgi?id=22312 --- Comment #16 from Alex Deucher --- (In reply to Jarkko K from comment #15) > Did you notice what I said? > > "I also have the error and and suddenly these lines" > > I also had the not able to find bios rom error. line and also those other >

[Bug 22312] [drm:radeon_get_bios] *ERROR* Unable to locate a BIOS ROM

https://bugzilla.kernel.org/show_bug.cgi?id=22312 --- Comment #15 from Jarkko K --- Did you notice what I said? "I also have the error and and suddenly these lines" I also had the not able to find bios rom error. line and also those other lines which i pasted. -- You are receiving this mail

[Bug 22312] [drm:radeon_get_bios] *ERROR* Unable to locate a BIOS ROM

https://bugzilla.kernel.org/show_bug.cgi?id=22312 --- Comment #14 from Alex Deucher --- Note that this message is still present even when the driver is able to find the vbios rom due to changes in the pci subsystem for the order of methods it uses for fetching the rom. If the kernel driver

[PATCH:drm 1/4] intel: Only define variable when it's used.

Re-ping. These patches are quite simple... Thomas On Tue, Aug 05, 2014 at 11:12:54AM +0200, Thomas Klausner wrote: > Hi! > > I'm new here, so I don't know how to find the correct people to review > this patchset. Please let me know. > > Thanks, > Thomas > > On Sun, Jul 20, 2014 at 10:26:31AM

[Mesa-dev] [PATCH] glx/dri3: Use four buffers until X driver supports async flips

; > }; > > -#define DRI3_MAX_BACK 3 > +#define DRI3_MAX_BACK 4 > #define DRI3_BACK_ID(i) (i) > #define DRI3_FRONT_ID (DRI3_MAX_BACK) > > @@ -172,6 +172,10 @@ struct dri3_drawable { > uint8_t is_pixmap; > uint8_t flipping; > > + /* Present extension capabilities > +*/ > + uint32_t present_capabilities; > + > /* SBC numbers are tracked by using the serial numbers > * in the present request and complete events > */ > -- > 2.0.0.rc4 > > ___ > mesa-dev mailing list > mesa-dev at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/mesa-dev -- next part -- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 473 bytes Desc: This is a digitally signed message part. URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140929/68211387/attachment-0001.sig>

[PATCH] glx/dri3: Use four buffers until X driver supports async flips

-by: Jason Ekstrand On Mon, Sep 29, 2014 at 12:25 PM, Matt Turner wrote: > Cc'ing people who might be able to review. > -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140929/61490c5a/attachment-0001.html>

[PATCH] glx/dri3: Use four buffers until X driver supports async flips

Cc'ing people who might be able to review.

[Bug 73047] radeon_pm_info should be in sysfs instead of debugfs

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[RESENT PATCH v7 1/3] drm: rockchip: Add basic drm driver

Hi Mark, More review comments inline... (sorry for the delay) On Fri, Sep 26, 2014 at 6:55 PM, Mark Yao wrote: > From: Mark yao > > This patch adds the basic structure of a DRM Driver for Rockchip Socs. > > Signed-off-by: Mark Yao > Signed-off-by: Daniel Kurtz > Acked-by: Daniel Vetter >

[PATCH] drm/i915: Fix Sink CRC

Hi Rodrigo, This patch looks good. Reviewed-by: Todd Previte -T -Original Message- From: Rodrigo Vivi [mailto:rodrigo.v...@gmail.com] Sent: Tuesday, September 16, 2014 4:18 PM To: intel-gfx at lists.freedesktop.org Cc: dri-devel at lists.freedesktop.org; Rodrigo Vivi; Todd Previte;

[RFC] Explicit synchronization for Nouveau

On Mon, Sep 29, 2014 at 09:43:02AM +0200, Daniel Vetter wrote: > On Fri, Sep 26, 2014 at 01:00:05PM +0300, Lauri Peltonen wrote: > > > > Hi guys, > > > > > > I'd like to start a new thread about explicit fence synchronization. This > > time > > with a Nouveau twist. :-) > > > > First, let me

[PATCH v2] drm/tegra: Setup PHY_TIMING & BTA_TIMING registers in setup_clock()

Make sure we initialize the dsi PHY_TIMING and BTA_TIMING registers when we setup the clocks. If left uninitialized, they can cause DCS transfers to fail. Signed-off-by: Sean Paul --- Changes in v2: - Removed the recursive slave call in set_phy_timing, this will need to be

[Bug 73047] radeon_pm_info should be in sysfs instead of debugfs

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[Bug 73047] radeon_pm_info should be in sysfs instead of debugfs

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[RFC] Explicit synchronization for Nouveau

On 9/29/14 8:42 AM, Jerome Glisse wrote: > On Mon, Sep 29, 2014 at 09:43:02AM +0200, Daniel Vetter wrote: >> On Fri, Sep 26, 2014 at 01:00:05PM +0300, Lauri Peltonen wrote: >>> >>> Hi guys, >>> >>> >>> I'd like to start a new thread about explicit fence synchronization. This >>> time >>> with a

[PATCH 1/2] drm/tegra: Set the dsi lp clk parent and rate

t; The driver fix is perfectly fine, but we also have the > assigned-clock-parent stuff now if you prefer to manage it from DT. I don't think this should be done in the driver. It should never have to bother with what the parent of the LP clock is. The only reason why this is necessary is because the hardware default isn't appropriate. For the same reason I don't think it should be encoded in DT. It's an SoC-level detail and likely will never need to change per board, so it'll just be redundant information in DT. We already have code in the Tegra clock driver to set up this parent and rate properly, so I'm not even sure why this patch is necessary or where the disconnect comes from. Perhaps this wasn't tested against the upstream kernel? Thierry -- next part -- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 819 bytes Desc: not available URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140929/fc52f012/attachment.sig>

[RFC PATCH 7/7] drm/prime: Support explicit fence on export

On Fri, Sep 26, 2014 at 01:00:12PM +0300, Lauri Peltonen wrote: > Allow user space to provide an explicit sync fence fd when exporting > a dma-buf from gem handle. The fence will be stored as the explicit > fence to the reservation object. > > Signed-off-by: Lauri Peltonen All existing

[RFC] Explicit synchronization for Nouveau

On Fri, Sep 26, 2014 at 01:00:05PM +0300, Lauri Peltonen wrote: > > Hi guys, > > > I'd like to start a new thread about explicit fence synchronization. This > time > with a Nouveau twist. :-) > > First, let me define what I understand by implicit/explicit sync: > > Implicit synchronization

[PATCH v3 5/5] ARM: dts: am335x-boneblack: Add HDMI audio support

This patch is invalid now that Mike Turquette took the generic clk-gpio-gate in. The other patches in the series are still Ok. I'll mail a new dts patch shortly. Best regards, Jyri On 09/16/2014 11:40 PM, Jyri Sarha wrote: > Adds mcasp0_pins, clk_mcasp0_fixed, clk_mcasp0, mcasp0, hdmi_audio, >

[PULL] topic/core-stuff

Hi Dave, Ok, here's the update core-stuff pull request with the locking fixup patch fixed up with another patch. Cheers, Daniel The following changes since commit d743ecf360637d489a3ba81a268f574359149601: drm/doc: Fixup drm_irq kerneldoc includes. (2014-09-24 11:43:47 +1000) are available

[PATCH] ACPI / i915: Update the condition to ignore firmware backlight change request

On Fri, Sep 26, 2014 at 11:52:09PM +0200, Rafael J. Wysocki wrote: > On Friday, September 26, 2014 10:30:08 AM Aaron Lu wrote: > > Some of the Thinkpads' firmware will issue a backlight change request > > through i915 operation region unconditionally on AC plug/unplug, the > > backlight level used

[Bug 79980] Random radeonsi crashes

: <http://lists.freedesktop.org/archives/dri-devel/attachments/20140929/88321a2e/attachment.html>

[PATCH v6 1/2] ASoC:codecs: Add a transmitter interface to the HDMI CODEC CODEC

On 09/24/14 08:49, Jean-Francois Moine wrote: > The audio constraints of the HDMI interface are defined by the EDID > which is sent by the connected device. > > The HDMI transmitters may have one or many audio sources. > > This patch adds two functions to the HDMI CODEC: > - it updates the audio

[Bug 81644] Random crashes on RadeonSI with Chromium.

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[Bug 22312] [drm:radeon_get_bios] *ERROR* Unable to locate a BIOS ROM

https://bugzilla.kernel.org/show_bug.cgi?id=22312 --- Comment #13 from Cesko Voeten --- (In reply to Michel D?nzer from comment #12) > P.S. Cesko, if you could change the title of this report to something like > '[drm:radeon_get_bios] *ERROR* Unable to locate a BIOS ROM', that might help >

[Bug 22312] [drm:radeon_get_bios] *ERROR* Unable to locate a BIOS ROM

https://bugzilla.kernel.org/show_bug.cgi?id=22312 Cesko Voeten changed: What|Removed |Added Summary|radeon :01:00.0:|[drm:radeon_get_bios]

[Bug 83708] [vdpau,uvd] kernel oops, Unable to handle kernel paging request at virtual address

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[Bug 22312] radeon 0000:01:00.0: Invalid ROM contents

https://bugzilla.kernel.org/show_bug.cgi?id=22312 --- Comment #12 from Michel D?nzer --- (In reply to Jarkko K from comment #11) > I also have the error and and suddenly these lines > > [ 4985.275572] radeon :01:00.0: GPU fault detected: 146 0x0f0a8804 That's very unlikely to be directly

[Bug 84439] Corruption and freezing issues with Radeon 6670

https://bugs.freedesktop.org/show_bug.cgi?id=84439 --- Comment #3 from Timothy Arceri --- Created attachment 107031 --> https://bugs.freedesktop.org/attachment.cgi?id=107031=edit X.org log -- You are receiving this mail because: You are the assignee for the bug. -- next part

[Bug 84439] Corruption and freezing issues with Radeon 6670

https://bugs.freedesktop.org/show_bug.cgi?id=84439 Timothy Arceri changed: What|Removed |Added Attachment #107029|0 |1 is obsolete|

[Bug 84439] Corruption and freezing issues with Radeon 6670

https://bugs.freedesktop.org/show_bug.cgi?id=84439 --- Comment #1 from Timothy Arceri --- Created attachment 107029 --> https://bugs.freedesktop.org/attachment.cgi?id=107029=edit Corrupt Display Screenshot The display has red and sometimes light blue dots and lines through it. Also

[Bug 84439] New: Corruption and freezing issues with Radeon 6670

https://bugs.freedesktop.org/show_bug.cgi?id=84439 Priority: medium Bug ID: 84439 Assignee: dri-devel at lists.freedesktop.org Summary: Corruption and freezing issues with Radeon 6670 Severity: normal Classification: Unclassified