[Why]
According to DP spec, it should shift left 4 digits for NO_STOP_BIT
in REMOTE_I2C_READ message. Not 5 digits.
[How]
Correct the shifting value of NO_STOP_BIT for DP_REMOTE_I2C_READ case in
drm_dp_encode_sideband_req().
Signed-off-by: Wayne Lin
---
drivers/gpu/drm/drm_dp_mst_topology.c |
On 2019-12-29 11:19 pm, Martin Blumenstingl wrote:
Hi Robin,
On Sun, Dec 29, 2019 at 11:58 PM Robin Murphy wrote:
Hi Martin,
On 2019-12-27 5:37 pm, Martin Blumenstingl wrote:
Most platforms with a Mali-400 or Mali-450 GPU also have support for
changing the GPU clock frequency. Add devfreq
Hi Martin,
On 2019-12-27 5:37 pm, Martin Blumenstingl wrote:
Most platforms with a Mali-400 or Mali-450 GPU also have support for
changing the GPU clock frequency. Add devfreq support so the GPU clock
rate is updated based on the actual GPU usage when the
"operating-points-v2" property is
From: Sean Paul
[ Upstream commit 268de6530aa18fe5773062367fd119f0045f6e88 ]
Spec says[1] Allocated_PBN is 16 bits
[1]- DisplayPort 1.2 Spec, Section 2.11.9.8, Table 2-98
Fixes: ad7f8a1f9ced ("drm/helper: add Displayport multi-stream helper (v0.6)")
Cc: Lyude Paul
Cc: Todd Previte
Cc: Dave
From: Sean Paul
[ Upstream commit 268de6530aa18fe5773062367fd119f0045f6e88 ]
Spec says[1] Allocated_PBN is 16 bits
[1]- DisplayPort 1.2 Spec, Section 2.11.9.8, Table 2-98
Fixes: ad7f8a1f9ced ("drm/helper: add Displayport multi-stream helper (v0.6)")
Cc: Lyude Paul
Cc: Todd Previte
Cc: Dave
From: Sean Paul
[ Upstream commit 268de6530aa18fe5773062367fd119f0045f6e88 ]
Spec says[1] Allocated_PBN is 16 bits
[1]- DisplayPort 1.2 Spec, Section 2.11.9.8, Table 2-98
Fixes: ad7f8a1f9ced ("drm/helper: add Displayport multi-stream helper (v0.6)")
Cc: Lyude Paul
Cc: Todd Previte
Cc: Dave
On Monday, 2019-12-16 16:51:28 +, Souza, Jose wrote:
> Hello
>
> I have being contributing to i915 for the past 2 years and part of my
> work is update the PCI ids of Intel devices in libdrm.
> Being able to push my reviewed patches would be really helpful, please
> consider this request.
Dne nedelja, 29. december 2019 ob 13:08:19 CET je Roman Stratiienko
napisal(a):
> Hello Jernej,
>
> Thank you for review.
>
> On Sun, Dec 29, 2019 at 11:40 AM Jernej Škrabec
wrote:
> > Hi!
> >
> > Dne sobota, 28. december 2019 ob 21:28:17 CET je
> >
> > roman.stratiie...@globallogic.com
Hi!
Dne sobota, 28. december 2019 ob 21:28:15 CET je
roman.stratiie...@globallogic.com napisal(a):
> From: Roman Stratiienko
>
> Screen composition that requires dynamic layout modification,
> especially scaling is corrupted when layout changes.
>
> For example if one of the layer scales
Hello Jernej,
Thank you for review.
On Sun, Dec 29, 2019 at 11:40 AM Jernej Škrabec wrote:
>
> Hi!
>
> Dne sobota, 28. december 2019 ob 21:28:17 CET je
> roman.stratiie...@globallogic.com napisal(a):
> > From: Roman Stratiienko
> >
> > To set blending channel order register software needs to
On Tue 03 Dec 07:17 PST 2019, Sharat Masetty wrote:
Please update subject to "arm64: dts: qcom: sc7180: Add A618 GPU nodes"
> This patch adds the required dt nodes and properties
> to enabled A618 GPU.
>
> Signed-off-by: Sharat Masetty
> ---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 116
>
The InfoVision Optoelectronics M133NWF4 R0 panel is a 13.3" 1920x1080
eDP panel, add support for it in panel-simple.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/panel/panel-simple.c | 31
1 file changed, 31 insertions(+)
diff --git
The BOE NV133FHM-N61 panel is a 13.3" 1920x1080 eDP panel, add support
for it in panel-simple.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/panel/panel-simple.c | 30
1 file changed, 30 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
Dne nedelja, 29. december 2019 ob 14:13:06 CET je Roman Stratiienko
napisal(a):
> My proposal is to go with DRM_DEBUG_DRIVER for now.
> In case stable branches would be interested in these fixes, it will be
> easier to backport.
Fair enough, but you need to add at least Fixes tag.
Best regards,
From: Roman Stratiienko
According to DRM documentation the only difference between PRIMARY
and OVERLAY plane is that each CRTC must have PRIMARY plane and
OVERLAY are optional.
Allow PRIMARY plane to have dimension different from full-screen.
Signed-off-by: Roman Stratiienko
---
Dne nedelja, 29. december 2019 ob 13:47:38 CET je Roman Stratiienko
napisal(a):
> On Sun, Dec 29, 2019 at 2:18 PM Jernej Škrabec
wrote:
> > Dne nedelja, 29. december 2019 ob 13:08:19 CET je Roman Stratiienko
> >
> > napisal(a):
> > > Hello Jernej,
> > >
> > > Thank you for review.
> > >
> >
My proposal is to go with DRM_DEBUG_DRIVER for now.
In case stable branches would be interested in these fixes, it will be
easier to backport.
Also I am using v5.4 for testing since Google AOSP patches does not
work correctly with mainline and missing for kernel-next.
Maintaining 2 variants will
From: Roman Stratiienko
At system start blink of u-boot ghost framebuffer can be observed.
Fix it.
Signed-off-by: Roman Stratiienko
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
On 2019/12/29 4:45, Markus Elfring wrote:
v3d_submit_cl_ioctl call kfree() with variable 'bin' twice.
I would prefer a wording like “kfree() was called for the same variable twice
within an if branch.”.
Fix it by removing the latter one.
I find the wording “Delete a duplicate function
From: Roman Stratiienko
To set blending channel order register software needs to know state and
position of each channel, which impossible at plane commit stage.
Move this procedure to atomic_flush stage, where all necessary information
is available.
Signed-off-by: Roman Stratiienko
---
Hi!
Dne sobota, 28. december 2019 ob 21:28:17 CET je
roman.stratiie...@globallogic.com napisal(a):
> From: Roman Stratiienko
>
> To set blending channel order register software needs to know state and
> position of each channel, which impossible at plane commit stage.
>
> Move this procedure
From: Roman Stratiienko
Screen composition that requires dynamic layout modification,
especially scaling is corrupted when layout changes.
For example if one of the layer scales down, misaligned lines can be
observed, and dynamic increasing of destination area makes mixer to hang
and draw
Hi!
Dne sobota, 28. december 2019 ob 21:28:16 CET je
roman.stratiie...@globallogic.com napisal(a):
> From: Roman Stratiienko
>
> According to DRM documentation the only difference between PRIMARY
> and OVERLAY plane is that each CRTC must have PRIMARY plane and
> OVERLAY are optional.
>
>
On Sun, Dec 29, 2019 at 2:18 PM Jernej Škrabec wrote:
>
> Dne nedelja, 29. december 2019 ob 13:08:19 CET je Roman Stratiienko
> napisal(a):
> > Hello Jernej,
> >
> > Thank you for review.
> >
> > On Sun, Dec 29, 2019 at 11:40 AM Jernej Škrabec
> wrote:
> > > Hi!
> > >
> > > Dne sobota, 28.
Hi!
Dne sobota, 28. december 2019 ob 21:28:18 CET je
roman.stratiie...@globallogic.com napisal(a):
> From: Roman Stratiienko
>
> At system start blink of u-boot ghost framebuffer can be observed.
> Fix it.
Reviewed-by: Jernej Skrabec
Please note that U-Boot to Linux handover may not be
> v3d_submit_cl_ioctl call kfree() with variable 'bin' twice.
I would prefer a wording like “kfree() was called for the same variable twice
within an if branch.”.
> Fix it by removing the latter one.
I find the wording “Delete a duplicate function call.” more appropriate.
Please add the tag
>> Please add the tag “Fixes” to your change description.
>
> I got the results from "git blame":
> git blame -L 570,575 drivers/gpu/drm/v3d/v3d_gem.c
…
> 0d352a3a8a1f2 (Iago Toral Quiroga 2019-09-16 09:11:25 +0200 571)
> kfree(bin);
> a783a09ee76d6 (Eric Anholt 2019-04-16
On Sat, 21 Dec 2019 02:05:59 +0900
TAEHO NAM wrote:
> Hi, I'm new to dri-devel and sorry if this question doesn't fit here.
> In my code, the case 1 of getting eglDisplay using EGL_DEFAULT_DISPLAY
> failed, but, the case 2 succeeded.
>
> // Case 1
> egl_.display = eglGetDisplay
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