LGTM Reviewed-by: Nirmoy Das
On 4/6/2022 8:19 PM, Matthew Auld wrote:
We can only force migrate an object if the existing object size is
compatible with the new destinations min_page_size for the region.
Currently we blow up with something like:
[ 2857.497462] kernel BUG at drivers/gpu/drm/i91
On 07/04/2022 08:22, Rex-BC Chen wrote:
> On Wed, 2022-04-06 at 16:44 +0200, Krzysztof Kozlowski wrote:
>> On 06/04/2022 11:46, Rex-BC Chen wrote:
>>> The driver data of MT8183 and MT8173 are different.
>>> The value of has_gamma for MT8173 is true while the value of MT8183
>>> is
>>> false. Theref
Am 06.04.22 um 18:50 schrieb Grigory Vasilyev:
Instead of the 'amdgpu_ring_priority_level' type,
the 'amdgpu_gfx_pipe_priority' type was used,
which is an error when setting ring priority.
This is a minor error, but may cause problems in the future.
Instead of AMDGPU_RING_PRIO_2 = 2, we can use
Am 07.04.22 um 07:46 schrieb Arunpravin Paneer Selvam:
- Switch to drm buddy allocator
- Add resource cursor support for drm buddy
v2(Matthew Auld):
- replace spinlock with mutex as we call kmem_cache_zalloc
(..., GFP_KERNEL) in drm_buddy_alloc() function
- lock drm_buddy_block_trim(
On Thu, 31 Mar 2022 at 22:41, Ville Syrjälä
wrote:
>
> On Thu, Mar 31, 2022 at 10:25:23PM +0200, Daniel Vetter wrote:
> > On Thu, Mar 31, 2022 at 11:11:00PM +0300, Ville Syrjälä wrote:
> > > On Thu, Mar 31, 2022 at 10:02:53PM +0200, Daniel Vetter wrote:
> > > > On Thu, Mar 31, 2022 at 10:52:54PM +
Am 07.04.22 um 04:56 schrieb Zack Rusin:
From: Zack Rusin
Drivers duplicate the code required to add debugfs entries for various
ttm resource managers. To fix it add common TTM resource manager
code that each driver can reuse.
Because TTM resource managers can be initialized and set a lot late
- Switch to drm buddy allocator
- Add resource cursor support for drm buddy
v2(Matthew Auld):
- replace spinlock with mutex as we call kmem_cache_zalloc
(..., GFP_KERNEL) in drm_buddy_alloc() function
- lock drm_buddy_block_trim() function as it calls
mark_free/mark_split are all glob
From: Zack Rusin
Switch to using the TTM resource manager debugfs helpers. It's
exactly the same functionality, except that the entries live under
/sys/kernel/debug/ttm/.
Signed-off-by: Zack Rusin
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui"
Cc: David Airlie
Cc: Daniel Vetter
C
From: Zack Rusin
Switch to using the TTM resource manager debugfs helpers. The
functionality is largely the same, except that the entries live under
/sys/kernel/debug/ttm/ and their lifetimes are managed by TTM.
Signed-off-by: Zack Rusin
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui
From: Zack Rusin
Switch to using the TTM resource manager debugfs helpers. The
functionality is largely the same, except that the entries live under
/sys/kernel/debug/ttm/ and their lifetimes are managed by TTM.
Signed-off-by: Zack Rusin
Cc: Dave Airlie
Cc: Gerd Hoffmann
Cc: Daniel Vetter
Cc
From: Zack Rusin
Use the newly added TTM's ability to automatically create debugfs entries
for specified placements. This creates entries in /sys/kernel/debug/ttm/
that can be read to get information about various TTM resource
managers which are used by vmwgfx.
Signed-off-by: Zack Rusin
---
dr
From: Zack Rusin
This series introduces generic TTM resource manager debugfs helpers and
refactors TTM drivers which have been using hand rolled out versions
of those to use the new code.
Because those entries are managed by TTM the location of them moves to
/sys/kernel/debug/ttm/. If there are
From: Zack Rusin
Drivers duplicate the code required to add debugfs entries for various
ttm resource managers. To fix it add common TTM resource manager
code that each driver can reuse.
Because TTM resource managers can be initialized and set a lot later
than TTM device initialization a seperate
From: Xiaoke Wang
kzalloc() is a memory allocation function which can return NULL when
some internal memory errors happen. So it is better to check it to
prevent potential wrong memory access.
Besides, since mdp5_plane_reset() is void type, so we should better
set `plane-state` to NULL after rel
On 3/31/2022 8:20 AM, Daniel Vetter wrote:
The stuff never really worked, and leads to lots of fun because it
out-of-order frees atomic states. Which upsets KASAN, among other
things.
For async updates we now have a more solid solution with the
->atomic_async_check and ->atomic_async_commit h
On Wed, 6 Apr 2022 09:27:19 +0200, Patrik Jakobsson wrote:
> On Fri, Apr 1, 2022 at 1:58 PM Xiaomeng Tong wrote:
> >
> > Instead of exiting the loop as expected when an entry is found, the
> > list_for_each_entry() continues until the traversal is complete. To
> > avoid potential executing 'ret =
On 4/6/22 21:47, Lucas Stach wrote:
Am Freitag, dem 11.03.2022 um 18:05 +0100 schrieb Marek Vasut:
Pull mode registers programming from mxsfb_enable_controller() into
dedicated function mxsfb_set_mode(). This is a clean up. No functional
change.
This one however looks like over-factorization t
On 4/4/22 14:23, Lucas Stach wrote:
Hi Marek,
Hi,
not a full review right now, just the first things that I noticed while
playing around with this.
Am Dienstag, dem 22.03.2022 um 15:28 +0100 schrieb Marek Vasut:
Add support for i.MX8MP LCDIF variant. This is called LCDIFv3 and is
completely
On 4/6/22 21:45, Lucas Stach wrote:
Am Freitag, dem 11.03.2022 um 18:05 +0100 schrieb Marek Vasut:
Move mxsfb_get_fb_paddr() out of the way, away from register IO functions.
This is a clean up. No functional change.
Signed-off-by: Marek Vasut
Cc: Alexander Stein
Cc: Laurent Pinchart
Cc: Luca
On 4/6/22 21:41, Lucas Stach wrote:
Am Freitag, dem 11.03.2022 um 18:05 +0100 schrieb Marek Vasut:
The call to drm_crtc_vblank_off(&lcdif->crtc); disables IRQ generation
from the LCDIF block already and this is called in mxsfb_load() before
request_irq(), so explicitly disabling IRQ using custom
On 4/6/22 21:32, Lucas Stach wrote:
Hi Marek,
Hi,
Am Freitag, dem 11.03.2022 um 18:05 +0100 schrieb Marek Vasut:
The current clock handling in the LCDIF driver is a convoluted mess.
Here we agree...
Implement runtime PM ops which turn the clock ON and OFF and let the
pm_runtime_get_sync(
On Thu, Mar 31, 2022 at 8:20 AM Daniel Vetter wrote:
>
> The stuff never really worked, and leads to lots of fun because it
> out-of-order frees atomic states. Which upsets KASAN, among other
> things.
>
> For async updates we now have a more solid solution with the
> ->atomic_async_check and ->at
Hello Chen-Yu,
On Wed, Apr 6, 2022 at 7:30 PM Chen-Yu Tsai wrote:
>
> From: Chen-Yu Tsai
>
> Hi everyone,
>
> This series adds support for SH1106 to the ssd130x OLED display
> driver.
>
Thanks for re-spinning your series. I believe that gave you my
Acked-by for most of the patches in v1 already
From: Rob Clark
The motivation at this point is mainly native userspace mesa driver in a
VM guest. The one remaining synchronous "hotpath" is buffer allocation,
because guest needs to wait to know the bo's iova before it can start
emitting cmdstream/state that references the new bo. By allocati
From: Rob Clark
With userspace allocated iova (next patch), we can have a race condition
where userspace observes the fence completion and deletes the vma before
retire_submit() gets around to unpinning the vma. To handle this, add a
fenced unpin which drops the refcount but tracks the fence, an
From: Rob Clark
This way we only lookup vma once per object per submit, for both the
submit and retire path.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.c| 60 +---
drivers/gpu/drm/msm/msm_gem.h| 9 +++--
drivers/gpu/drm/msm/msm_gem_submit.
From: Rob Clark
Combines duplicate vma lookup in the get_and_pin path.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Osipenko
---
drivers/gpu/drm/msm/msm_gem.c | 50 ++-
1 file changed, 26 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem.
From: Rob Clark
There was only a single user, which could just as easily stash the iova
when pinning.
v2: fix prepare->prepare->cleanup->cleanup sequences
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_fb.c | 20 ++--
drivers/gpu/drm/msm/m
From: Rob Clark
Get rid of all the unnecessary conversion between address/size and page
offsets. It just confuses things.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 +-
drivers/gpu/drm/msm/msm_gem.c | 5 ++---
drivers/gpu/dr
From: Rob Clark
Prep for a following patch, where it gets a bit more complicated.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.c | 2 +-
drivers/gpu/drm/msm/msm_gem.h | 1 +
drivers/gpu/drm/msm/msm_gem_vma.c | 9 +++--
3 files changed, 9 insertions(+), 3 deletions(-)
d
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem_vma.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c
b/drivers/gpu/drm/msm/msm_gem_vma.c
index f914ddbaea89..64906594fc65 100644
--- a/drivers/gpu/drm/msm/
From: Rob Clark
The ring seqno counter duplicates the fence-context last_fence counter.
They end up getting incremented in lock-step, on the same scheduler
thread, but the split just makes things less obvious.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +-
drivers
From: Rob Clark
These belong more cleanly in the gem header.
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_drv.h | 23 ---
drivers/gpu/drm/msm/msm_gem.h | 22 ++
2 files changed, 22 insertions(+), 23 deletions(-)
di
From: Rob Clark
The first six paches are various cleanups and simplifications. The
next two get rid of redundant vma lookups in the submit and retire
paths. Following that, fenced vma lets us indicate a fence value
following which the vma is no longer used, which is needed because
otherwise use
binttweoHDOUR.bin
Description: Binary data
The platform devices registered in sysfb match with a firmware-based fbdev
or DRM driver, that are used to have early graphics using framebuffers set
up by the system firmware.
Real DRM drivers later are probed and remove all conflicting framebuffers,
leading to these platform devices for generic
Drivers that want to remove registered conflicting framebuffers prior to
register their own framebuffer, calls remove_conflicting_framebuffers().
This function takes the registration_lock mutex, to prevent a races when
drivers register framebuffer devices. But if a conflicting framebuffer
device i
These can be used by subsystems to unregister a platform device registered
by sysfb and also to disable future platform device registration in sysfb.
Suggested-by: Daniel Vetter
Signed-off-by: Javier Martinez Canillas
---
drivers/firmware/sysfb.c | 47 +++-
[ resend since dri-devel wasn't Cc'ed on all patches, sorry for the noise ]
Hello,
The patches in this series are mostly changes suggested by Daniel Vetter
to fix some race conditions that exists between the fbdev core (fbmem)
and sysfb with regard to device registration and removal.
For example
This function just returned 0 on success or an errno code on error, but it
could be useful to sysfb_init() to get a pointer to the device registered.
Signed-off-by: Javier Martinez Canillas
---
drivers/firmware/sysfb.c | 4 ++--
drivers/firmware/sysfb_simplefb.c | 24 +++--
dp_hpd_plug_handle() is responsible for setting up main link and send
uevent to notify user space framework to start video stream. Similarly,
dp_hdp_unplug_handle is responsible to send uevent to notify user space
framework to stop video stream and then tear down main link.
However there are rare c
On 4/5/2022 12:48 PM, Stephen Boyd wrote:
Quoting Kuogee Hsieh (2022-04-05 11:17:07)
HPD plugin handle is responsible for setting up main link and depend on
Is "HPD plugin handle" a function? Can you use the function name?
user space frame work to start video stream. Similarly, HPD unplugge
On Wed, 06 Apr 2022 18:01:19 +0200, Lucas Stach wrote:
> Add a DT binding for the HDMI PHY found on the i.MX8MP SoC.
>
> Signed-off-by: Lucas Stach
> ---
> .../bindings/phy/fsl,imx8mp-hdmi-phy.yaml | 62 +++
> 1 file changed, 62 insertions(+)
> create mode 100644
> Document
On Wed, 06 Apr 2022 18:01:17 +0200, Lucas Stach wrote:
> Add binding for the i.MX8MP HDMI parallel video interface block.
>
> Signed-off-by: Lucas Stach
> ---
> .../display/imx/fsl,imx8mp-hdmi-pvi.yaml | 83 +++
> 1 file changed, 83 insertions(+)
> create mode 100644
> Doc
On Wed, 06 Apr 2022 18:01:15 +0200, Lucas Stach wrote:
> The HDMI TX controller on the i.MX8MP SoC is a Synopsys designware IP
> core with a little bit of SoC integration around it.
>
> Signed-off-by: Lucas Stach
> ---
> .../bindings/display/imx/fsl,imx8mp-hdmi.yaml | 72 +++
> 1
Am Freitag, dem 11.03.2022 um 18:06 +0100 schrieb Marek Vasut:
> Pull functionality responsible for programming framebuffer address into
> the controller into dedicated function mxsfb_update_buffer(). This is a
> clean up. No functional change.
>
> Signed-off-by: Marek Vasut
> Cc: Alexander Stein
Am Freitag, dem 11.03.2022 um 18:06 +0100 schrieb Marek Vasut:
> Reorder mxsfb_crtc_mode_set_nofb() such that all functions which perform
> register IO are called from one single location in this function. This is
> a clean up. No functional change.
>
> Signed-off-by: Marek Vasut
> Cc: Alexander
Am Freitag, dem 11.03.2022 um 18:05 +0100 schrieb Marek Vasut:
> Pull mode registers programming from mxsfb_enable_controller() into
> dedicated function mxsfb_set_mode(). This is a clean up. No functional
> change.
This one however looks like over-factorization to me. Why pull out a
mode_set func
Hi
Am 30.03.22 um 12:35 schrieb Jani Nikula:
On Tue, 22 Mar 2022, Thomas Zimmermann wrote:
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 144c495b99c4..e6e9e4557067 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -391,33 +391,6 @@ drm_load_edid_firmware(
Am Freitag, dem 11.03.2022 um 18:05 +0100 schrieb Marek Vasut:
> Move mxsfb_get_fb_paddr() out of the way, away from register IO functions.
> This is a clean up. No functional change.
>
> Signed-off-by: Marek Vasut
> Cc: Alexander Stein
> Cc: Laurent Pinchart
> Cc: Lucas Stach
> Cc: Peng Fan
Am Freitag, dem 11.03.2022 um 18:05 +0100 schrieb Marek Vasut:
> Wrap FIFO reset and comments into mxsfb_reset_block(), this is a clean up.
> No functional change.
>
> Signed-off-by: Marek Vasut
> Cc: Alexander Stein
> Cc: Laurent Pinchart
> Cc: Lucas Stach
> Cc: Peng Fan
> Cc: Robby Cai
> C
Am Freitag, dem 11.03.2022 um 18:05 +0100 schrieb Marek Vasut:
> The call to drm_crtc_vblank_off(&lcdif->crtc); disables IRQ generation
> from the LCDIF block already and this is called in mxsfb_load() before
> request_irq(), so explicitly disabling IRQ using custom function like
> mxsfb_irq_disabl
Hi Marek,
Am Freitag, dem 11.03.2022 um 18:05 +0100 schrieb Marek Vasut:
> The current clock handling in the LCDIF driver is a convoluted mess.
Here we agree...
> Implement runtime PM ops which turn the clock ON and OFF and let the
> pm_runtime_get_sync()/pm_runtime_put_sync() calls in .atomic_e
The compact-pt layout restrictions should only apply to the ppGTT. Also
make this play nice on platforms that only have the 64K GTT restriction,
and not the compact-pt thing.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Nirmoy Das
---
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 12
Trying to cast the region id into the region type doesn't work too well,
since the i915_vm_min_alignment() won't give us the correct value for
the stolen-lmem case.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Nirmoy Das
---
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 2 +-
1 file
Hi Yunfei,
Le jeudi 31 mars 2022 à 10:48 +0800, Yunfei Dong a écrit :
> Add support for VP9 decoding using the stateless API,
> as supported by MT8192. And the drivers is lat and core architecture.
>
> Signed-off-by: George Sun
> Signed-off-by: Xiaoyong Lu
> Signed-off-by: Yunfei Dong
> Review
Hi Javier
Am 30.03.22 um 11:23 schrieb Javier Martinez Canillas:
On 3/22/22 20:27, Thomas Zimmermann wrote:
Replace the DP-helper module with a display-helper module. Update
all related Kconfig and Makefile rules.
Besides the existing code for DisplayPort, the new module will
contain helpers f
We can only force migrate an object if the existing object size is
compatible with the new destinations min_page_size for the region.
Currently we blow up with something like:
[ 2857.497462] kernel BUG at drivers/gpu/drm/i915/gt/intel_migrate.c:431!
[ 2857.497497] invalid opcode: [#1] PREEMPT
On Tue, Apr 5, 2022 at 1:09 AM Tvrtko Ursulin
wrote:
>
>
> On 04/04/2022 16:36, Daniel Vetter wrote:
> > On Mon, Apr 04, 2022 at 10:23:53AM +0100, Tvrtko Ursulin wrote:
> >>
> >> + Dave and Daniel
> >>
> >> Guys, are you okay with merging this via drm-intel-gt-next? It is one new
> >> file at Docu
On 2022-04-06 15:32, Dmitry Osipenko wrote:
On 4/5/22 17:19, Robin Murphy wrote:
Remove the pointless check. host1x_drm_wants_iommu() cannot return true
unless an IOMMU exists for the host1x platform device, which at the moment
means the iommu_present() test could never fail.
Signed-off-by: Rob
On Mon, 04 Apr 2022 21:21:05 +0200, Marek Vasut wrote:
> Make the width-mm/height-mm panel properties mandatory
> to correctly report the panel dimensions to the OS.
>
> Fixes: 2f3468b82db97 ("dt-bindings: display: add bindings for MIPI DBI
> compatible SPI panels")
> Signed-off-by: Marek Vasut
From: Chen-Yu Tsai
The SINO WEALTH SH1106 is an OLED display driver that is somewhat
compatible with the SSD1306. It supports a slightly wider display,
at 132 instead of 128 pixels. The basic commands are the same, but
the SH1106 doesn't support the horizontal or vertical address modes.
Add supp
From: Chen-Yu Tsai
On the SINO WEALTH SH1106, which is mostly compatible with the SSD1306,
only the basic page addressing mode is supported. This addressing mode
is not as easy to use compared to the currently supported horizontal
addressing mode, as the page address has to be set prior to writin
From: Chen-Yu Tsai
The SINO WEALTH SH1106 is an OLED display driver that is somewhat
compatible with the SSD1306. It supports a slightly wider display,
at 132 instead of 128 pixels. The basic commands are the same, but
the SH1106 doesn't support the horizontal or vertical address modes.
Add a co
From: Chen-Yu Tsai
Hi everyone,
This series adds support for SH1106 to the ssd130x OLED display
driver.
Changes since v1:
- Fixed ordering of SINO WEALTH in vendor prefix list
- Updated allOf:if: blocks in DT binding, i.e. added default values for
solomon,dclk-{div,frq}
- Added SSD130X_PAG
From: Chen-Yu Tsai
Add a vendor prefix entry for SINO WEALTH Eletronics Ltd.
(http://www.sinowealth.com).
Signed-off-by: Chen-Yu Tsai
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefix
Hi Liviu
Thank you for your reviews. They were very useful to get this in shape.
Some comments below.
Abhinav
On 4/6/2022 7:55 AM, Liviu Dudau wrote:
Hi Abhinav,
On Thu, Mar 31, 2022 at 05:12:11PM -0700, Abhinav Kumar wrote:
For vendors drivers which pass an already allocated and
initialize
Hi Dave, Daniel,
Fixes for 5.18.
The following changes since commit 15f9cd4334c83716fa32647652a609e3ba6c998d:
drm/amdgpu/gfx10: enable gfx1037 clock counter retrieval function (2022-03-25
12:40:25 -0400)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.gi
Once EDID is parsed, the monitor HDMI support information is cached in
drm_display_info.is_hdmi by drm_parse_hdmi_vsdb_video().
This driver calls drm_detect_hdmi_monitor() to receive the same
information and stores its own cached value, which is less efficient.
Avoid calling drm_detect_hdmi_monit
Hello everyone,
This patch replaces the calls to drm_detect_hdmi_monitor() with the more
efficient drm_display_info.is_hdmi in the VC4 driver.
After applying it, vc4_encoder->hdmi_monitor could be removed in a
follow up patch. However, since it is used by some code not present in
the mainline ker
Hi Tim,
Am Mittwoch, dem 06.04.2022 um 09:10 -0700 schrieb Tim Harvey:
> On Wed, Apr 6, 2022 at 9:01 AM Lucas Stach wrote:
> >
> > Hi all,
> >
> > this adds support for the HDMI output pipeline on the i.MX8MP.
> > It currently depends on the i.MX8MP HDMI power domain series [1]
> > and support
From: Paul Boddie
A specialisation of the generic Synopsys HDMI driver is employed for
JZ4780 HDMI support. This requires a new driver, plus device tree and
configuration modifications.
Here we add Kconfig DRM_INGENIC_DW_HDMI, Makefile and driver code.
Note that there is no hpd-gpio installed o
From: Neil Armstrong
The dw-hdmi integrates an optional Color Space Conversion feature used
to handle color-space conversions.
On some platforms, the CSC isn't built-in or non-functional.
This adds the necessary code to disable the CSC functionality
and limit the bus format negotiation to force
From: Neil Armstrong
When the display is not an HDMI sink, only the RGB output format is
valid. Thus stop returning YUV output formats when sink is not HDMI.
Fixes: 6c3c719936da ("drm/bridge: synopsys: dw-hdmi: add bus format
negociation")
Signed-off-by: Neil Armstrong
Signed-off-by: H. Nikola
PATCH V17 2022-04-06 18:26:08:
* removed our local attempts to enable HPD because
"drm/bridge_connector: enable HPD by default if supported"
became available and solves the issue globally (by
nikita.yo...@cogentembedded.com)
* add new mechanism to disable Color Space Conversion (by
narmstr...
"hdmi-connector.yaml" bindings defines an optional property
"ddc-en-gpios" for a single gpio to enable DDC operation.
Usually this controls +5V power on the HDMI connector.
This +5V may also be needed for HPD.
This was not reflected in code but is needed to make the CI20
board work.
Now, the dri
otherwise they will produce a black HDMI screen.
Signed-off-by: H. Nikolaus Schaller
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
inde
From: Paul Cercueil
The .atomic_get_input_bus_fmts() callback of our top bridge should
return the possible input formats for a given output format. If the
requested output format is not supported, then NULL should be returned,
otherwise the bus format negociation will end with a bus format that t
On 2022-04-01 05:48:09, Joel Selvaraj wrote:
> Add backlight property and update example to include it.
>
> Signed-off-by: Joel Selvaraj
Reviewed-by: Marijn Suijten
> ---
> .../devicetree/bindings/display/panel/novatek,nt36672a.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --gi
On Thu, Mar 24, 2022 at 1:37 AM wrote:
>
> From: Xiaoke Wang
>
> kzalloc() is a memory allocation function which can return NULL when
> some internal memory errors happen. So it is better to check it to
> prevent potential wrong memory access.
>
> Signed-off-by: Xiaoke Wang
> ---
> drivers/gpu/
On 2022-04-01 05:48:10, Joel Selvaraj wrote:
> Xiaomi Poco F1 uses the QCOM WLED driver for backlight control.
> Enable and link it to the panel to use it.
>
> Signed-off-by: Joel Selvaraj
Reviewed-by: Marijn Suijten
> ---
> Changes in v2:
> - Remove qcom,enabled-strings property as either it
On 2022-04-01 05:48:08, Joel Selvaraj wrote:
> Add support for backlight. This panel supports backlight control
> through the QCOM WLED driver in Xiaomi Poco F1 device.
>
> Signed-off-by: Joel Selvaraj
Reviewed-by: Marijn Suijten
> ---
> drivers/gpu/drm/panel/panel-novatek-nt36672a.c | 4
On Wed, Apr 6, 2022 at 9:01 AM Lucas Stach wrote:
>
> Hi all,
>
> this adds support for the HDMI output pipeline on the i.MX8MP.
> It currently depends on the i.MX8MP HDMI power domain series [1]
> and support for the new LCDIF [2] in the i.MX8MP. I guess the
> implementation presented here also s
Drivers that want to remove registered conflicting framebuffers prior to
register their own framebuffer, calls remove_conflicting_framebuffers().
This function takes the registration_lock mutex, to prevent a races when
drivers register framebuffer devices. But if a conflicting framebuffer
device i
bingzmJoZoxxU.bin
Description: Binary data
The platform devices registered in sysfb match with a firmware-based fbdev
or DRM driver, that are used to have early graphics using framebuffers set
up by the system firmware.
Real DRM drivers later are probed and remove all conflicting framebuffers,
leading to these platform devices for generic
Hello,
The patches in this series are mostly changes suggested by Daniel Vetter
to fix some race conditions that exists between the fbdev core (fbmem)
and sysfb with regard to device registration and removal.
For example, it is currently possible for sysfb to register a platform
device after a re
On Tue, Apr 5, 2022 at 7:17 AM Robin Murphy wrote:
>
> Even if some IOMMU has registered itself on the platform "bus", that
> doesn't necessarily mean it provides translation for the device we
> care about. Replace iommu_present() with a more appropriate check.
>
> Signed-off-by: Robin Murphy
Re
On Fri, 01 Apr 2022 05:48:09 +0530, Joel Selvaraj wrote:
> Add backlight property and update example to include it.
>
> Signed-off-by: Joel Selvaraj
> ---
> .../devicetree/bindings/display/panel/novatek,nt36672a.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring
Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few
involved pins that are configurable.
Signed-off-by: Lucas Stach
---
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-e
This adds the driver for the Samsung HDMI PHY found on the
i.MX8MP SoC.
Heavily based on the PHY implementation in the downstream kernel
written by Sandor Yu , but also cleaned up
quite a bit and extended to support runtime PM.
Signed-off-by: Lucas Stach
---
FIXME: The PHY configuration could be
This IP block is found in the HDMI subsystem of the i.MX8MP SoC. It has a
full timing generator and can switch between different video sources. On
the i.MX8MP however the only supported source is the LCDIF. The block
just needs to be powered up and told about the polarity of the video
sync signals
The HDMI irqsteer is a secondary interrupt controller within the HDMI
subsystem that maps all HDMI peripheral IRQs into a single upstream
IRQ line.
Signed-off-by: Lucas Stach
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm
This adds the DT nodes for all the peripherals that make up the
HDMI display pipeline.
Signed-off-by: Lucas Stach
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 80 +++
1 file changed, 80 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
b/arch/arm64/boo
Add a DT binding for the HDMI PHY found on the i.MX8MP SoC.
Signed-off-by: Lucas Stach
---
.../bindings/phy/fsl,imx8mp-hdmi-phy.yaml | 62 +++
1 file changed, 62 insertions(+)
create mode 100644
Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml
diff --git a/Do
Add a simple wrapper driver for the DWC HDMI bridge driver that
implements the few bits that are necessary to abstract the i.MX8MP
SoC integration.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/imx/Kconfig | 1 +
drivers/gpu/drm/imx/Makefile | 2 +
drivers/gpu/drm/imx/bri
Add binding for the i.MX8MP HDMI parallel video interface block.
Signed-off-by: Lucas Stach
---
.../display/imx/fsl,imx8mp-hdmi-pvi.yaml | 83 +++
1 file changed, 83 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
di
Hi all,
this adds support for the HDMI output pipeline on the i.MX8MP.
It currently depends on the i.MX8MP HDMI power domain series [1]
and support for the new LCDIF [2] in the i.MX8MP. I guess the
implementation presented here also still has some warts that
require fixing and the individual patch
The HDMI TX controller on the i.MX8MP SoC is a Synopsys designware IP
core with a little bit of SoC integration around it.
Signed-off-by: Lucas Stach
---
.../bindings/display/imx/fsl,imx8mp-hdmi.yaml | 72 +++
1 file changed, 72 insertions(+)
create mode 100644
Documentation/de
Allow vendor PHY implementations to reset PHYs with different polarity
than the current Gen2 reset.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 7 +++
include/drm/bridge/dw_hdmi.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/dr
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