Il 23/05/22 12:47, Guillaume Ranquet ha scritto:
From: Markus Schneider-Pargmann
DPINTF is similar to DPI but does not have the exact same feature set
or register layouts.
DPINTF is the sink of the display pipeline that is connected to the
DisplayPort controller and encoder unit. It takes the
By this commit 2 related issues are solved:
Issue #1. Corruption in blend route/enable register:
Register corruption happens after using old_state->zpos to disable layer
state. Blend route/enable registers are shared with other layers
and other layers may have already assigned this PIPE to
Every iteration of for_each_available_child_of_node() decrements
the reference counter of the previous node. There is no decrement
when break out from the loop and results in refcount leak.
Add missing of_node_put() to fix this.
Fixes: 5fc537bfd000 ("drm/mcde: Add new driver for ST-Ericsson
Am 25.05.22 um 11:35 schrieb Lionel Landwerlin:
On 25/05/2022 12:26, Lionel Landwerlin wrote:
On 25/05/2022 11:24, Christian König wrote:
Am 25.05.22 um 08:47 schrieb Lionel Landwerlin:
On 09/02/2022 20:26, Christian König wrote:
It is illegal to add a dma_fence_chain as timeline point.
On Wed, 25 May 2022 09:23:51 +
Simon Ser wrote:
> On Wednesday, May 25th, 2022 at 10:35, Michel Dänzer
> wrote:
>
> > > Mind that "max bpc" is always in auto. It's only an upper limit, with
> > > the assumption that the driver can choose less.
> >
> > It seems to me like the "max bpc"
and that
there's no regression on older ones, so on all patches you can add my:
[Tested on MT6795, MT8173, MT8192, MT8195]
Tested-by: AngeloGioacchino Del Regno
BUT!
This series won't apply cleanly anymore on next-20220525 (same for vdosys0,
already pinged Jason about it) because of the commits
On Sat, 7 May 2022 at 14:18, Jason Ekstrand wrote:
> This patch series actually contains two new ioctls. There is the export one
> mentioned above as well as an RFC for an import ioctl which provides the other
> half. The intention is to land the export ioctl since it seems like there's
> no
Il 19/04/22 11:41, jason-jh.lin ha scritto:
From: jason-jhlin
Hello Jason,
this series does not apply cleanly anymore on next-20220525, can you please
rebase and resend?
I hope that with a bit of coordination, we can get the entire display stack
finally upstreamed in v5.19... it's been
On 24/05/2022 15:50, Rob Clark wrote:
On Tue, May 24, 2022 at 6:45 AM Tvrtko Ursulin
wrote:
On 23/05/2022 23:53, Rob Clark wrote:
On Mon, May 23, 2022 at 7:45 AM Tvrtko Ursulin
wrote:
Hi Rob,
On 28/07/2021 02:06, Rob Clark wrote:
From: Rob Clark
The drm/scheduler provides
On Thu, May 19, 2022 at 09:26:59AM -0700, Guillaume Ranquet wrote:
> On Thu, 12 May 2022 09:44, Maxime Ripard wrote:
> >Hi,
> >
> >On Wed, May 11, 2022 at 05:59:13AM -0700, Guillaume Ranquet wrote:
> >> >> +#include
> >> >> +#include
> >> >> +#include
> >> >> +#include
> >> >> +#include
> >>
This symbol is not used outside of imu_v11_0.c, so marks it
static.
Fixes the following w1 warning:
drivers/gpu/drm/amd/amdgpu/imu_v11_0.c:302:6: warning: no previous
prototype for ‘program_imu_rlc_ram’ [-Wmissing-prototypes].
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
On 25/05/2022 12:26, Lionel Landwerlin wrote:
On 25/05/2022 11:24, Christian König wrote:
Am 25.05.22 um 08:47 schrieb Lionel Landwerlin:
On 09/02/2022 20:26, Christian König wrote:
It is illegal to add a dma_fence_chain as timeline point. Flatten out
the fences into a dma_fence_array
On 25/05/2022 11:24, Christian König wrote:
Am 25.05.22 um 08:47 schrieb Lionel Landwerlin:
On 09/02/2022 20:26, Christian König wrote:
It is illegal to add a dma_fence_chain as timeline point. Flatten out
the fences into a dma_fence_array instead.
Signed-off-by: Christian König
---
On Wednesday, May 25th, 2022 at 10:35, Michel Dänzer
wrote:
> > Mind that "max bpc" is always in auto. It's only an upper limit, with
> > the assumption that the driver can choose less.
>
> It seems to me like the "max bpc" property is just kind of bad API,
> and trying to tweak it to cater to
On 25.05.22 10:37, Jan Beulich wrote:
> On 25.05.2022 09:45, Thorsten Leemhuis wrote:
>> On 24.05.22 20:32, Chuck Zmudzinski wrote:
>>> On 5/21/22 6:47 AM, Thorsten Leemhuis wrote:
I'm not a developer and I'm don't known the details of this thread and
the backstory of the regression, but
On 2022-05-25 00:03, Alex Deucher wrote:
> On Tue, May 24, 2022 at 11:43 AM Ville Syrjälä
> wrote:
>> On Tue, May 24, 2022 at 11:36:22AM +0200, Hans de Goede wrote:
>>> Hi,
>>> On 5/23/22 13:54, Sebastian Wick wrote:
On Mon, May 23, 2022 at 10:23 AM Pekka Paalanen
wrote:
>
>
Am 25.05.22 um 08:47 schrieb Lionel Landwerlin:
On 09/02/2022 20:26, Christian König wrote:
It is illegal to add a dma_fence_chain as timeline point. Flatten out
the fences into a dma_fence_array instead.
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_syncobj.c | 61
On Wed, 25 May 2022 at 01:03, Marijn Suijten
wrote:
>
> On 2022-05-24 02:43:01, Dmitry Baryshkov wrote:
> > Hi,
> >
> > On Tue, 24 May 2022 at 00:38, Marijn Suijten
> > wrote:
> > >
> > > As stated in [1] I promised to tackle and send this series.
> > >
> > > parent_hw pointers are easier to
On 24.05.22 20:32, Chuck Zmudzinski wrote:
> On 5/21/22 6:47 AM, Thorsten Leemhuis wrote:
>> On 20.05.22 16:48, Chuck Zmudzinski wrote:
>>> On 5/20/2022 10:06 AM, Jan Beulich wrote:
On 20.05.2022 15:33, Chuck Zmudzinski wrote:
> On 5/20/2022 5:41 AM, Jan Beulich wrote:
>> On
Commit 58dca9810749 ("drm/msm/disp/dpu1: Add support for DSC in
encoder") added dsc_common_mode variable which was set to zero but then
again programmed, so drop the superfluous init.
Fixes: 58dca9810749 ("drm/msm/disp/dpu1: Add support for DSC in encoder")
Reported-by: kernel test robot
On Tue, 24 May 2022 14:33:20 -0400
Harry Wentland wrote:
> The supported EOTFs are defined in eotf_supported in drm_edid
> but userspace has no way of knowing what is and isn't supported
> when creating an HDR_OUTPUT_METADATA and will only know
> something is wrong when the atomic commit fails.
Alex Sierra writes:
> With DEVICE_COHERENT, we'll soon have vm_normal_pages() return
> device-managed anonymous pages that are not LRU pages. Although they
> behave like normal pages for purposes of mapping in CPU page, and for
> COW. They do not support LRU lists, NUMA migration or THP.
>
>
On Mon, 23 May 2022 13:54:50 +0200
Sebastian Wick wrote:
> I was always under the impression that if you do an atomic commit
> without changing any properties that it won't result in a mode set
> which would clearly make the current behavior a bug.
This is a very good point.
If one does an
On Wed, 25 May 2022 06:04:44 +
Simon Ser wrote:
> On Wednesday, May 25th, 2022 at 00:03, Alex Deucher
> wrote:
>
> > > Why would anyone want to run at 8bpc when they have a panel with
> > > higher color depth? So I think someone is going to be doing that
> > > modeset eventually anyway.
On 09/02/2022 20:26, Christian König wrote:
It is illegal to add a dma_fence_chain as timeline point. Flatten out
the fences into a dma_fence_array instead.
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_syncobj.c | 61 ---
1 file changed, 56
On Wednesday, May 25th, 2022 at 00:03, Alex Deucher
wrote:
> > Why would anyone want to run at 8bpc when they have a panel with
> > higher color depth? So I think someone is going to be doing that
> > modeset eventually anyway.
>
> We used to do something similar, but then got piles of bug
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