On Fri, 30 Dec 2022 12:55:08 +0100
Boris Brezillon wrote:
> On Fri, 30 Dec 2022 11:20:42 +0100
> Boris Brezillon wrote:
>
> > Hello Matthew,
> >
> > On Thu, 22 Dec 2022 14:21:11 -0800
> > Matthew Brost wrote:
> >
> > > In XE, the new Intel GPU driver, a choice has made to have a 1 to 1
>
On Sat, Dec 31, 2022 at 8:27 AM Abel Vesa wrote:
>
> The actual name is R133NW4K-R0.
>
> Fixes: 0f9fa5f58c784 ("drm/panel-edp: add IVO M133NW4J-R3 panel entry")
> Signed-off-by: Abel Vesa
> ---
>
> Assuming the information from here is correct:
>
On Sun, Jan 1, 2023 at 7:57 AM Dmitry Baryshkov
wrote:
>
> Support loading A200 firmware generated from the iMX firmware header
> files. The firmware lacks protection support, however it allows GPU to
> function properly while using the firmware files with clear license
> which allows
On Thu, Dec 29, 2022 at 2:47 AM Marijn Suijten
wrote:
>
> On 2022-12-29 11:18:45, Konrad Dybcio wrote:
> > So far the adreno quirks have all been assigned with an OR operator,
> > which is problematic, because they were assigned consecutive integer
> > values, which makes checking them with an
Hi!
> This series add support for the display present in the PinePhone Pro.
>
> Patch #1 adds a driver for panels using the Himax HX8394 panel controller,
> such as the HSD060BHW4 720x1440 TFT LCD panel present in the PinePhone Pro.
>
> Patch #2 adds a devicetree binding schema for this driver
The pull request you sent on Sun, 1 Jan 2023 13:57:06 +0100:
> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2023-01-01
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/8b41948296b76588f5ebaf7cbc5be5c803ece70a
Thank you!
--
Deet-doot-dot, I am a bot.
Linux 6.2-rc1 has memory leak on amdgpu, git bisect bad commit is
"drm/scheduler: rework entity flush, kill and fini".
git bisect start
# status: waiting for both good and bad commits
# good: [eb7081409f94a9a8608593d0fb63a1aa3d6f95d8] Linux 6.1-rc6
git bisect good
On 01/01/2023 18:38, Fabio Estevam wrote:
Hi Dmitry,
On Sun, Jan 1, 2023 at 12:58 PM Dmitry Baryshkov
wrote:
Support loading A200 firmware generated from the iMX firmware header
files. The firmware lacks protection support, however it allows GPU to
function properly while using the firmware
On 29/12/2022 12:18, Konrad Dybcio wrote:
So far the adreno quirks have all been assigned with an OR operator,
which is problematic, because they were assigned consecutive integer
values, which makes checking them with an AND operator kind of no bueno..
Switch to using BIT(n) so that only the
Hi Dmitry,
On Sun, Jan 1, 2023 at 12:58 PM Dmitry Baryshkov
wrote:
>
> Support loading A200 firmware generated from the iMX firmware header
> files. The firmware lacks protection support, however it allows GPU to
> function properly while using the firmware files with clear license
> which
Support loading A200 firmware generated from the iMX firmware header
files. The firmware lacks protection support, however it allows GPU to
function properly while using the firmware files with clear license
which allows redistribution.
Cc: Jonathan Marek
Signed-off-by: Dmitry Baryshkov
---
On 31/12/2022 23:50, Marijn Suijten wrote:
Since DPU 5.0.0 the TEARCHECK registers and interrupts moved out of the
PINGPONG block and into the INTF. Implement the necessary callbacks in
the INTF block, and use these callbacks together with the INTF_TEAR
interrupts
Signed-off-by: Marijn Suijten
On 31/12/2022 23:50, Marijn Suijten wrote:
All SoCs since DPU 5.0.0 (and seemingly up until and including 6.0.0,
but excluding 7.x.x) have the tear interrupt and control registers moved
out of the PINGPONG block and into the INTF block. Wire up the
necessary interrupts and IRQ masks on all
Hi Linus,
I'm just back from the mountains, and Dave is out at the beach and should
be back in a week again. Just i915 fixes and since Rodrigo bothered to
make the pull last week I figured I should warm up gpg and forward this in
a nice signed tag as a new years present! Hopefully still in time
On 31/12/2022 23:50, Marijn Suijten wrote:
From: Konrad Dybcio
Now that newer SoCs since DPU 5.0.0 manage tearcheck in the INTF instead
of PINGPONG block, move the struct definition to a common file. Also,
bring in documentation from msm-4.19 techpack while at it.
Signed-off-by: Konrad Dybcio
On Sat, 31 Dec 2022 at 23:52, Marijn Suijten
wrote:
>
> On 2022-12-31 22:50:02, Marijn Suijten wrote:
> > Since hardware revision 5.0.0 the TE configuration moved out of the
> > PINGPONG block into the INTF block, including vsync source selection
> > that was previously part of MDP top. Writing
On Sat, 31 Dec 2022 at 23:50, Marijn Suijten
wrote:
>
> Now that newer DPU platforms use a readpointer-done interrupt on the
> INTF block, stop providing the unused interrupt on the PINGPONG block.
>
> Signed-off-by: Marijn Suijten
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 10
On Fri, Dec 30, 2022 at 04:59:38AM -0500, Rodrigo Vivi wrote:
> Hi Dave and Daniel,
>
> Here goes the initial fixes for 6.2.
>
> The most critical ones seems to be the evict fix from Matt and
> the MIPI DSI from Jani. Both targeting stable trees.
>
> I'm sorry for sending this on a Friday and
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