Hi Conor,
On 7/29/23 12:19, Conor Dooley wrote:
On Fri, Jul 28, 2023 at 04:16:56PM +0200, Johannes Zink wrote:
Some Displays support more than just a single default LVDS data mapping,
which can be used to run displays on only 3 LVDS lanes in the jeida-18
data-mapping mode.
Add an optional data
On 28/07/2023 20:02, Jessica Zhang wrote:
Drop DPU_PLANE_COLOR_FILL_FLAG and check the DRM solid_fill property to
determine if the plane is solid fill. In addition drop the DPU plane
color_fill field as we can now use drm_plane_state.solid_fill instead,
and pass in drm_plane_state.alpha to _dpu_p
On 28/07/2023 20:02, Jessica Zhang wrote:
Since solid fill planes allow for a NULL framebuffer in a valid commit,
add NULL framebuffer checks to atomic commit calls within DPU.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 9 ++-
drivers/gpu/drm/msm/disp/d
On 28/07/2023 20:02, Jessica Zhang wrote:
Loosen the requirements for atomic and legacy commit so that, in cases
where pixel_source != FB, the commit can still go through.
This includes adding framebuffer NULL checks in other areas to account
for FB being NULL when non-FB pixel sources are enabl
On 28/07/2023 20:02, Jessica Zhang wrote:
Currently framebuffer checks happen directly in
drm_atomic_plane_check(). Move these checks into their own helper
method.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_atomic.c | 130 ---
1 file changed,
On 28/07/2023 20:02, Jessica Zhang wrote:
Add "SOLID_FILL" as a valid pixel source. If the pixel_source property is
set to "SOLID_FILL", it will display data from the drm_plane "solid_fill"
blob property.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/drm_blend.c | 10 +-
include/d
On 28/07/2023 20:02, Jessica Zhang wrote:
Document and add support for solid_fill property to drm_plane. In
addition, add support for setting and getting the values for solid_fill.
To enable solid fill planes, userspace must assign a property blob to
the "solid_fill" plane property containing th
On Monday, July 31, 2023 2:44 AM Jagan Teki wrote:
>
> On Thu, Jul 20, 2023 at 12:40 PM Ying Liu wrote:
> >
> > Introduce ->get_input_bus_fmts() callback to struct dw_mipi_dsi_plat_data
> > so that vendor drivers can implement specific methods to get input bus
> > formats for Synopsys DW MIPI DS
On Tue, Jul 25, 2023 at 5:48 PM Danilo Krummrich wrote:
> On 7/25/23 18:43, Danilo Krummrich wrote:
> > On 7/25/23 18:16, Faith Ekstrand wrote:
> >> Thanks for the detailed write-up! That would definitely explain it. If
> >> I remember, I'll try to do a single-threaded run or two. If your
> >> th
Add the description of @xcc_id in amdgpu_mm_wreg_mmio_rlc().
to silence the warning:
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:575: warning: Function parameter or
member 'xcc_id' not described in 'amdgpu_mm_wreg_mmio_rlc'
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug
On Thu, May 04, 2023 at 01:28:52AM -0400, Luben Tuikov wrote:
> On 2023-04-03 20:22, Matthew Brost wrote:
> > Add generic schedule message interface which sends messages to backend
> > from the drm_gpu_scheduler main submission thread. The idea is some of
> > these messages modify some state in drm
When building with W=1, the following warning occurs.
drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c:48:17: warning:
‘anx781x_i2c_addresses’ defined but not used [-Wunused-const-variable=] static
const u8 anx781x_i2c_addresses[] = {
^
drivers/gpu/drm/bri
Em 13/07/2023 04:51, Pekka Paalanen escreveu:
On Tue, 11 Jul 2023 10:57:57 +0200
Daniel Vetter wrote:
On Fri, Jul 07, 2023 at 07:40:59PM -0300, André Almeida wrote:
From: Pekka Paalanen
Specify how the atomic state is maintained between userspace and
kernel, plus the special case for async
On Thu, May 04, 2023 at 01:28:12AM -0400, Luben Tuikov wrote:
> On 2023-04-03 20:22, Matthew Brost wrote:
> > Add helper to set TDR timeout and restart the TDR with new timeout
> > value. This will be used in XE, new Intel GPU driver, to trigger the TDR
> > to cleanup drm_sched_entity that encounte
On Thu, May 04, 2023 at 01:23:05AM -0400, Luben Tuikov wrote:
> On 2023-04-03 20:22, Matthew Brost wrote:
> > If the TDR is set to a value, it can fire before a job is submitted in
> > drm_sched_main. The job should be always be submitted before the TDR
> > fires, fix this ordering.
> >
> > Signed
On Fri, Jun 09, 2023 at 08:58:39AM +0200, Boris Brezillon wrote:
> Hi Matthew,
>
> On Mon, 3 Apr 2023 17:22:02 -0700
> Matthew Brost wrote:
>
> > -static int drm_sched_main(void *param)
> > +static void drm_sched_main(struct work_struct *w)
> > {
> > - struct drm_gpu_scheduler *sched = (stru
On Sat, Jul 29, 2023 at 12:46:59AM +, Kasireddy, Vivek wrote:
> > Later the importer decides it needs the memory again so it again asks
> > for the dmabuf to be present, which does hmm_range_fault and gets
> > whatever is appropriate at the time.
> Unless I am missing something, I think just d
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 3
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/vc4/vc4_crtc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index bef9d45ef1df..959123759711 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/v
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/drm_connector.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 48df7a5ea503..39eab45649c8 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/dr
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/msm/msm_fb.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_fb.c b/drivers/gpu/drm/msm/msm_fb.c
index e3f61c39df69..80166f702a0d 100644
--- a/drivers/gpu/drm/msm/msm_fb.c
+++ b/drivers/gpu/drm/msm/msm
All callers should uniformly include a trailing newline, the vast
majority already do: 207 DRM_DEV_DEBUG, 1288 drm_dbg. Clean up the
remainders, in this and next commits (split for easy acks).
No functional changes.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/kmb/kmb_crtc.c | 10 +-
Most of the (~1500) DRM.debug callsites provide a trailing newline in
their format-strings. Fix the remainder to do the same.
no functional changes
Jim Cromie (5):
drm_dbg: add trailing newlines to remaining callsites
drm_dbg: add trailing newlines
drm_dbg: add trailing newlines
drm_dbg:
On Sun, Jul 30, 2023 at 09:57:06PM +0800, Zhu Yanjun wrote:
>
> 在 2023/7/30 19:18, Matthew Wilcox 写道:
> > On Sun, Jul 30, 2023 at 07:01:26PM +0800, Zhu Yanjun wrote:
> > > Does the following function have folio version?
> > >
> > > "
> > > int sg_alloc_append_table_from_pages(struct sg_append_tab
On 30/07/2023 22:52, Marijn Suijten wrote:
On 2023-07-30 03:35:18, Dmitry Baryshkov wrote:
As the INTF is fixed at the encoder creation time, we can move the
check whether INTF supports tearchck to dpu_encoder_phys_cmd_init().
This function can return an error if INTF doesn't have required featu
On 2023-07-30 03:35:18, Dmitry Baryshkov wrote:
> As the INTF is fixed at the encoder creation time, we can move the
> check whether INTF supports tearchck to dpu_encoder_phys_cmd_init().
> This function can return an error if INTF doesn't have required feature.
> Performing this check in dpu_encod
On 2023-07-30 03:35:12, Dmitry Baryshkov wrote:
> The DPU_PINGPONG_TE bit is set for all PINGPONG blocks on DPU < 5.0.
> Rather than checking for the flag, check for the presense of the
> corresponding interrupt line.
>
> Reviewed-by: Marijn Suijten
This patch changed significantly since the las
On 2023-07-30 03:35:11, Dmitry Baryshkov wrote:
> Inline the _setup_pingpong_ops() function, it makes it easier to handle
> different conditions involving PINGPONG configuration.
>
> Signed-off-by: Dmitry Baryshkov
Reviewed-by: Marijn Suijten
> ---
> .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.
On Sun, 30 Jul 2023 at 22:39, Marijn Suijten
wrote:
>
> On 2023-07-30 01:27:07, Dmitry Baryshkov wrote:
> > In preparation to reworking IRQ indcies, stop using raw indices in
> > kernel traces. Instead use a pair of register index and bit. This
> > corresponds closer to the values in HW catalog.
>
On 2023-07-30 01:27:07, Dmitry Baryshkov wrote:
> In preparation to reworking IRQ indcies, stop using raw indices in
> kernel traces. Instead use a pair of register index and bit. This
> corresponds closer to the values in HW catalog.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/m
On 2023-07-30 01:27:06, Dmitry Baryshkov wrote:
> In preparation to reworking IRQ indcies, stop using raw indices in
IRQ indices*
> kernel output (both printk and debugfs). Instead use a pair of register
> index and bit. This corresponds closer to the values in HW catalog.
>
> Signed-off-by: Dmi
On 2023-07-30 03:22:46, Dmitry Baryshkov wrote:
> On 27/07/2023 23:12, Marijn Suijten wrote:
> > On 2023-07-27 19:21:01, Dmitry Baryshkov wrote:
> >> The DPU_INTF_TE bit is set for all INTF blocks on DPU >= 5.0, however
> >> only INTF_1 and INTF_2 actually support tearing control. Rather than
> >>
On 2023-07-30 03:16:59, Dmitry Baryshkov wrote:
> >>> + if (!phys_enc->has_intf_te &&
> >>> + (!phys_enc->hw_pp ||
> >>> + !phys_enc->hw_pp->ops.enable_tearcheck)) {
> >>
> >> when is hw_pp assigned? Can't we also check that somewhere in an init
> >> phase?
> >
> > It would happen right
On 2023-07-30 02:18:10, Dmitry Baryshkov wrote:
> On 29/07/2023 21:31, Marijn Suijten wrote:
> > On 2023-07-29 02:59:32, Dmitry Baryshkov wrote:
> >> On 27/07/2023 23:03, Marijn Suijten wrote:
> >>> On 2023-07-27 19:20:58, Dmitry Baryshkov wrote:
> The DPU_PINGPONG_TE bit is set for all PINGPO
i.MX8MQ uses as secondary compatible fsl,imx6sx-lcdif, which triggers
requirement of power-domains, thou it's not required.
Fixes: f62678a77d58 ("dt-bindings: mxsfb: Document i.MX8M/i.MX6SX/i.MX6SL
power-domains property")
Signed-off-by: David Heidelberg
---
.../devicetree/bindings/display/fsl
On Thu, Jul 20, 2023 at 12:40 PM Ying Liu wrote:
>
> Introduce ->get_input_bus_fmts() callback to struct dw_mipi_dsi_plat_data
> so that vendor drivers can implement specific methods to get input bus
> formats for Synopsys DW MIPI DSI.
>
> While at it, implement a generic callback for ->atomic_get
On Wed, Jul 19, 2023 at 2:05 PM Ying Liu wrote:
>
> On Tuesday, July 18, 2023 6:51 PM Jagan Teki
> wrote:
> >
> > Hi,
>
> Hi,
>
> >
> > On Tue, Jul 18, 2023 at 3:19 PM Ying Liu wrote:
> > >
> > > On Tuesday, July 18, 2023 5:35 PM Jagan Teki
> > wrote:
> > > >
> > > > >
> > > > > Hi Jagan,
> >
Add audio support for it6505
1. Bridge to hdmi-codec to support audio feature. At the same time,
the function of automatically detecting audio is removed.
2. It is observed that some DP-to-HDMI dongles will get into bad
states if sending InfoFrame without audio data. Defer to enable
it650
If the speaker and hdmi are connect to the same port of I2S,
when try to switch to speaker playback, we will find that hdmi
is always turned on automatically. The connection as follows:
==> hdmi-codec ==> it6505(HDMI output)
DL1(FE) ==> I2S3(BE)
==>
Use SND_SOC_DAPM_LINE instead of SND_SOC_DAPM_OUTPUT to trigger
DAPM events to hdmi-codec when userspace control the DPAM pin.
Signed-off-by: Jiaxin Yu
---
sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c | 2 +-
sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c | 2 +-
2 files
The speaker and hdmi of mt8186 platform are shared the same port of I2S,
when connect the external display, use build-in speakers to play audio,
they both playback at the same time. So we want to manage the playback
device through DAPM events.
Jiaxin Yu (3):
ASoC: hdmi-codec: Add event handler f
On 7/29/23 21:26, Thomas Zimmermann wrote:
Change the infix for fbdev's DMA-memory helpers from _DMA_ to
_DMAMEM_. The helpers perform operations within DMA-able memory,
Since "DMA" stands for "Direct Memory Access", people already
know that it operates on memory. I don't think we need
to add "
On 7/29/2023 5:19 PM, Dmitry Baryshkov wrote:
On 30/07/2023 03:00, Abhinav Kumar wrote:
On 7/13/2023 6:55 PM, Dmitry Baryshkov wrote:
As we have dropped the variadic parts of SSPP sub-blocks declarations,
deduplicate them now, reducing memory cruft.
Signed-off-by: Dmitry Baryshkov
---
在 2023/7/30 19:18, Matthew Wilcox 写道:
On Sun, Jul 30, 2023 at 07:01:26PM +0800, Zhu Yanjun wrote:
Does the following function have folio version?
"
int sg_alloc_append_table_from_pages(struct sg_append_table *sgt_append,
struct page **pages, unsigned int n_pages, unsigned int
On Sun, Jul 30, 2023 at 07:01:26PM +0800, Zhu Yanjun wrote:
> Does the following function have folio version?
>
> "
> int sg_alloc_append_table_from_pages(struct sg_append_table *sgt_append,
> struct page **pages, unsigned int n_pages, unsigned int offset,
> unsigned lo
在 2023/6/22 0:45, Matthew Wilcox (Oracle) 写道:
This wrapper for sg_set_page() lets drivers add folios to a scatterlist
more easily. We could, perhaps, do better by using a different page
in the folio if offset is larger than UINT_MAX, but let's hope we get
a better data structure than this before
On Fri, Jul 28, 2023 at 08:35:41PM +0200, Sam Ravnborg wrote:
> Hi Thomas,
>
> On Fri, Jul 28, 2023 at 06:39:43PM +0200, Thomas Zimmermann wrote:
> > Most fbdev drivers operate on I/O memory. And most of those use the
> > default implementations for file I/O and console drawing. Convert all
> > th
Hi Thomas,
On Sat, Jul 29, 2023 at 09:26:45PM +0200, Thomas Zimmermann wrote:
> As discussed at [1], rename helpers for struct fb_ops to include
> 'MEM' in their name to signal that these helpers operate on a
> certain type of memory address; either I/O, system or DMA-able
> ranges. These are triv
-Baryshkov/drm-display-add-transparent-bridge-helper/20230730-044510
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
patch link:
https://lore.kernel.org/r/20230729204307.268587-3-dmitry.baryshkov%40linaro.org
patch subject: [PATCH 2/3] phy: qcom: qmp-combo: switch to DRM_SIM
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