With a value of '0' read from MSTM_CAP register MST to be enabled.
DP2.1 SCR updates the spec for 128/132b DP capable supporting only one
stream and not supporting single stream sideband MSG.
The underlying protocol will be MST to enable use of MTP.
Signed-off-by: Arun R Murthy
---
With DP2.1, multistream packetization and the underneth MST protocol
will be required for SST. So check for MSTM_CAP to see if MST is really
required and skip the MSTM_CTRL write so that we ensure that only the
underneth protocol and the multistream packetization will be enabled and
sink will not
On Thu, 25 Jan 2024 at 23:26, Dmitry Baryshkov
wrote:
>
> On 25/01/2024 21:38, Paloma Arellano wrote:
> > INTF_CONFIG2 register cannot have widebus enabled when DP format is
> > YUV420. Therefore, program the INTF to send 1 ppc.
>
> I think this is handled in the DP driver, where we disallow wide
On Sat, 27 Jan 2024 at 05:57, Abhinav Kumar wrote:
>
>
>
> On 1/26/2024 6:40 PM, Dmitry Baryshkov wrote:
> > On Sat, 27 Jan 2024 at 02:58, Paloma Arellano
> > wrote:
> >>
> >>
> >> On 1/25/2024 1:23 PM, Dmitry Baryshkov wrote:
> >>> On 25/01/2024 21:38, Paloma Arellano wrote:
> YUV420
On 1/26/2024 6:40 PM, Dmitry Baryshkov wrote:
On Sat, 27 Jan 2024 at 02:58, Paloma Arellano wrote:
On 1/25/2024 1:23 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano wrote:
YUV420 format is supported only in the VSC SDP packet and not through
MSA. Hence add an API which
On Mon, Jan 8, 2024 at 9:03 AM Alexander Stein
wrote:
>
> Hi Adam,
>
> thanks for pushing this forward.
>
> Am Samstag, 6. Januar 2024, 23:19:05 CET schrieb Adam Ford:
> > From: Lucas Stach
> >
> > This adds the driver for the Samsung HDMI PHY found on the
> > i.MX8MP SoC.
> >
> > Signed-off-by:
On Sat, 27 Jan 2024 at 02:58, Paloma Arellano wrote:
>
>
> On 1/25/2024 1:23 PM, Dmitry Baryshkov wrote:
> > On 25/01/2024 21:38, Paloma Arellano wrote:
> >> YUV420 format is supported only in the VSC SDP packet and not through
> >> MSA. Hence add an API which indicates the sink support which can
On Sat, 27 Jan 2024 at 02:48, Paloma Arellano wrote:
>
>
> On 1/25/2024 1:20 PM, Dmitry Baryshkov wrote:
> > On 25/01/2024 21:38, Paloma Arellano wrote:
> >> Wide bus is not supported when the mode is YUV420 in DP. In preparation
> >> for changing the DPU programming to reflect this, the value
On Sat, 27 Jan 2024 at 02:44, Paloma Arellano wrote:
>
>
> On 1/25/2024 1:16 PM, Dmitry Baryshkov wrote:
> > On 25/01/2024 21:38, Paloma Arellano wrote:
> >> Move dpu_encoder_helper_phys_setup_cdm to dpu_encoder in preparation for
> >> implementing CDM compatibility for DP.
> >
> > Nit: s/CDM
Regarding the idea of expanding userptr to support migration, we explored this
idea long time ago. It provides similar functions of the system allocator but
its interface is not as convenient as system allocator. Besides the shared
virtual address space, another benefit of a system allocator
On 1/25/2024 1:23 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano wrote:
YUV420 format is supported only in the VSC SDP packet and not through
MSA. Hence add an API which indicates the sink support which can be used
by the rest of the DP programming.
This API ideally should
On 1/25/2024 1:20 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano wrote:
Wide bus is not supported when the mode is YUV420 in DP. In preparation
for changing the DPU programming to reflect this, the value and
assignment location of wide_bus_en for the DP submodules must be
On 1/25/2024 1:16 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano wrote:
Move dpu_encoder_helper_phys_setup_cdm to dpu_encoder in preparation for
implementing CDM compatibility for DP.
Nit: s/CDM compatibility/YUV support/. It might make sense to spell it
out that YUV over
On 1/25/2024 1:14 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano wrote:
Generalize dpu_encoder_helper_phys_setup_cdm to be compatible with DP.
Signed-off-by: Paloma Arellano
---
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 4 +--
> -Original Message-
> From: Maxime Ripard
> Sent: Friday, January 26, 2024 4:26 AM
> To: Laurent Pinchart
> Cc: Klymenko, Anatoliy ;
> maarten.lankho...@linux.intel.com; tzimmerm...@suse.de; airl...@gmail.com;
> dan...@ffwll.ch; Simek, Michal ; dri-
> de...@lists.freedesktop.org;
On 1/26/2024 16:22, Hamza Mahfooz wrote:
We want programs besides the compositor to be able to enable or disable
panel power saving features. However, since they are currently only
configurable through DRM properties, that isn't possible. So, to remedy
that issue introduce a new
On 1/26/2024 10:26 AM, Dmitry Baryshkov wrote:
Finally drop separate "parsing" submodule. There is no need in it
anymore. All submodules handle DT properties directly rather than
passing them via the separate structure pointer.
Signed-off-by: Dmitry Baryshkov
Tested-by: Kuogee Hsieh
On 1/26/2024 10:26 AM, Dmitry Baryshkov wrote:
Remove two levels of indirection and fetch next bridge directly in
dp_display_probe_tail().
Signed-off-by: Dmitry Baryshkov
Tested-by: Kuogee Hsieh
Reviewed-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/dp/dp_display.c | 43
On 1/26/2024 10:26 AM, Dmitry Baryshkov wrote:
Instead of passing link properties through the separate struct, parse
them directly in the dp_panel.
Signed-off-by: Dmitry Baryshkov
Tested-by: Kuogee Hsieh
Reviewed-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/dp/dp_display.c | 8 -
On 1/26/2024 10:26 AM, Dmitry Baryshkov wrote:
Rather than parsing the I/O addresses from dp_parser and then passing
them via a struct pointer to dp_catalog, handle I/O region parsing in
dp_catalog and drop it from dp_parser.
Signed-off-by: Dmitry Baryshkov
Tested-by: Kuogee Hsieh
We want programs besides the compositor to be able to enable or disable
panel power saving features. However, since they are currently only
configurable through DRM properties, that isn't possible. So, to remedy
that issue introduce a new "panel_power_savings" sysfs attribute.
Cc: Mario
On 1/26/2024 10:26 AM, Dmitry Baryshkov wrote:
There is little point in going trough dp_parser->io indirection each
time the driver needs to access the PHY. Store the pointer directly in
dp_ctrl_private.
Signed-off-by: Dmitry Baryshkov
Tested-by: Kuogee Hsieh
Reviewed-by: Kuogee Hsieh
On 1/26/2024 10:26 AM, Dmitry Baryshkov wrote:
Inline dp_catalog_aux_update_cfg() and call phy_calibrate() from dp_aux
functions directly.
Signed-off-by: Dmitry Baryshkov
Tested-by: Kuogee Hsieh
Reviewed-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/dp/dp_aux.c | 9 +++--
On 1/26/2024 10:26 AM, Dmitry Baryshkov wrote:
There is little point in sharing phy configuration structure between
several modules. Move it to dp_ctrl, which becomes the only submodule
re-configuring the PHY.
Signed-off-by: Dmitry Baryshkov
Tested-by: Kuogee Hsieh
Reviewed-by: Kuogee
On Fri, Jan 26, 2024 at 04:16:58PM -0600, Lucas De Marchi wrote:
On Thu, Jan 18, 2024 at 05:38:16PM +0100, Thomas Hellström wrote:
On 1/17/24 13:27, Thomas Hellström wrote:
On 1/17/24 11:47, Thomas Hellström wrote:
Hi, Christian
Xe changes look good. Will send the series to xe ci to check
On 1/26/2024 10:26 AM, Dmitry Baryshkov wrote:
Split the dp_ctrl_clk_enable() beast into four functions, each of them
doing just a single item: enabling or disabling core or link clocks.
This allows us to cleanup the dss_module_power structure and makes
several dp_ctrl functions return void.
On 1/26/2024 10:26 AM, Dmitry Baryshkov wrote:
All supported platforms use the same clocks configuration. Instead of
parsing names from DT in a pretty complex manner, use the static
configuration. If at some point newer (or older) platforms have
different clock configuration, this clock config
On 1/26/2024 10:26 AM, Dmitry Baryshkov wrote:
There is only a single DP_STREAM_PM clock, stream_pixel. Instead of
using a separate dss_module_power instance for this single clock, handle
this clock directly. This allows us to drop several wrapping functions.
Signed-off-by: Dmitry Baryshkov
On 1/26/2024 10:26 AM, Dmitry Baryshkov wrote:
The dp_power submodule is limited to handling the clocks only following
previous cleanups. Fold it into the dp_ctrl submodule, removing one
unnecessary level of indirection.
Signed-off-by: Dmitry Baryshkov
Tested-by: Kuogee Hsieh
Reviewed-by:
On 1/26/2024 10:26 AM, Dmitry Baryshkov wrote:
In preparation to cleanup of the dp_power module, inline dp_power_init()
and dp_power_deinit() functions, which are now just turning the clocks
on and off.
Reviewed-by: Konrad Dybcio
Signed-off-by: Dmitry Baryshkov
Tested-by: Kuogee Hsieh
On 1/26/2024 10:26 AM, Dmitry Baryshkov wrote:
It makes little sense to split the submodule get and actual DT parsing.
Call dp_parser_parse() directly from dp_parser_get(), so that the parser
data is fully initialised once it is returned to the caller.
Reviewed-by: Konrad Dybcio
On 1/26/2024 10:26 AM, Dmitry Baryshkov wrote:
Drop unused and obsolete fields from struct dp_power_private.
Reviewed-by: Konrad Dybcio
Signed-off-by: Dmitry Baryshkov
Tested-by: Kuogee Hsieh
Reviewed-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/dp/dp_power.c | 3 ---
1 file changed, 3
On 1/26/2024 10:26 AM, Dmitry Baryshkov wrote:
Drop several unused and obsolete definitions from the dp_parser module.
Signed-off-by: Dmitry Baryshkov
Tested-by: Kuogee Hsieh
Reviewed-by: Kuogee Hsieh
---
drivers/gpu/drm/msm/dp/dp_parser.h | 46 --
On Thu, Jan 18, 2024 at 05:38:16PM +0100, Thomas Hellström wrote:
On 1/17/24 13:27, Thomas Hellström wrote:
On 1/17/24 11:47, Thomas Hellström wrote:
Hi, Christian
Xe changes look good. Will send the series to xe ci to check for
regressions.
Hmm, there are some checkpatch warnings about
The pull request you sent on Sat, 27 Jan 2024 04:56:27 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2024-01-27
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/168174d78157bba1315d5f8e1c66548b92c84ae9
Thank you!
--
Deet-doot-dot, I am a bot.
Hello Ondřej,
On Fri, Jan 05, 2024 at 05:48:46PM +0100, Ondřej Jirman wrote:
> On Fri, Jan 05, 2024 at 05:11:03PM +0100, Manuel Traut wrote:
> > On Wed, Jan 03, 2024 at 10:42:54AM +0100, Ondřej Jirman wrote:
> > > Hello Manuel,
> > >
> > > a few more things I noticed:
> > >
> > > On Tue, Jan
On Fri, 26 Jan 2024 at 20:26, Dmitry Baryshkov
wrote:
>
> Reshuffle code in the DP driver, cleaning up clocks and DT parsing and
> dropping the dp_power and dp_parser submodules.
>
> Initially I started by looking onto stream_pixel clock handling only to
> find several wrapping layers around a
> -Original Message-
> From: Christian König
> Sent: Friday, January 26, 2024 5:10 AM
> To: Zeng, Oak ; David Airlie
> Cc: Ghimiray, Himal Prasad ;
> thomas.hellst...@linux.intel.com; Winiarski, Michal
> ; Felix Kuehling ; Welty,
> Brian ; Shah, Ankur N ; dri-
>
From: Martin Krastev
Implement drm_connector_helper_funcs.mode_valid and .get_modes,
replacing custom drm_connector_funcs.fill_modes code with
drm_helper_probe_single_connector_modes; for STDU, LDU & SOU
display units.
Signed-off-by: Martin Krastev
Reviewed-by: Zack Rusin
Signed-off-by: Zack
The cleanup can be dispatched while the atomic update is still active,
which means that the memory acquired in the atomic update needs to
not be invalidated by the cleanup. The buffer objects in vmw_plane_state
instead of using the builtin map_and_cache were trying to handle
the lifetime of the
From: Maaz Mombasawala
There is no real need to have a separate pool for shareable and
non-shareable surfaces. Make all surfaces shareable, regardless of whether
the drm_vmw_surface_flag_shareable has been specified.
Signed-off-by: Maaz Mombasawala
Reviewed-by: Martin Krastev
Signed-off-by:
From: Maaz Mombasawala
Update vmwgfx_drm.h with SPDX-License-Identifier:
(GPL-2.0 WITH Linux-syscall-note) OR MIT
Signed-off-by: Maaz Mombasawala
Reviewed-by: Martin Krastev
Signed-off-by: Zack Rusin
---
include/uapi/drm/vmwgfx_drm.h | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Martin Krastev
The fencing of MOB creation used in vmw_du_get_cursor_mob was incompatible
with register-based device communication employed by this routine. As a
result cursor MOB creation was racy, leading to potentially broken/missing
mouse cursor on desktops using CursorMob device
A small backlogged series with various fixes mostly related to kms.
Use the drm internal kms modelist instead of rolling out own version and
fix two issues related to cursor handling.
Maaz's patches were already on dri-devel but patchworks doesn't deal
very well with changes in email address and
On 2024-01-26 09:28, Melissa Wen wrote:
Replace raw edid handling (struct edid) with the opaque EDID type
(struct drm_edid) on amdgpu_dm_connector for consistency. It may also
prevent mismatch of approaches in different parts of the driver code.
Working in progress. There are a couple of cast
Hey Linus,
Lots going on for rc2, ivpu has a bunch of stabilisation and debugging
work, then amdgpu and xe are the main fixes. i915, exynos have a few,
then some misc panel and bridge fixes.
Worth mentioning are 3 regression reverts. One of the nouveau fixes in
6.7 for a serious deadlock had
Some manufacturers have intentionally put an EDID that differs from
the EDID on the internal panel on laptops.
Attempt to fetch this EDID if it exists and prefer it over the EDID
that is provided by the panel.
Signed-off-by: Mario Limonciello
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h |
The ACPI specification allows for an EDID to be up to 512 bytes but
the _DDC EDID fetching code will only try up to 256 bytes.
Modify the code to instead start at 512 bytes and work it's way
down instead.
Link:
Some laptops ship an EDID in the BIOS encoded in the _DDC method that
differs than the EDID directly on the laptop panel for $REASONS.
This is the EDID that is used by the AMD Windows driver, and so sometimes
different results are found in different operating systems.
This series changes it so
Just FYI this conflictted pretty heavily with drm-misc-next changes in
the same area, someone should check drm-tip has the correct
resolution, I'm not really sure what is definitely should be.
Dave.
On Fri, 19 Jan 2024 at 16:37, Inki Dae wrote:
>
> Really sorry for late. Will pick it up.
>
>
Instead of passing link properties through the separate struct, parse
them directly in the dp_panel.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_display.c | 8 -
drivers/gpu/drm/msm/dp/dp_display.h | 1 -
drivers/gpu/drm/msm/dp/dp_panel.c | 66
The dp_power submodule is limited to handling the clocks only following
previous cleanups. Fold it into the dp_ctrl submodule, removing one
unnecessary level of indirection.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Makefile| 1 -
drivers/gpu/drm/msm/dp/dp_ctrl.c|
Remove two levels of indirection and fetch next bridge directly in
dp_display_probe_tail().
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_display.c | 43 -
drivers/gpu/drm/msm/dp/dp_parser.c | 14
Finally drop separate "parsing" submodule. There is no need in it
anymore. All submodules handle DT properties directly rather than
passing them via the separate structure pointer.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Makefile| 1 -
drivers/gpu/drm/msm/dp/dp_aux.h
Split the dp_ctrl_clk_enable() beast into four functions, each of them
doing just a single item: enabling or disabling core or link clocks.
This allows us to cleanup the dss_module_power structure and makes
several dp_ctrl functions return void.
Signed-off-by: Dmitry Baryshkov
---
There is little point in sharing phy configuration structure between
several modules. Move it to dp_ctrl, which becomes the only submodule
re-configuring the PHY.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 19 -
drivers/gpu/drm/msm/dp/dp_catalog.h
There is little point in going trough dp_parser->io indirection each
time the driver needs to access the PHY. Store the pointer directly in
dp_ctrl_private.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_ctrl.c| 37 +
Inline dp_catalog_aux_update_cfg() and call phy_calibrate() from dp_aux
functions directly.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_aux.c | 9 +++--
drivers/gpu/drm/msm/dp/dp_aux.h | 1 +
drivers/gpu/drm/msm/dp/dp_catalog.c | 12
In preparation to cleanup of the dp_power module, inline dp_power_init()
and dp_power_deinit() functions, which are now just turning the clocks
on and off.
Reviewed-by: Konrad Dybcio
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_display.c | 4 ++--
Rather than parsing the I/O addresses from dp_parser and then passing
them via a struct pointer to dp_catalog, handle I/O region parsing in
dp_catalog and drop it from dp_parser.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 125 ++--
There is only a single DP_STREAM_PM clock, stream_pixel. Instead of
using a separate dss_module_power instance for this single clock, handle
this clock directly. This allows us to drop several wrapping functions.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_ctrl.c | 91
All supported platforms use the same clocks configuration. Instead of
parsing names from DT in a pretty complex manner, use the static
configuration. If at some point newer (or older) platforms have
different clock configuration, this clock config can be moved to the
device data.
Signed-off-by:
It makes little sense to split the submodule get and actual DT parsing.
Call dp_parser_parse() directly from dp_parser_get(), so that the parser
data is fully initialised once it is returned to the caller.
Reviewed-by: Konrad Dybcio
Signed-off-by: Dmitry Baryshkov
---
Drop unused and obsolete fields from struct dp_power_private.
Reviewed-by: Konrad Dybcio
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_power.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_power.c
b/drivers/gpu/drm/msm/dp/dp_power.c
index
Reshuffle code in the DP driver, cleaning up clocks and DT parsing and
dropping the dp_power and dp_parser submodules.
Initially I started by looking onto stream_pixel clock handling only to
find several wrapping layers around a single clocks. After inlining
and/or dropping them (and thus
Drop several unused and obsolete definitions from the dp_parser module.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dp/dp_parser.h | 46 --
1 file changed, 46 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h
On 1/26/2024 5:28 AM, Jacek Lawrynowicz wrote:
From: Grzegorz Trzebiatowski
Add DRM_IVPU_JOB_STATUS_ABORTED to indicate that the job was aborted
by the driver due to e.g. TDR or user context MMU faults.
This will help UMD and tests distinguish if job was aborted by the FW
or the driver.
On 1/26/2024 5:28 AM, Jacek Lawrynowicz wrote:
From: Krystian Pradzynski
This parameter was never used by the 40xx FW.
Signed-off-by: Krystian Pradzynski
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 1/26/2024 5:28 AM, Jacek Lawrynowicz wrote:
From: Krystian Pradzynski
All recent 40xx firmware already supports D0i3 entry message and this
WA is no longer needed.
Can I assume that the workaround only applies to pre-production firmware?
On 1/26/2024 5:28 AM, Jacek Lawrynowicz wrote:
From: "Wachowski, Karol"
Replace forceful disable of power domains with requests to disable
TOP NOC CPU_CTRL and HOSTIF_L2CACHE through QREQN.
In case of failure retry multiple times following HAS sequence of
checking both QACCEPN and QDENYN
On 1/26/2024 10:28, Melissa Wen wrote:
Hi,
I'm debugging a null-pointer dereference when running
igt@kms_connector_force_edid and the way I found to solve the bug is to
stop using raw edid handler in amdgpu_connector_funcs_force and
create_eml_sink in favor of managing resouces via sruct
On 1/26/2024 5:28 AM, Jacek Lawrynowicz wrote:
NPU does not require this delay regardless of the generation.
All generations are integrated into the SOC.
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 1/26/2024 5:27 AM, Jacek Lawrynowicz wrote:
From: "Wachowski, Karol"
Do not use kernel CIRC_SPACE and CIRC_CNT that
incorrectly return space of a queue when wrap bit was set.
Use correct implementation that compares producer, consumer and
wrap bit values.
Without this fix it was possible
On 1/26/2024 5:27 AM, Jacek Lawrynowicz wrote:
From: "Wachowski, Karol"
Set AW_SNOOP_OVERRIDE bit in VPU_37/40XX_HOST_IF_TCU_PTW_OVERRIDES
to force snooping for MMU write accesses (setting event queue events).
MMU event queue buffer is the only buffer written by MMU and
mapped as write-back
On Fri, 26 Jan 2024 19:27:49 +0300
Dmitry Osipenko wrote:
> On 1/26/24 12:55, Boris Brezillon wrote:
> > On Fri, 26 Jan 2024 00:56:47 +0300
> > Dmitry Osipenko wrote:
> >
> >> On 1/25/24 13:19, Boris Brezillon wrote:
> >>> On Fri, 5 Jan 2024 21:46:16 +0300
> >>> Dmitry Osipenko wrote:
>
On 1/22/2024 5:09 AM, Jacek Lawrynowicz wrote:
- Synchronize job submission with reset/recovery using reset_lock
- Always print recovery reason and call diagnose_failure()
- Don't allow for autosupend during recovery
- Prevent immediate autosuspend after reset/recovery
- Prevent
On 1/22/2024 5:09 AM, Jacek Lawrynowicz wrote:
- Wake up the device as late as possible
Can you amend with why this is a good idea?
- Remove job reference counting in order to simplify the code
- Don't put jobs that are not fully submitted on submitted_jobs_xa in
order to avoid potential
On 1/22/2024 5:09 AM, Jacek Lawrynowicz wrote:
- Add context_list_lock to synchronize user context addition/removal
- Use drm_dev_enter() to prevent unbinding the device during ivpu_open()
and vpu address allocation
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 1/26/24 1:25 AM, Kasireddy, Vivek wrote:
Currently this driver creates a SGT table using the CPU as the
target device, then performs the dma_sync operations against
that SGT. This is backwards to how DMA-BUFs are supposed to behave.
This may have worked for the case where these buffers were
On Wed, Jan 24 2024 at 20:59, Byungchul Park wrote:
Why is lockdep in the subsystem prefix here? You are changing the CPU
hotplug (not hotplus) code, right?
> cb92173d1f0 ("locking/lockdep, cpu/hotplug: Annotate AP thread") was
> introduced to make lockdep_assert_cpus_held() work in AP thread.
>
Hello Alex,
On Fri, Jan 26, 2024 at 08:56:33AM -0600, Alex Elder wrote:
> On 1/25/24 6:09 AM, Uwe Kleine-König wrote:
> > This function allocates a struct pwm_chip and driver data. Compared to
> > the status quo the split into pwm_chip and driver data is new, otherwise
> > it doesn't change
On 1/15/2024 6:44 AM, Jacek Lawrynowicz wrote:
From: "Wachowski, Karol"
DRM_IVPU_PARAM_CONTEXT_PRIORITY has been deprecated because it
has been replaced with DRM_IVPU_JOB_PRIORITY levels set with
submit IOCTL and was unused anyway.
Signed-off-by: Wachowski, Karol
Signed-off-by: Jacek
On 1/25/24 2:30 PM, Daniel Vetter wrote:
On Tue, Jan 23, 2024 at 04:12:26PM -0600, Andrew Davis wrote:
Currently this driver creates a SGT table using the CPU as the
target device, then performs the dma_sync operations against
that SGT. This is backwards to how DMA-BUFs are supposed to behave.
Hi Alex,
On Fri, Jan 26, 2024 at 09:12:02AM -0600, Alex Elder wrote:
> On 1/22/24 5:41 AM, Sakari Ailus wrote:
> > There are two ways to opportunistically increment a device's runtime PM
> > usage count, calling either pm_runtime_get_if_active() or
> > pm_runtime_get_if_in_use(). The former has
On 1/15/2024 6:44 AM, Jacek Lawrynowicz wrote:
Make debug logs more readable and consistent:
- don't print handle as it is not always available for all buffers
- use hashed ivpu_bo ptr as main buffer identifier
- remove unused fields from ivpu_bo_print_info()
Signed-off-by: Jacek
On 1/15/2024 6:44 AM, Jacek Lawrynowicz wrote:
This was not supported properly. A buffer was imported to another VPU
context as a separate buffer object with duplicated sgt.
Both exported and imported buffers could be DMA mapped causing a double
mapping on the same device.
Buffers imported from
On 1/26/2024 12:57 AM, Yannic Moog wrote:
From: Primoz Fiser
Add support for the EDT ETML1010G3DRA 10.1" 1280x800 LVDS panel.
Datasheet can be found at [1].
[1]
https://www.glynshop.com/erp/owweb/Daten/DSS/EDT/Products/Specifications/Active%20Displays/ETML1010G3DRA%20Ver.3-RoHS.pdf
Hi,
I'm debugging a null-pointer dereference when running
igt@kms_connector_force_edid and the way I found to solve the bug is to
stop using raw edid handler in amdgpu_connector_funcs_force and
create_eml_sink in favor of managing resouces via sruct drm_edid helpers
(Patch 1). The proper solution
Replace raw edid handling (struct edid) with the opaque EDID type
(struct drm_edid) on amdgpu_dm_connector for consistency. It may also
prevent mismatch of approaches in different parts of the driver code.
Working in progress. There are a couple of cast warnings and it was only
tested with IGT.
Use drm_edid helpers to fix a null-pointer derefence that happens when
running igt@kms_force_connector_basic in a system with DCN2.1 and HDMI
connector detected as below:
[ +0.178146] BUG: kernel NULL pointer dereference, address: 04c0
[ +0.10] #PF: supervisor read access in
The dma sync operation needs to be done with DMA_BIDIRECTIONAL when
the BO is prepared for both read and write operations. With the
current inverted if ladder it would only be synced for DMA_FROM_DEVICE.
Fixes: a8c21a5451d8 ("drm/etnaviv: add initial etnaviv DRM driver")
Signed-off-by: Lucas
The etnaviv devcoredump is created in the GPU reset path, which
must make forward progress to avoid stalling memory reclaim on
unsignalled dma fences. The currently used __GFP_NORETRY does not
prohibit sleeping on direct reclaim, breaking the forward progress
guarantee. Switch to GFP_NOWAIT, which
On 1/26/24 13:18, Boris Brezillon wrote:
> On Thu, 25 Jan 2024 18:24:04 +0100
> Daniel Vetter wrote:
>
>> On Fri, Jan 05, 2024 at 09:46:03PM +0300, Dmitry Osipenko wrote:
>>> Add lockless drm_gem_shmem_get_pages() helper that skips taking reservation
>>> lock if pages_use_count is non-zero,
Am 25.01.24 um 19:01 schrieb Daniel Vetter:
On Thu, Jan 25, 2024 at 04:00:16PM +0100, Christian König wrote:
Am 24.01.24 um 11:58 schrieb Paul Cercueil:
[SNIP]
The problem was then that dma_buf_unmap_attachment cannot be called
before the dma_fence is signaled, and calling it after is already
On Fri, Jan 26, 2024 at 11:32:57AM +0100, Christian König wrote:
> Am 25.01.24 um 18:30 schrieb Matthew Brost:
> > On Thu, Jan 25, 2024 at 04:12:58PM +0100, Christian König wrote:
> > >
> > > Am 24.01.24 um 22:08 schrieb Matthew Brost:
> > > > All entities must be drained in the DRM scheduler run
On 1/26/24 12:55, Boris Brezillon wrote:
> On Fri, 26 Jan 2024 00:56:47 +0300
> Dmitry Osipenko wrote:
>
>> On 1/25/24 13:19, Boris Brezillon wrote:
>>> On Fri, 5 Jan 2024 21:46:16 +0300
>>> Dmitry Osipenko wrote:
>>>
+static bool drm_gem_shmem_is_evictable(struct drm_gem_shmem_object
Hey,
On Fri, Jan 26, 2024 at 09:57:23AM +0100, Yannic Moog wrote:
> Add Emerging Display Technology Corp. etml1010g3dra 10.1" LCD-TFT LVDS
> panel compatible string.
>
> Signed-off-by: Yannic Moog
> [PATCH RFC for upstream 1/4]
The "for upstream" here is not really relevant, what else would
From: Magali Lemes
This commit adds unit tests to the functions dcn20_cap_soc_clocks and
dcn21_update_bw_bounding_box from dcn20/dcn20_fpu.
Signed-off-by: Magali Lemes
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/tests/Makefile| 3 +-
From: Maíra Canal
Explain how to run the KUnit tests present in the AMDGPU's Display
Core and clarify which architectures and tools can be used to run
the tests. Moreover, explains how to add new tests to the existing
tests.
Signed-off-by: Maíra Canal
---
From: Maíra Canal
Add a unit test to the SubVP feature in order to avoid possible
regressions and ensure code robustness. In particular, this new test
validates the expected parameters when using 4k144 and 4k240 displays.
Signed-off-by: Maíra Canal
Signed-off-by: Rodrigo Siqueira
Reported-by:
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