On 2/22/2024 3:43 AM, Dmitry Baryshkov wrote:
The DPU driver provides support for 4:2:0 planar YCbCr plane formats.
Extend it to also support 4:2:2 and 4:4:4 plat formats.
I checked myself and also internally on this. On sm8250, the DPU planes
do not support YUV444 and YUV422 (and the
On 2/23/2024 11:35 AM, Rodrigo Vivi wrote:
On Fri, Feb 23, 2024 at 09:47:11AM -0800, Abhinav Kumar wrote:
CC Dmitry
Hi Rodrigo
On 2/23/2024 9:00 AM, Rodrigo Vivi wrote:
On Fri, Feb 23, 2024 at 08:50:06AM -0700, Jeffrey Hugo wrote:
With the x86_64_defconfig I see the following when
: Daniel Vetter
Cc: Dmitry Baryshkov
Cc: Abhinav Kumar
Cc: Maxime Ripard
Cc: Maarten Lankhorst
Cc: Thomas Zimmermann
Signed-off-by: Rodrigo Vivi
Reviewed-by: Abhinav Kumar
CC Dmitry
Hi Rodrigo
On 2/23/2024 9:00 AM, Rodrigo Vivi wrote:
On Fri, Feb 23, 2024 at 08:50:06AM -0700, Jeffrey Hugo wrote:
With the x86_64_defconfig I see the following when building drm-misc-next:
CC drivers/gpu/drm/i915/display/intel_crt.o
CC
once. Rest LGTM.
Reviewed-by: Abhinav Kumar
the DPU will not vote more than nominal.
And like others wrote, limiting SOC frequencies is not the way and we
should filter out required frequencies using link-frequencies.
Hence fwiw, I am fine with this change.
Reviewed-by: Abhinav Kumar
On 2/20/2024 2:42 PM, Dmitry Baryshkov wrote:
On Wed, 21 Feb 2024 at 00:40, Abhinav Kumar wrote:
On 2/19/2024 3:52 AM, Dmitry Baryshkov wrote:
On Wed, 14 Feb 2024 at 22:36, Abhinav Kumar wrote:
On 2/14/2024 11:20 AM, Dmitry Baryshkov wrote:
On Wed, 14 Feb 2024 at 20:02, Abhinav
On 2/19/2024 3:52 AM, Dmitry Baryshkov wrote:
On Wed, 14 Feb 2024 at 22:36, Abhinav Kumar wrote:
On 2/14/2024 11:20 AM, Dmitry Baryshkov wrote:
On Wed, 14 Feb 2024 at 20:02, Abhinav Kumar wrote:
On 2/8/2024 6:50 AM, Dmitry Baryshkov wrote:
We have several reports of vblank timeout
Hi Johan
On 2/19/2024 2:41 AM, Johan Hovold wrote:
On Sat, Feb 17, 2024 at 04:14:58PM +0100, Johan Hovold wrote:
On Wed, Feb 14, 2024 at 02:52:06PM +0100, Johan Hovold wrote:
On Tue, Feb 13, 2024 at 10:00:13AM -0800, Abhinav Kumar wrote:
Since Dmitry had trouble reproducing this issue I
Currently the size parameter of drm_dp_vsc_sdp_pack() is always
the size of struct dp_sdp. Hence lets drop this parameter and
use sizeof() directly.
Suggested-by: Dmitry Baryshkov
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/display/drm_dp_helper.c | 8 ++--
drivers/gpu/drm/i915
intel_dp_vsc_sdp_pack() can be re-used by other DRM drivers as well.
Lets move this to drm_dp_helper to achieve this.
changes in v2:
- rebased on top of drm-tip
Acked-by: Dmitry Baryshkov
Signed-off-by: Abhinav Kumar
Acked-by: Jani Nikula
---
drivers/gpu/drm/display/drm_dp_helper.c
On 2/20/2024 11:41 AM, Ville Syrjälä wrote:
On Tue, Feb 20, 2024 at 11:27:18AM -0800, Abhinav Kumar wrote:
On 2/20/2024 11:20 AM, Dmitry Baryshkov wrote:
On Tue, 20 Feb 2024 at 21:05, Dmitry Baryshkov
wrote:
On Tue, 20 Feb 2024 at 20:53, Abhinav Kumar wrote:
On 2/20/2024 10:49 AM
On 2/20/2024 11:20 AM, Dmitry Baryshkov wrote:
On Tue, 20 Feb 2024 at 21:05, Dmitry Baryshkov
wrote:
On Tue, 20 Feb 2024 at 20:53, Abhinav Kumar wrote:
On 2/20/2024 10:49 AM, Dmitry Baryshkov wrote:
On Thu, 15 Feb 2024 at 21:08, Abhinav Kumar wrote:
intel_dp_vsc_sdp_pack() can
On 2/20/2024 11:05 AM, Dmitry Baryshkov wrote:
On Tue, 20 Feb 2024 at 20:53, Abhinav Kumar wrote:
On 2/20/2024 10:49 AM, Dmitry Baryshkov wrote:
On Thu, 15 Feb 2024 at 21:08, Abhinav Kumar wrote:
intel_dp_vsc_sdp_pack() can be re-used by other DRM drivers as well.
Lets move
On 2/20/2024 10:49 AM, Dmitry Baryshkov wrote:
On Thu, 15 Feb 2024 at 21:08, Abhinav Kumar wrote:
intel_dp_vsc_sdp_pack() can be re-used by other DRM drivers as well.
Lets move this to drm_dp_helper to achieve this.
changes in v2:
- rebased on top of drm-tip
Acked-by: Dmitry
Hi DRM maintainers
Gentle ping for reviews on this one.
Since the dependent series is mostly complete, would like to get your
reviews on this one to land it.
Thanks
Abhinav
On 2/15/2024 11:15 AM, Abhinav Kumar wrote:
From: Paloma Arellano
YUV420 format is supported only in the VSC SDP
to
drm_dp_helper.c
[1]: https://patchwork.freedesktop.org/series/129180/
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Paloma Arellano
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/display/drm_dp_helper.c | 23 +++
include/drm/display/drm_dp_helper.h | 2 ++
2 files
intel_dp_vsc_sdp_pack() can be re-used by other DRM drivers as well.
Lets move this to drm_dp_helper to achieve this.
changes in v2:
- rebased on top of drm-tip
Acked-by: Dmitry Baryshkov
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/display/drm_dp_helper.c | 78
On 2/15/2024 12:40 AM, Dmitry Baryshkov wrote:
On Wed, 14 Feb 2024 at 22:15, Abhinav Kumar wrote:
On 2/14/2024 11:39 AM, Dmitry Baryshkov wrote:
On Wed, 14 Feb 2024 at 20:04, Paloma Arellano wrote:
Add support to pack and send the VSC SDP packet for DP. This therefore
allows
On 2/15/2024 12:45 AM, Dmitry Baryshkov wrote:
On Wed, 14 Feb 2024 at 20:04, Paloma Arellano wrote:
Adjust the encoder format programming in the case of video mode for DP
to accommodate CDM related changes.
Changes in v2:
- Move timing engine programming to a separate patch from
On 2/14/2024 11:20 AM, Dmitry Baryshkov wrote:
On Wed, 14 Feb 2024 at 20:02, Abhinav Kumar wrote:
On 2/8/2024 6:50 AM, Dmitry Baryshkov wrote:
We have several reports of vblank timeout messages. However after some
debugging it was found that there might be different causes
On 2/14/2024 11:39 AM, Dmitry Baryshkov wrote:
On Wed, 14 Feb 2024 at 20:04, Paloma Arellano wrote:
Add support to pack and send the VSC SDP packet for DP. This therefore
allows the transmision of format information to the sinks which is
needed for YUV420 support over DP.
Changes in v3:
On 9/13/2023 10:06 PM, Dmitry Baryshkov wrote:
Take into account the plane rotation and flipping when calculating src
positions for the wide plane parts.
This is not an issue yet, because rotation is only supported for the
UBWC planes and wide UBWC planes are rejected anyway because in
On 9/13/2023 10:06 PM, Dmitry Baryshkov wrote:
Provide atomic_print_state callback to the DPU's private object. This
way the debugfs/dri/0/state will also include RM's internal state.
I like this idea !
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 4
On 9/13/2023 10:06 PM, Dmitry Baryshkov wrote:
The helper drm_atomic_helper_check_plane_state() runs several checks on
plane src and dst rectangles, including the check whether required
scaling fits into the required margins. The msm driver would benefit
from having a function that does all
On 2/14/2024 10:02 AM, Ville Syrjälä wrote:
On Wed, Feb 14, 2024 at 09:17:34AM -0800, Abhinav Kumar wrote:
On 2/14/2024 12:15 AM, Dmitry Baryshkov wrote:
On Wed, 14 Feb 2024 at 01:45, Abhinav Kumar wrote:
intel_dp_vsc_sdp_pack() can be re-used by other DRM drivers as well.
Lets move
On 2/8/2024 6:50 AM, Dmitry Baryshkov wrote:
We have several reports of vblank timeout messages. However after some
debugging it was found that there might be different causes to that.
To allow us to identify the DPU block that gets stuck, include the
actual CTL_FLUSH value into the timeout
On 2/14/2024 12:15 AM, Dmitry Baryshkov wrote:
On Wed, 14 Feb 2024 at 01:45, Abhinav Kumar wrote:
intel_dp_vsc_sdp_pack() can be re-used by other DRM drivers as well.
Lets move this to drm_dp_helper to achieve this.
Signed-off-by: Abhinav Kumar
My preference would be to have packing
intel_dp_vsc_sdp_pack() can be re-used by other DRM drivers as well.
Lets move this to drm_dp_helper to achieve this.
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/display/drm_dp_helper.c | 78 +
drivers/gpu/drm/i915/display/intel_dp.c | 73
On 2/13/2024 1:16 PM, Dmitry Baryshkov wrote:
On Tue, 13 Feb 2024 at 23:10, Abhinav Kumar wrote:
On 2/13/2024 11:31 AM, Dmitry Baryshkov wrote:
On Tue, 13 Feb 2024 at 20:46, Abhinav Kumar wrote:
On 2/13/2024 10:23 AM, Dmitry Baryshkov wrote:
On Tue, 13 Feb 2024 at 19:32, Abhinav
On 2/13/2024 11:31 AM, Dmitry Baryshkov wrote:
On Tue, 13 Feb 2024 at 20:46, Abhinav Kumar wrote:
On 2/13/2024 10:23 AM, Dmitry Baryshkov wrote:
On Tue, 13 Feb 2024 at 19:32, Abhinav Kumar wrote:
On 2/13/2024 3:18 AM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 03:53, Paloma
On 2/13/2024 10:23 AM, Dmitry Baryshkov wrote:
On Tue, 13 Feb 2024 at 19:32, Abhinav Kumar wrote:
On 2/13/2024 3:18 AM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 03:53, Paloma Arellano wrote:
Adjust the encoder format programming in the case of video mode for DP
to accommodate
Hi Johan
Thanks for the report.
I do agree that pm runtime eDP driver got merged that time but I think
the issue is either a combination of that along with DRM aux bridge
https://patchwork.freedesktop.org/series/122584/ OR just the latter as
even that went in around the same time.
Thats
On 2/13/2024 3:18 AM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 03:53, Paloma Arellano wrote:
Adjust the encoder format programming in the case of video mode for DP
to accommodate CDM related changes.
Changes in v2:
- Move timing engine programming to a separate patch from
On 2/12/2024 1:20 PM, Dmitry Baryshkov wrote:
On Mon, 12 Feb 2024 at 23:13, Abhinav Kumar wrote:
On 2/10/2024 1:17 PM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 21:19, Abhinav Kumar wrote:
On 2/10/2024 3:33 AM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 03:52, Paloma
| 1 +
1 file changed, 1 insertion(+)
Nice catch !!
Reviewed-by: Abhinav Kumar
On 2/10/2024 1:17 PM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 21:19, Abhinav Kumar wrote:
On 2/10/2024 3:33 AM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 03:52, Paloma Arellano wrote:
All the components of YUV420 over DP are added. Therefore, let's mark the
connector
://patchwork.freedesktop.org/series/129180/
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Paloma Arellano
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/display/drm_dp_helper.c | 23 +++
include/drm/display/drm_dp_helper.h | 1 +
2 files changed, 24 insertions(+)
diff --git a/drivers/gpu/drm
On 2/10/2024 10:57 PM, Dmitry Baryshkov wrote:
On Sun, 11 Feb 2024 at 06:06, Abhinav Kumar wrote:
On 2/10/2024 1:46 PM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 20:50, Abhinav Kumar wrote:
On 2/10/2024 10:14 AM, Abhinav Kumar wrote:
On 2/10/2024 2:09 AM, Dmitry Baryshkov
On 2/10/2024 2:11 PM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 23:49, Abhinav Kumar wrote:
On 2/10/2024 2:16 AM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 03:52, Paloma Arellano wrote:
DP controller can be setup to operate in either SDP update flush mode or
peripheral
On 2/10/2024 1:46 PM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 20:50, Abhinav Kumar wrote:
On 2/10/2024 10:14 AM, Abhinav Kumar wrote:
On 2/10/2024 2:09 AM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 03:52, Paloma Arellano
wrote:
Add support to pack and send the VSC SDP
On 2/10/2024 2:16 AM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 03:52, Paloma Arellano wrote:
DP controller can be setup to operate in either SDP update flush mode or
peripheral flush mode based on the DP controller hardware version.
Starting in DP v1.2, the hardware documents
-by: Paloma Arellano
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/display/drm_dp_helper.c | 21 +
include/drm/display/drm_dp_helper.h | 1 +
2 files changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c
b/drivers/gpu/drm/display/drm_dp_helper.c
On 2/10/2024 3:33 AM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 03:52, Paloma Arellano wrote:
All the components of YUV420 over DP are added. Therefore, let's mark the
connector property as true for DP connector when the DP type is not eDP
and when there is a CDM block available.
On 2/10/2024 10:14 AM, Abhinav Kumar wrote:
On 2/10/2024 2:09 AM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 03:52, Paloma Arellano
wrote:
Add support to pack and send the VSC SDP packet for DP. This therefore
allows the transmision of format information to the sinks which is
needed
On 2/10/2024 2:09 AM, Dmitry Baryshkov wrote:
On Sat, 10 Feb 2024 at 03:52, Paloma Arellano wrote:
Add support to pack and send the VSC SDP packet for DP. This therefore
allows the transmision of format information to the sinks which is
needed for YUV420 support over DP.
Changes in v2:
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 8
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h | 1 -
2 files changed, 9 deletions(-)
Reviewed-by: Abhinav Kumar
changed, 15 insertions(+), 49 deletions(-)
Nice cleanup !
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
2 files changed, 9 deletions(-)
Reviewed-by: Abhinav Kumar
changed, 8 insertions(+)
Reviewed-by: Abhinav Kumar
version of msm_ioremap_mdss for
vbif_nrt_phys?
Anyway, its not something to block this change. Hence,
Reviewed-by: Abhinav Kumar
++
1 file changed, 51 insertions(+)
Reviewed-by: Abhinav Kumar
insertions(+), 59 deletions(-)
+
+ crtc = conn_state->crtc;
+ if (!crtc)
+ return 0;
+
This should fix the crash and rest of the change LGTM
Reviewed-by: Abhinav Kumar
Please give us a couple of days to re-test this and give our Tested-by
as we plan to rebase
msm/dsi/dsi_host.c | 33 +++--
1 file changed, 31 insertions(+), 2 deletions(-)
Reviewed-by: Abhinav Kumar
On 2/8/2024 5:46 AM, Abel Vesa wrote:
On 24-02-08 15:42:04, Dmitry Baryshkov wrote:
On Thu, 8 Feb 2024 at 15:37, Abel Vesa wrote:
On 24-01-29 17:11:25, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 15:19, Abel Vesa wrote:
Add support for MDSS on X1E80100.
Signed-off-by: Abel Vesa
On 2/7/2024 11:56 AM, Dmitry Baryshkov wrote:
On Wed, 7 Feb 2024 at 20:48, Abhinav Kumar wrote:
On 1/5/2024 3:34 PM, Dmitry Baryshkov wrote:
Existing MDP5 devices have slightly different bindings. The main
register region is called `mdp_phys' instead of `mdp'. Also vbif
register regions
but certainly
not all, but based on whatever I checked all the entries were correct in
the catalog.
Reviewed-by: Abhinav Kumar
platforms supported by both drivers are by default handled by the
MDP5 driver. To let them be handled by the DPU driver pass the
`msm.prefer_mdp5=false` kernel param.
Reviewed-by: Stephen Boyd
Signed-off-by: Dmitry Baryshkov
---
Reviewed-by: Abhinav Kumar
On 1/5/2024 3:34 PM, Dmitry Baryshkov wrote:
Existing MDP5 devices have slightly different bindings. The main
register region is called `mdp_phys' instead of `mdp'. Also vbif
register regions are a part of the parent, MDSS device. Add support for
handling this binding differences.
On 1/5/2024 3:34 PM, Dmitry Baryshkov wrote:
Older (mdp5) platforms do not use per-SoC compatible strings. Instead
they use a single compat entry 'qcom,mdss'. To facilitate migrating
these platforms to the DPU driver provide a way to generate the MDSS /
UBWC data at runtime, when the DPU
On 10/5/2023 3:06 PM, Dmitry Baryshkov wrote:
The frame event callback is always set to dpu_crtc_frame_event_cb() (or
to NULL) and the data is always either the CRTC itself or NULL
(correpondingly). Thus drop the event callback registration, call the
dpu_crtc_frame_event_cb() directly and
up to maintain this
Reviewed-by: Abhinav Kumar
---
.../devicetree/bindings/display/bridge/ti,sn65dsi86.yaml| 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml
b/Documentation/devicetree/bindings/display
On 1/31/2024 8:36 PM, Dmitry Baryshkov wrote:
On Thu, 1 Feb 2024 at 03:56, Abhinav Kumar wrote:
On 1/27/2024 9:39 PM, Dmitry Baryshkov wrote:
On Sun, 28 Jan 2024 at 07:34, Paloma Arellano wrote:
On 1/25/2024 1:48 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano
On 1/31/2024 7:17 PM, Dmitry Baryshkov wrote:
On Thu, 1 Feb 2024 at 03:30, Abhinav Kumar wrote:
On 1/29/2024 3:44 PM, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 09:08, Abhinav Kumar wrote:
On 1/28/2024 10:12 PM, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 07:03, Abhinav Kumar
On 1/27/2024 9:39 PM, Dmitry Baryshkov wrote:
On Sun, 28 Jan 2024 at 07:34, Paloma Arellano wrote:
On 1/25/2024 1:48 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano wrote:
Add support to pack and send the VSC SDP packet for DP. This therefore
allows the transmision of
On 1/29/2024 3:44 PM, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 09:08, Abhinav Kumar wrote:
On 1/28/2024 10:12 PM, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 07:03, Abhinav Kumar wrote:
On 1/28/2024 7:42 PM, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 04:58, Abhinav
On 1/31/2024 5:05 PM, Dmitry Baryshkov wrote:
On Thu, 1 Feb 2024 at 02:48, Abhinav Kumar wrote:
Currently INTF_CFG2_DATA_HCTL_EN is coupled with the enablement
of widebus but this is incorrect because we should be enabling
this bit independent of widebus except for cases where compression
and enabling
INTF_CFG2_DATA_HCTL_EN for all other cases when supported by DPU.
Fixes: 3309a7563971 ("drm/msm/dpu: revise timing engine programming to support
widebus feature")
Suggested-by: Dmitry Baryshkov
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
On 1/29/2024 9:28 PM, Dmitry Baryshkov wrote:
On Tue, 30 Jan 2024 at 06:10, Abhinav Kumar wrote:
On 1/29/2024 5:43 PM, Dmitry Baryshkov wrote:
On Tue, 30 Jan 2024 at 03:07, Abhinav Kumar wrote:
On 1/29/2024 4:03 PM, Dmitry Baryshkov wrote:
On Tue, 30 Jan 2024 at 01:51, Abhinav
On 1/29/2024 5:43 PM, Dmitry Baryshkov wrote:
On Tue, 30 Jan 2024 at 03:07, Abhinav Kumar wrote:
On 1/29/2024 4:03 PM, Dmitry Baryshkov wrote:
On Tue, 30 Jan 2024 at 01:51, Abhinav Kumar wrote:
On 1/27/2024 9:33 PM, Dmitry Baryshkov wrote:
On Sun, 28 Jan 2024 at 07:16, Paloma
On 1/29/2024 4:03 PM, Dmitry Baryshkov wrote:
On Tue, 30 Jan 2024 at 01:51, Abhinav Kumar wrote:
On 1/27/2024 9:33 PM, Dmitry Baryshkov wrote:
On Sun, 28 Jan 2024 at 07:16, Paloma Arellano wrote:
On 1/25/2024 1:26 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano
On 1/27/2024 9:33 PM, Dmitry Baryshkov wrote:
On Sun, 28 Jan 2024 at 07:16, Paloma Arellano wrote:
On 1/25/2024 1:26 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano wrote:
INTF_CONFIG2 register cannot have widebus enabled when DP format is
YUV420. Therefore, program the
Hi Maxime
On 1/26/2024 4:45 AM, Maxime Ripard wrote:
On Wed, Jan 17, 2024 at 09:36:20AM -0800, Abhinav Kumar wrote:
Hi Jani and Maxime
On 1/17/2024 2:16 AM, Jani Nikula wrote:
On Wed, 17 Jan 2024, Maxime Ripard wrote:
Hi,
On Tue, Jan 16, 2024 at 02:22:03PM -0800, Jessica Zhang wrote
On 1/28/2024 10:12 PM, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 07:03, Abhinav Kumar wrote:
On 1/28/2024 7:42 PM, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 04:58, Abhinav Kumar wrote:
On 1/27/2024 9:55 PM, Dmitry Baryshkov wrote:
On Sun, 28 Jan 2024 at 07:48, Paloma
On 1/28/2024 9:05 PM, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 06:30, Abhinav Kumar wrote:
On 1/28/2024 7:52 PM, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 05:17, Abhinav Kumar wrote:
On 1/25/2024 2:05 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano
On 1/28/2024 7:42 PM, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 04:58, Abhinav Kumar wrote:
On 1/27/2024 9:55 PM, Dmitry Baryshkov wrote:
On Sun, 28 Jan 2024 at 07:48, Paloma Arellano wrote:
On 1/25/2024 1:57 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano
On 1/28/2024 8:12 PM, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 06:01, Abhinav Kumar wrote:
On 1/28/2024 7:23 PM, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 05:06, Abhinav Kumar wrote:
On 1/26/2024 4:39 PM, Paloma Arellano wrote:
On 1/25/2024 1:14 PM, Dmitry Baryshkov
On 1/28/2024 7:52 PM, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 05:17, Abhinav Kumar wrote:
On 1/25/2024 2:05 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano wrote:
All the components of YUV420 over DP are added. Therefore, let's mark the
connector property
On 1/28/2024 7:23 PM, Dmitry Baryshkov wrote:
On Mon, 29 Jan 2024 at 05:06, Abhinav Kumar wrote:
On 1/26/2024 4:39 PM, Paloma Arellano wrote:
On 1/25/2024 1:14 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano wrote:
Generalize dpu_encoder_helper_phys_setup_cdm
On 1/25/2024 2:05 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano wrote:
All the components of YUV420 over DP are added. Therefore, let's mark the
connector property as true for DP connector when the DP type is not eDP
and when VSC SDP is supported.
Signed-off-by: Paloma
On 1/26/2024 4:39 PM, Paloma Arellano wrote:
On 1/25/2024 1:14 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano wrote:
Generalize dpu_encoder_helper_phys_setup_cdm to be compatible with DP.
Signed-off-by: Paloma Arellano
---
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
On 1/27/2024 9:55 PM, Dmitry Baryshkov wrote:
On Sun, 28 Jan 2024 at 07:48, Paloma Arellano wrote:
On 1/25/2024 1:57 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano wrote:
Adjust the encoder format programming in the case of video mode for DP
to accommodate CDM related
On 1/26/2024 6:40 PM, Dmitry Baryshkov wrote:
On Sat, 27 Jan 2024 at 02:58, Paloma Arellano wrote:
On 1/25/2024 1:23 PM, Dmitry Baryshkov wrote:
On 25/01/2024 21:38, Paloma Arellano wrote:
YUV420 format is supported only in the VSC SDP packet and not through
MSA. Hence add an API which
On 1/5/2024 3:50 PM, Dmitry Baryshkov wrote:
We have several reports of vblank timeout messages. However after some
debugging it was found that there might be different causes to that.
Include the actual CTL_FLUSH value into the timeout message. This allows
us to identify the DPU block that
On 1/10/2024 12:18 PM, Kuogee Hsieh wrote:
Since the value of DP_TEST_BIT_DEPTH_8 is already left shifted, in the
BPC unknown case, the additional shift causes spill over to the other
bits of the [DP_CONFIGURATION_CTRL] register.
Fix this by changing the return value of
'
Signed-off-by: Randy Dunlap
Cc: Rob Clark
Cc: Abhinav Kumar
Cc: Dmitry Baryshkov
Cc: Sean Paul
Cc: Marijn Suijten
Cc: linux-arm-...@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Cc: freedr...@lists.freedesktop.org
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Thomas Zimmermann
Cc
On 12/18/2023 9:57 AM, Abhinav Kumar wrote:
On 12/16/2023 4:01 PM, Dmitry Baryshkov wrote:
Drop obsolete kerneldoc for several fields in struct dpu_encoder_virt
Reported-by: kernel test robot
Closes:
https://lore.kernel.org/oe-kbuild-all/202312170641.5exlvqqx-...@intel.com/
Fixes
On 12/25/2023 5:08 AM, Dmitry Baryshkov wrote:
dpu_encoder_phys_wb is the only user of encoder's atomic_check callback.
Move corresponding checks to drm_writeback_connector's implementation
and drop the dpu_encoder_phys_wb_atomic_check() function.
Signed-off-by: Dmitry Baryshkov
---
the other conditional block by making sure hw_pp is valid
before dereferencing it.
Reported-by: Dan Carpenter
Fixes: ae4d721ce100 ("drm/msm/dpu: add an API to reset the encoder related hw
blocks")
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 ++-
Hi Jani and Maxime
On 1/17/2024 2:16 AM, Jani Nikula wrote:
On Wed, 17 Jan 2024, Maxime Ripard wrote:
Hi,
On Tue, Jan 16, 2024 at 02:22:03PM -0800, Jessica Zhang wrote:
This series introduces a simulated MIPI DSI panel.
Currently, the only way to validate DSI connectors is with a physical
files changed, 1 insertion(+), 24 deletions(-)
Reviewed-by: Abhinav Kumar
2 files changed, 7 insertions(+), 8 deletions(-)
Reviewed-by: Abhinav Kumar
. If someone wants to add that
support, I guess they have to start by reverting this commit first. If
thats the plan and agreement,
Reviewed-by: Abhinav Kumar
++
drivers/gpu/drm/msm/dsi/dsi_manager.c | 8 +++-
3 files changed, 6 insertions(+), 12 deletions(-)
Reviewed-by: Abhinav Kumar
s changed, 40 deletions(-)
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi.h | 6 --
drivers/gpu/drm/msm/dsi/dsi_manager.c | 5 -
2 files changed, 11 deletions(-)
Reviewed-by: Abhinav Kumar
| 8 +---
drivers/gpu/drm/msm/dsi/dsi.h | 7 ++-
drivers/gpu/drm/msm/dsi/dsi_manager.c | 19 ---
3 files changed, 15 insertions(+), 19 deletions(-)
Reviewed-by: Abhinav Kumar
On 1/9/2024 7:31 AM, Rob Clark wrote:
On Mon, Jan 8, 2024 at 6:13 PM Rob Clark wrote:
On Mon, Jan 8, 2024 at 2:58 PM Abhinav Kumar wrote:
On 1/8/2024 11:50 AM, Rob Clark wrote:
From: Rob Clark
The msm tests should skip on non-msm hw, so I think it should be safe to
enable
On 1/8/2024 11:50 AM, Rob Clark wrote:
From: Rob Clark
The msm tests should skip on non-msm hw, so I think it should be safe to
enable everywhere.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/ci/testlist.txt | 49 +
1 file changed, 49 insertions(+)
I
On 12/25/2023 5:08 AM, Dmitry Baryshkov wrote:
The dpu_encoder_phys_ops::atomic_mode_set() callback is mostly
redundant. Implementations only set the IRQ indices there. Move
statically allocated IRQs to dpu_encoder_phys_*_init() and set
dynamically allocated IRQs in the irq_enable() callback.
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