On 6/14/2023 2:56 AM, Marijn Suijten wrote:
On 2023-06-13 18:57:13, Jessica Zhang wrote:
DSI 6G v2.5.x+ supports a data-bus widen mode that allows DSI to send
48 bits of compressed data per pclk instead of 24.
For all chipsets that support this mode, enable it whenever DSC is
enabled as
On 6/22/2023 4:14 PM, Dmitry Baryshkov wrote:
On 23/06/2023 01:37, Abhinav Kumar wrote:
On 6/21/2023 4:46 PM, Dmitry Baryshkov wrote:
On 22/06/2023 02:01, Abhinav Kumar wrote:
On 6/21/2023 9:36 AM, Dmitry Baryshkov wrote:
On 21/06/2023 18:17, Marijn Suijten wrote:
On 2023-06-20 14:38
On 6/14/2023 3:03 AM, Marijn Suijten wrote:
On 2023-06-14 10:49:31, Dmitry Baryshkov wrote:
On 14/06/2023 04:57, Jessica Zhang wrote:
DSI 6G v2.5.x+ supports a data-bus widen mode that allows DSI to send
48 bits of compressed data per pclk instead of 24.
For all chipsets that support this
On 6/21/2023 4:46 PM, Dmitry Baryshkov wrote:
On 22/06/2023 02:01, Abhinav Kumar wrote:
On 6/21/2023 9:36 AM, Dmitry Baryshkov wrote:
On 21/06/2023 18:17, Marijn Suijten wrote:
On 2023-06-20 14:38:34, Jessica Zhang wrote:
+ if (phys_enc->hw_intf->ops.enable_w
On 6/22/2023 7:00 AM, Dmitry Baryshkov wrote:
On 21/06/2023 19:18, Kuogee Hsieh wrote:
Currently DSI DSC struct is populated at display setup during
system bootup. This mechanism works fine with embedded display
but not for pluggable displays as the DSC struct will become
stale once external
On 6/21/2023 9:36 AM, Dmitry Baryshkov wrote:
On 21/06/2023 18:17, Marijn Suijten wrote:
On 2023-06-20 14:38:34, Jessica Zhang wrote:
+ if (phys_enc->hw_intf->ops.enable_widebus)
+ phys_enc->hw_intf->ops.enable_widebus(phys_enc->hw_intf);
No. Please provide a single function
On 6/14/2023 12:49 AM, Dmitry Baryshkov wrote:
On 14/06/2023 04:57, Jessica Zhang wrote:
DSI 6G v2.5.x+ supports a data-bus widen mode that allows DSI to send
48 bits of compressed data per pclk instead of 24.
For all chipsets that support this mode, enable it whenever DSC is
enabled as
On 6/14/2023 12:56 AM, Dmitry Baryshkov wrote:
On 14/06/2023 04:57, Jessica Zhang wrote:
Add a DPU INTF op to set the DATABUS_WIDEN register to enable the
databus-widen mode datapath.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 3 +++
On 6/14/2023 2:41 PM, Marijn Suijten wrote:
On 2023-06-14 13:39:57, Abhinav Kumar wrote:
On 6/14/2023 12:54 PM, Abhinav Kumar wrote:
On 6/14/2023 12:35 PM, Abhinav Kumar wrote:
On 6/14/2023 5:23 AM, Marijn Suijten wrote:
On 2023-06-14 15:01:59, Dmitry Baryshkov wrote:
On 14/06/2023 14:42
On 6/14/2023 1:43 PM, Dmitry Baryshkov wrote:
On 14/06/2023 23:39, Abhinav Kumar wrote:
On 6/14/2023 12:54 PM, Abhinav Kumar wrote:
On 6/14/2023 12:35 PM, Abhinav Kumar wrote:
On 6/14/2023 5:23 AM, Marijn Suijten wrote:
On 2023-06-14 15:01:59, Dmitry Baryshkov wrote:
On 14/06/2023
On 6/14/2023 3:49 PM, Marijn Suijten wrote:
On 2023-06-14 14:23:38, Marijn Suijten wrote:
Tested this on SM8350 which actually has DSI 2.5, and it is also
corrupted with this series so something else on this series might be
broken.
Never mind, this was a bad conflict-resolve. Jessica's
On 6/14/2023 12:54 PM, Abhinav Kumar wrote:
On 6/14/2023 12:35 PM, Abhinav Kumar wrote:
On 6/14/2023 5:23 AM, Marijn Suijten wrote:
On 2023-06-14 15:01:59, Dmitry Baryshkov wrote:
On 14/06/2023 14:42, Marijn Suijten wrote:
On 2023-06-13 18:57:11, Jessica Zhang wrote:
DPU 5.x+ supports
On 6/14/2023 12:35 PM, Abhinav Kumar wrote:
On 6/14/2023 5:23 AM, Marijn Suijten wrote:
On 2023-06-14 15:01:59, Dmitry Baryshkov wrote:
On 14/06/2023 14:42, Marijn Suijten wrote:
On 2023-06-13 18:57:11, Jessica Zhang wrote:
DPU 5.x+ supports a databus widen mode that allows more data
On 6/14/2023 5:23 AM, Marijn Suijten wrote:
On 2023-06-14 15:01:59, Dmitry Baryshkov wrote:
On 14/06/2023 14:42, Marijn Suijten wrote:
On 2023-06-13 18:57:11, Jessica Zhang wrote:
DPU 5.x+ supports a databus widen mode that allows more data to be sent
per pclk. Enable this feature flag on
On 6/12/2023 5:09 PM, Dmitry Baryshkov wrote:
In several catalog entries we did not use existing MSM_DP_CONTROLLER_n
constants. Fill them in. Also use freshly defined MSM_DSI_CONTROLLER_n
for DSI interfaces.
Signed-off-by: Dmitry Baryshkov
---
On 6/13/2023 3:19 PM, Kuogee Hsieh wrote:
ince struct drm_dsc_config is stored at atomic_enable() instead
S got cut off in since
of display setup time during boot up, saving struct drm_dsc_config
at struct msm_display_info is not necessary. Lets drop the dsc member
from struct
On 6/13/2023 3:19 PM, Kuogee Hsieh wrote:
moving retrieving struct drm_dsc_cofnig from setup_display to
atomic_enable() and delete struct drm_dsc_config from
struct msm_display_info.
This needs re-wording.
Currently, struct drm_dsc_config is retrieved from DSI driver in
On 6/12/2023 5:09 PM, Dmitry Baryshkov wrote:
Follow the DP example and define MSM_DSI_CONTROLLER_n enumeration.
Signed-off-by: Dmitry Baryshkov
---
Reviewed-by: Abhinav Kumar
On 6/12/2023 5:09 PM, Dmitry Baryshkov wrote:
sm6115 and qcm2290 do not have INTF_0. Drop corresponding interface
definitions.
And sm6375 as you are touching that too
Signed-off-by: Dmitry Baryshkov
---
You can fix that while applying.
Reviewed-by: Abhinav Kumar
On 6/12/2023 5:09 PM, Dmitry Baryshkov wrote:
Each MERGE_3D block has just two registers. Correct the block length
accordingly.
Fixes: 4369c93cf36b ("drm/msm/dpu: initial support for merge3D hardware block")
Signed-off-by: Dmitry Baryshkov
---
LGTM,
Reviewed-by: Abhinav Kumar
m/dpu: replace IRQ lookup with the data in hw
catalog")
Signed-off-by: Dmitry Baryshkov
---
Yes, was indeed a mistake
Reviewed-by: Abhinav Kumar
Hi Doug
On 6/13/2023 12:33 PM, Doug Anderson wrote:
Hi,
On Mon, Jun 12, 2023 at 3:40 PM Dmitry Baryshkov
wrote:
On 13/06/2023 01:01, Bjorn Andersson wrote:
Using devres to depopulate the aux bus made sure that upon a probe
deferral the EDP panel device would be destroyed and recreated upon
changed, 17 insertions(+), 4 deletions(-)
This change itself is fine, hence
Reviewed-by: Abhinav Kumar
one note below for a future cleanup:
diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
index 36ea1af10894
)
Reported-by: Yongqin Liu
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
LGTM,
Reviewed-by: Abhinav Kumar
On 6/11/2023 3:03 PM, Marijn Suijten wrote:
On 2023-06-09 15:57:18, Jessica Zhang wrote:
Add documentation comments explaining the pclk_rate and hdisplay math
related to DSC.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 10 ++
1 file changed, 10
On 6/8/2023 12:51 PM, Abhinav Kumar wrote:
On 6/7/2023 2:56 PM, Dmitry Baryshkov wrote:
On 08/06/2023 00:05, Abhinav Kumar wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
Only several SSPP blocks support such features as YUV output or
scaling,
thus different DRM planes have
On 6/9/2023 3:57 PM, Jessica Zhang wrote:
Adjust the pclk rate to divide hdisplay by the compression ratio when DSC
is enabled.
Signed-off-by: Jessica Zhang
---
Reviewed-by: Abhinav Kumar
for DP.
Signed-off-by: Jessica Zhang
---
Reviewed-by: Abhinav Kumar
On 6/8/2023 5:56 PM, Jessica Zhang wrote:
On 6/8/2023 1:36 PM, Marijn Suijten wrote:
Same title suggestion as earlier: s/adjust/reduce
Hi Marijn,
Acked.
On 2023-05-22 18:08:56, Jessica Zhang wrote:
Adjust the pclk rate to divide hdisplay by the compression ratio when
DSC
is
On 6/7/2023 2:56 PM, Dmitry Baryshkov wrote:
On 08/06/2023 00:05, Abhinav Kumar wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
Only several SSPP blocks support such features as YUV output or scaling,
thus different DRM planes have different features. Properly utilizing
all planes
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
Only several SSPP blocks support such features as YUV output or scaling,
thus different DRM planes have different features. Properly utilizing
all planes requires the attention of the compositor, who should
prefer simpler planes to YUV-supporting
On 6/6/2023 4:21 PM, Dmitry Baryshkov wrote:
On 07/06/2023 02:14, Abhinav Kumar wrote:
On 6/6/2023 3:59 PM, Dmitry Baryshkov wrote:
On 07/06/2023 01:57, Abhinav Kumar wrote:
On 6/6/2023 3:50 PM, Dmitry Baryshkov wrote:
On 07/06/2023 01:47, Abhinav Kumar wrote:
On 6/6/2023 2:52 PM
On 6/6/2023 3:59 PM, Dmitry Baryshkov wrote:
On 07/06/2023 01:57, Abhinav Kumar wrote:
On 6/6/2023 3:50 PM, Dmitry Baryshkov wrote:
On 07/06/2023 01:47, Abhinav Kumar wrote:
On 6/6/2023 2:52 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:47, Abhinav Kumar wrote:
On 6/6/2023 2:29 PM
On 6/6/2023 3:50 PM, Dmitry Baryshkov wrote:
On 07/06/2023 01:47, Abhinav Kumar wrote:
On 6/6/2023 2:52 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:47, Abhinav Kumar wrote:
On 6/6/2023 2:29 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:14, Abhinav Kumar wrote:
On 5/24/2023 6:47 PM
On 6/6/2023 2:52 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:47, Abhinav Kumar wrote:
On 6/6/2023 2:29 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:14, Abhinav Kumar wrote:
On 5/24/2023 6:47 PM, Dmitry Baryshkov wrote:
On Thu, 25 May 2023 at 02:16, Abhinav Kumar
wrote:
On 3/20
Hi Dmitry
On 6/6/2023 1:21 PM, Dmitry Baryshkov wrote:
On 06/06/2023 23:11, Kuogee Hsieh wrote:
From: Abhinav Kumar
Some platforms have DSC blocks which have not been declared in the
catalog.
Complete DSC 1.1 support for all platforms by adding the missing
blocks to
MSM8998.
'Some
On 6/6/2023 2:29 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:14, Abhinav Kumar wrote:
On 5/24/2023 6:47 PM, Dmitry Baryshkov wrote:
On Thu, 25 May 2023 at 02:16, Abhinav Kumar
wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
As we are going to add virtual planes, add the list
On 6/6/2023 2:08 PM, Dmitry Baryshkov wrote:
On 07/06/2023 00:01, Dmitry Baryshkov wrote:
On 06/06/2023 22:28, Abhinav Kumar wrote:
On 6/6/2023 12:09 PM, Dmitry Baryshkov wrote:
On 06/06/2023 20:51, Abhinav Kumar wrote:
On 6/6/2023 4:14 AM, Dmitry Baryshkov wrote:
On Tue, 6 Jun 2023
On 5/24/2023 6:47 PM, Dmitry Baryshkov wrote:
On Thu, 25 May 2023 at 02:16, Abhinav Kumar wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
As we are going to add virtual planes, add the list of supported formats
to the hw catalog entry. It will be used to setup universal planes
On 6/6/2023 1:29 PM, Dmitry Baryshkov wrote:
On 06/06/2023 23:25, Abhinav Kumar wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
Remove historical fields intfs_swapped and topology fields from struct
dpu_encoder_virt and also remove even more historical docs.
Signed-off-by: Dmitry
On 5/24/2023 6:40 PM, Dmitry Baryshkov wrote:
On Thu, 25 May 2023 at 02:04, Abhinav Kumar wrote:
On 5/24/2023 3:46 PM, Abhinav Kumar wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
In preparation to virtualized planes support, move pstate->pipe
initialization f
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
Remove historical fields intfs_swapped and topology fields from struct
dpu_encoder_virt and also remove even more historical docs.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 10 --
1 file
).
Change the "vsync_hz" type to unsigned long as well and change the
error checking to check for zero instead of negatives. This change
does not affect runtime at all. It's just a clean up.
Signed-off-by: Dan Carpenter
---
Reviewed-by: Abhinav Kumar
On 6/6/2023 11:57 AM, Marijn Suijten wrote:
On 2023-06-06 11:31:39, Kuogee Hsieh wrote:
From: Abhinav Kumar
Some platforms have DSC blocks which have not been declared in the catalog.
Complete DSC 1.1 support for all platforms by adding the missing blocks to
MSM8998 and SC8180X.
Still
On 6/6/2023 12:09 PM, Dmitry Baryshkov wrote:
On 06/06/2023 20:51, Abhinav Kumar wrote:
On 6/6/2023 4:14 AM, Dmitry Baryshkov wrote:
On Tue, 6 Jun 2023 at 05:35, Abhinav Kumar
wrote:
On 6/5/2023 6:03 PM, Dmitry Baryshkov wrote:
On 06/06/2023 03:55, Abhinav Kumar wrote:
On 6/3
On 6/6/2023 4:14 AM, Dmitry Baryshkov wrote:
On Tue, 6 Jun 2023 at 05:35, Abhinav Kumar wrote:
On 6/5/2023 6:03 PM, Dmitry Baryshkov wrote:
On 06/06/2023 03:55, Abhinav Kumar wrote:
On 6/3/2023 7:21 PM, Dmitry Baryshkov wrote:
On 31/05/2023 21:25, Abhinav Kumar wrote:
On 5/31
On 6/5/2023 6:03 PM, Dmitry Baryshkov wrote:
On 06/06/2023 03:55, Abhinav Kumar wrote:
On 6/3/2023 7:21 PM, Dmitry Baryshkov wrote:
On 31/05/2023 21:25, Abhinav Kumar wrote:
On 5/31/2023 3:07 AM, Dmitry Baryshkov wrote:
On 31/05/2023 06:05, Abhinav Kumar wrote:
On 5/30/2023 7:53 PM
On 6/3/2023 7:21 PM, Dmitry Baryshkov wrote:
On 31/05/2023 21:25, Abhinav Kumar wrote:
On 5/31/2023 3:07 AM, Dmitry Baryshkov wrote:
On 31/05/2023 06:05, Abhinav Kumar wrote:
On 5/30/2023 7:53 PM, Dmitry Baryshkov wrote:
On Wed, 31 May 2023 at 03:54, Abhinav Kumar
wrote:
With [1
On 6/1/2023 10:22 AM, Dmitry Baryshkov wrote:
There is no need to assign a result to temp varable just to return it
after a goto. Drop the temporary variable and goto and return the result
directly.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
Tested-by: Abhinav Kumar
On 6/1/2023 10:22 AM, Dmitry Baryshkov wrote:
There is no need to assign a result to temp varable just to return it
two lines below. Drop the temporary variable.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
Tested-by: Abhinav Kumar # sc7280
On 6/1/2023 10:22 AM, Dmitry Baryshkov wrote:
There is little sense to get intf index just to call dpu_rm_get_intf()
on it. Move dpu_rm_get_intf() call to dpu_encoder_get_intf() function.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
Tested-by: Abhinav Kumar # sc7280
-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
Tested-by: Abhinav Kumar # sc7280
On 6/1/2023 10:22 AM, Dmitry Baryshkov wrote:
Remove intf_idx and wb_idx fields from struct dpu_encoder_phys and
struct dpu_enc_phys_init_params. Set the hw_intf and hw_wb directly and
use them to get the instance index.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
On 6/1/2023 10:22 AM, Dmitry Baryshkov wrote:
Move common DPU physical encoder initialization code to the new function
dpu_encoder_phys_init().
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
Tested-by: Abhinav Kumar # sc7280
On 6/1/2023 10:22 AM, Dmitry Baryshkov wrote:
There is no reason to split the dpu_encoder interface into separate
_init() and _setup() phases. Merge them into a single function.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
Tested-by: Abhinav Kumar # sc7280
Hi Leonard
On 5/24/2023 5:58 AM, Leonard Lausen wrote:
[ 275.025497] [drm:dpu_encoder_phys_vid_wait_for_commit_done:488]
[dpu error]vblank timeout
[ 275.025514] [drm:dpu_kms_wait_for_commit_done:510] [dpu error]wait
for commit done returned -110
[ 275.064141]
ocks, dpu_kms->num_clocks, clock_name);
if (!clk)
- return -EINVAL;
+ return 0;
Currently, the only caller of this API is
dpu_encoder_phys_cmd_tearcheck_config which seems to handle <=0 so this
change should be fine. Hence
Reviewed-by: Abhinav Kumar
On 5/21/2023 6:32 PM, Su Hui wrote:
Pointer variables of (void*) type do not require type cast.
Signed-off-by: Su Hui
---
Reviewed-by: Abhinav Kumar
for struct fb_ops
* partially support damage handling
v2:
* use FB_SYS_HELPERS option
Signed-off-by: Thomas Zimmermann
Reviewed-by: Dmitry Baryshkov
Acked-by: Sam Ravnborg
Cc: Rob Clark
Cc: Abhinav Kumar
Cc: Dmitry Baryshkov
Cc: Sean Paul
---
Reviewed-by: Abhinav Kumar
On 5/31/2023 3:07 AM, Dmitry Baryshkov wrote:
On 31/05/2023 06:05, Abhinav Kumar wrote:
On 5/30/2023 7:53 PM, Dmitry Baryshkov wrote:
On Wed, 31 May 2023 at 03:54, Abhinav Kumar
wrote:
With [1] dpu core revision was dropped in favor of using the
compatible string from the device tree
On 5/30/2023 7:53 PM, Dmitry Baryshkov wrote:
On Wed, 31 May 2023 at 03:54, Abhinav Kumar wrote:
With [1] dpu core revision was dropped in favor of using the
compatible string from the device tree to select the dpu catalog
being used in the device.
This approach works well however also
On 5/30/2023 7:16 PM, Bjorn Andersson wrote:
On Tue, May 30, 2023 at 05:53:55PM -0700, Abhinav Kumar wrote:
With [1] dpu core revision was dropped in favor of using the
compatible string from the device tree to select the dpu catalog
being used in the device.
This approach works well
reedesktop.org/patch/530891/?series=113910=4
Signed-off-by: Abhinav Kumar
---
.../msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 1 +
.../msm/disp/dpu1/catalog/dpu_4_0_sdm845.h| 1 +
.../msm/disp/dpu1/catalog/dpu_5_0_sm8150.h| 1 +
.../msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 1 +
...
On 5/23/2023 12:30 PM, Abhinav Kumar wrote:
On 5/23/2023 12:23 PM, Dmitry Baryshkov wrote:
On Tue, 23 May 2023 at 22:14, Abhinav Kumar
wrote:
On 5/23/2023 7:36 AM, Dmitry Baryshkov wrote:
On 23/05/2023 10:31, Neil Armstrong wrote:
On 23/05/2023 09:20, Dmitry Baryshkov wrote:
On Tue
On 5/29/2023 3:18 PM, Dmitry Baryshkov wrote:
On 30/05/2023 00:07, Marijn Suijten wrote:
On 2023-05-22 15:58:56, Dmitry Baryshkov wrote:
On Mon, 22 May 2023 at 12:04, Neil Armstrong
wrote:
On 22/05/2023 03:16, Dmitry Baryshkov wrote:
On 22/05/2023 00:23, Marijn Suijten wrote:
Sony
On 5/29/2023 2:36 PM, Marijn Suijten wrote:
On 2023-05-24 12:18:09, Abhinav Kumar wrote:
On 5/24/2023 2:48 AM, Marijn Suijten wrote:
On 2023-05-23 13:01:13, Abhinav Kumar wrote:
On 5/21/2023 10:21 AM, Dmitry Baryshkov wrote:
Drop SSPP-specifig debugfs register dumps in favour of using
On 5/26/2023 1:43 AM, Dmitry Baryshkov wrote:
On Fri, 26 May 2023 at 01:42, Abhinav Kumar wrote:
On 5/25/2023 3:30 PM, Dmitry Baryshkov wrote:
On Fri, 26 May 2023 at 00:40, Jeykumar Sankaran
wrote:
On 5/22/2023 2:45 PM, Dmitry Baryshkov wrote:
There is no point in having a single enum
On 5/25/2023 3:30 PM, Dmitry Baryshkov wrote:
On Fri, 26 May 2023 at 00:40, Jeykumar Sankaran
wrote:
On 5/22/2023 2:45 PM, Dmitry Baryshkov wrote:
There is no point in having a single enum (and a single array) for both
DPU < 7.0 and DPU >= 7.0 interrupt registers. Instead define a
() and disable_irq()
Fixes: cd198caddea7 ("drm/msm/dp: Rely on hpd_enable/disable callbacks")
Signed-off-by: Kuogee Hsieh
---
Reviewed-by: Abhinav Kumar
On 5/25/2023 10:57 AM, Kuogee Hsieh wrote:
On 5/24/2023 5:58 AM, Leonard Lausen wrote:
[ 275.025497] [drm:dpu_encoder_phys_vid_wait_for_commit_done:488]
[dpu error]vblank timeout
[ 275.025514] [drm:dpu_kms_wait_for_commit_done:510] [dpu
error]wait
for commit done returned -110
[
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
We need to know if the platform supports inline rotation on any of the
SSPP blocks or not. Add this information to struct dpu_caps in a form of
the boolean field has_inline_rot.
So even for this one, will a helper to detect it from the list of
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
As we are going to add virtual planes, add the list of supported formats
to the hw catalog entry. It will be used to setup universal planes, with
later selecting a pipe depending on whether the YUV format is used for
the framebuffer.
If your
On 5/24/2023 3:46 PM, Abhinav Kumar wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
In preparation to virtualized planes support, move pstate->pipe
initialization from dpu_plane_reset() to dpu_plane_atomic_check(). In
case of virtual planes the plane's pipe will not be known
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
In preparation to virtualized planes support, move pstate->pipe
initialization from dpu_plane_reset() to dpu_plane_atomic_check(). In
case of virtual planes the plane's pipe will not be known up to the
point of atomic_check() callback.
On 5/24/2023 2:48 AM, Marijn Suijten wrote:
On 2023-05-23 13:01:13, Abhinav Kumar wrote:
On 5/21/2023 10:21 AM, Dmitry Baryshkov wrote:
Drop SSPP-specifig debugfs register dumps in favour of using
debugfs/dri/0/kms or devcoredump.
I did see another series which removes src_blk from
On 5/23/2023 4:53 PM, Dmitry Baryshkov wrote:
On Wed, 24 May 2023 at 02:37, Abhinav Kumar wrote:
On 5/21/2023 12:22 PM, Dmitry Baryshkov wrote:
Use drm_debugfs_add_file() for encoder's status file. This changes the
name of the status file from encoder%d/status to just encoder%d.
Signed
On 5/21/2023 12:22 PM, Dmitry Baryshkov wrote:
Use drm_debugfs_add_file() for encoder's status file. This changes the
name of the status file from encoder%d/status to just encoder%d.
Signed-off-by: Dmitry Baryshkov
This patch depends on
On 5/21/2023 12:22 PM, Dmitry Baryshkov wrote:
This define is used only in one place, in dpu_encoder debugfs code.
Inline the value and drop the define completely.
Signed-off-by: Dmitry Baryshkov
---
Reviewed-by: Abhinav Kumar
On 5/21/2023 12:22 PM, Dmitry Baryshkov wrote:
This callback has been unused since the driver being added. Drop it now.
Signed-off-by: Dmitry Baryshkov
---
Reviewed-by: Abhinav Kumar
/105302/
Changes since v6:
- Dropped applied patches
- Dropped msm_drm_thread::crtc as suggested by Abhinav
---
Reviewed-by: Abhinav Kumar
On 5/21/2023 10:21 AM, Dmitry Baryshkov wrote:
Drop SSPP-specifig debugfs register dumps in favour of using
debugfs/dri/0/kms or devcoredump.
I did see another series which removes src_blk from the catalog (I am
yet to review that one) . Lets assume that one is fine and this change
will
On 5/23/2023 12:23 PM, Dmitry Baryshkov wrote:
On Tue, 23 May 2023 at 22:14, Abhinav Kumar wrote:
On 5/23/2023 7:36 AM, Dmitry Baryshkov wrote:
On 23/05/2023 10:31, Neil Armstrong wrote:
On 23/05/2023 09:20, Dmitry Baryshkov wrote:
On Tue, 23 May 2023 at 04:58, Abhinav Kumar
wrote
On 5/23/2023 8:24 AM, Johan Hovold wrote:
On Fri, May 12, 2023 at 09:13:04PM +0300, Dmitry Baryshkov wrote:
On 28/04/2023 02:28, Abhinav Kumar wrote:
On sc7280 where eDP is the primary display, PSR is causing
IGT breakage even for basic test cases like kms_atomic and
kms_atomic_transition
On 5/23/2023 7:36 AM, Dmitry Baryshkov wrote:
On 23/05/2023 10:31, Neil Armstrong wrote:
On 23/05/2023 09:20, Dmitry Baryshkov wrote:
On Tue, 23 May 2023 at 04:58, Abhinav Kumar
wrote:
On 5/18/2023 7:38 PM, Dmitry Baryshkov wrote:
Rework dpu_encoder initialization code, simplifying
Hi Leonard
On 5/22/2023 7:39 PM, Leonard Lausen wrote:
Abhinav Kumar writes:
There is no need to add the 100ms delay back yet.
thanks for posting this but NAK on this patch till we post the fix this
week.
Appreciate a bit of patience till then.
This regression is already part of the 6.3
tried to apply it to my branch to test.
I had tested v1, and between v1 and v2 i only see very trivial change,
so i think its okay to retain:
Tested-by: Abhinav Kumar # sc7280
Dmitry Baryshkov (7):
drm/msm/dpu: merge dpu_encoder_init() and dpu_encoder_setup()
drm/msm/dpu: separate common
On 5/18/2023 7:38 PM, Dmitry Baryshkov wrote:
There is no need to assign a result to temp varable just to return it
after a goto. Drop the temporary variable and goto and return the result
directly.
Signed-off-by: Dmitry Baryshkov
---
Reviewed-by: Abhinav Kumar
On 5/18/2023 7:38 PM, Dmitry Baryshkov wrote:
There is no need to assign a result to temp varable just to return it
two lines below. Drop the temporary variable.
Signed-off-by: Dmitry Baryshkov
---
Reviewed-by: Abhinav Kumar
On 5/18/2023 7:38 PM, Dmitry Baryshkov wrote:
Move common DPU physical encoder initialization code to the new function
dpu_encoder_phys_init().
Signed-off-by: Dmitry Baryshkov
---
Reviewed-by: Abhinav Kumar
Sorry for the delay, other topics delayed my response on this one.
On 5/18/2023 6:50 PM, Dmitry Baryshkov wrote:
On 19/05/2023 02:46, Abhinav Kumar wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
Up to now the driver has been using encoder to allocate hardware
resources. Switch
Baryshkov
Reviewed-by: Marijn Suijten
Signed-off-by: Konrad Dybcio
---
I have cross-checked all the chipsets affected by this and confirmed
DATA_HCTL is present and those 3 registers programmed with that feature
bit are valid, hence
Reviewed-by: Abhinav Kumar
On 5/19/2023 12:33 PM, Dmitry Baryshkov wrote:
On 19/05/2023 21:54, Jessica Zhang wrote:
On 3/28/2023 6:04 AM, Dmitry Baryshkov wrote:
On 26/01/2023 02:07, Abhinav Kumar wrote:
On 1/18/2023 5:00 AM, Dmitry Baryshkov wrote:
Move a call to dsi_calc_pclk() out of calc_clk_rate directly
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
Up to now the driver has been using encoder to allocate hardware
resources. Switch it to use CRTC id in preparation for the next step.
This decision to use encoder id instead of CRTC has been there
downstream for quite sometime. So most of the
On 5/17/2023 4:53 PM, Abhinav Kumar wrote:
On 5/14/2023 10:06 AM, Dmitry Baryshkov wrote:
On Sat, 13 May 2023 at 01:39, Abhinav Kumar
wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
The struct dpu_rm_requirements was used to wrap display topology and
hw resources, which meant INTF
On 5/18/2023 2:36 PM, Marijn Suijten wrote:
On 2023-05-19 00:26:33, Dmitry Baryshkov wrote:
On 18/05/2023 22:41, Marijn Suijten wrote:
On 2023-04-28 15:36:46, Abhinav Kumar wrote:
Since GC and IGC masks have now been dropped DSPP_MSM8998_MASK
is same as DSPP_SC7180_MASK. Since
On 5/18/2023 12:05 AM, Marijn Suijten wrote:
On 2023-05-17 16:22:37, Abhinav Kumar wrote:
@@ -529,6 +539,19 @@ static const struct dpu_pingpong_sub_blks sc7280_pp_sblk =
{
.features = _features, \
}
+/*
+ * NOTE: Each display compression engine (DCE) contains dual hard
On 5/14/2023 10:06 AM, Dmitry Baryshkov wrote:
On Sat, 13 May 2023 at 01:39, Abhinav Kumar wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
The struct dpu_rm_requirements was used to wrap display topology and
hw resources, which meant INTF indices. As of commit ef58e0ad3436
("dr
On 5/17/2023 3:47 PM, Marijn Suijten wrote:
Title: "DPU >= 7.0" instead of "relevant chipsets" to match the others.
On 2023-05-17 15:01:58, Kuogee Hsieh wrote:
From: Abhinav Kumar
Add DSC 1.2 hardware blocks to the catalog with necessary sub-block and
feature
On 5/15/2023 3:23 PM, Marijn Suijten wrote:
On 2023-05-15 15:03:46, Abhinav Kumar wrote:
On 5/15/2023 2:21 PM, Marijn Suijten wrote:
On 2023-05-12 11:00:22, Kuogee Hsieh wrote:
From: Abhinav Kumar
Add DSC 1.2 hardware blocks to the catalog with necessary sub-block and
feature flag
On 5/15/2023 3:03 PM, Abhinav Kumar wrote:
On 5/15/2023 2:21 PM, Marijn Suijten wrote:
On 2023-05-12 11:00:22, Kuogee Hsieh wrote:
From: Abhinav Kumar
Add DSC 1.2 hardware blocks to the catalog with necessary sub-block and
feature flag information. Each display compression engine (DCE
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