On Fri, 7 Jun 2024 23:00:03 +1200
Ryan Walklin wrote:
Hi Ryan,
thanks for taking the time and posting those patches!
> Buffers, compressed with AFBC, are generally more efficient for memory
> transfers. Add support for them.
>
> Currently it's implemented only for VI layers, but vendor code
On Mon, 15 Apr 2024 13:00:39 -0300
Maíra Canal wrote:
Hi,
> RPi 0-3 is packed with a GPU that provides 3D rendering capabilities to
> the RPi. Currently, the downstream kernel uses an overlay to enable the
> GPU and use GPU hardware acceleration. When deploying a mainline kernel
> to the RPi
On Mon, 04 Mar 2024 12:26:46 +0100
"Arnd Bergmann" wrote:
> On Mon, Mar 4, 2024, at 12:24, Andre Przywara wrote:
> > On Mon, 04 Mar 2024 12:11:36 +0100 "Arnd Bergmann" wrote:
> >>
> >> This used to be a 32-bit division. If the rate is never mo
On Mon, 04 Mar 2024 12:11:36 +0100
"Arnd Bergmann" wrote:
Hi,
> On Mon, Mar 4, 2024, at 09:07, Naresh Kamboju wrote:
> > The arm defconfig builds failed on today's Linux next tag next-20240304.
> >
> > Build log:
> > -
> > ERROR: modpost: "__aeabi_uldivmod"
> >
On Thu, 1 Dec 2022 14:16:04 +0100
Uwe Kleine-König wrote:
Hi Uwe,
> Hello Andre,
>
> On Thu, Dec 01, 2022 at 10:22:52AM +0000, Andre Przywara wrote:
> > Just one comment: I don't see a sunxi specific patch later in the series,
> > though it seems we have at least one
larity = PWM_POLARITY_NORMAL;
> @@ -162,6 +162,8 @@ static void sun4i_pwm_get_state(struct pwm_chip *chip,
>
> tmp = (u64)prescaler * NSEC_PER_SEC * PWM_REG_PRD(val);
> state->period = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate);
> +
> + return 0;
> }
>
> static int sun4i_pwm_calculate(struct sun4i_pwm_chip *sun4i_pwm,
For sunxi:
Reviewed-by: Andre Przywara
Just one comment: I don't see a sunxi specific patch later in the series,
though it seems we have at least one error error exit (see prescaler == 0
above). Plus potentially another exit if clk_get_rate() (at the very
beginning) fails.
Shall I send a patch for that?
Cheers,
Andre.
On Wed, 11 May 2022 13:03:36 +0100
Liviu Dudau wrote:
Hi Liviu,
> On Mon, May 09, 2022 at 02:49:01PM +0100, Andre Przywara wrote:
> > On Fri, 06 May 2022 17:39:53 -0500
> > Rob Herring wrote:
> >
> > > On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
use the proper name in
the example. The actual property was already documented properly.
Fixes: 2c8b082a3ab1 ("dt-bindings: display: convert Arm Mali-DP to DT schema")
Link:
https://lore.kernel.org/linux-arm-kernel/ynumgeilublhb...@e110455-lin.cambridge.arm.com/
Signed-off-by: Andre Przy
>
> Repair these file references in ARM HDLCD DRM DRIVER, ARM KOMEDA DRM-KMS
> DRIVER and ARM MALI-DP DRM DRIVER.
>
> Signed-off-by: Lukas Bulwahn
Thanks for taking care!
Acked-by: Andre Przywara
Cheers,
Andre
> ---
> Andre, please ack.
> Rob, Krzysztof, please p
On Fri, 06 May 2022 17:39:53 -0500
Rob Herring wrote:
> On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> > The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> > out a framebuffer and hands the pixels over to a digital signal encoder.
> >
The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
out a framebuffer and hands the pixels over to a digital signal encoder.
It supports multiple layers, scaling and rotation.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara
---
.../bindings
-by: Andre Przywara
---
.../bindings/display/arm,komeda.txt | 78 ---
.../bindings/display/arm,komeda.yaml | 130 ++
2 files changed, 130 insertions(+), 78 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/arm,komeda.txt
create
The Arm HDLCD is a display controller that scans out a framebuffer and
hands a signal to a digital encoder to generate a DVI or HDMI signal.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara
---
.../devicetree/bindings/display/arm,hdlcd.txt | 79
y,
because this is used by several DTs in the tree.
Signed-off-by: Andre Przywara
---
.../devicetree/bindings/display/arm,pl11x.txt | 110 ---
.../bindings/display/arm,pl11x.yaml | 174 ++
2 files changed, 174 insertions(+), 110 deletions(-)
delete mode 100644 Doc
The Arm HDLCD is a display controller that scans out a framebuffer and
hands a signal to a digital encoder to generate a DVI or HDMI signal.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara
---
.../devicetree/bindings/display/arm,hdlcd.txt | 79
-by: Andre Przywara
---
.../bindings/display/arm,komeda.txt | 78 ---
.../bindings/display/arm,komeda.yaml | 130 ++
2 files changed, 130 insertions(+), 78 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/arm,komeda.txt
create
The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
out a framebuffer and hands the pixels over to a digital signal encoder.
It supports multiple layers, scaling and rotation.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara
---
.../bindings
y,
because this is used by several DTs in the tree.
Signed-off-by: Andre Przywara
---
.../devicetree/bindings/display/arm,pl11x.txt | 110 ---
.../bindings/display/arm,pl11x.yaml | 174 ++
2 files changed, 174 insertions(+), 110 deletions(-)
delete mode 100644 Doc
On Tue, 25 Jan 2022 12:37:38 +
Liviu Dudau wrote:
Hi,
> On Mon, Jan 24, 2022 at 04:24:37PM +, carsten.haitz...@foss.arm.com wrote:
> > From: Carsten Haitzler
> >
> > Without DRM_GEM_CMA_HELPER HDLCD won't build. This needs to be there too.
> >
> > Fixes: 09717af7d13d ("drm: Remove
s is a regression introduced with 5.13-rc1, we should merge
this ASAP.
Tested-by: Andre Przywara
Cheers,
Andre
> ---
> v2: Fix building as a module (phy and hdmi are part of the same module, so
> module init callbacks need to be shared)
>
> drivers/gpu/drm/sun4i/sun8
Add the boolean dma-coherent property to the list of allowed properties,
since some boards (Arm Juno) integrate the GPU this way.
Signed-off-by: Andre Przywara
---
Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation
Add the boolean dma-coherent property to the list of allowed properties,
since some boards (Arm Juno) integrate the GPU this way.
Signed-off-by: Andre Przywara
---
Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation
Date: Mon, 4 May 2020 12:41:55 +0100
Subject: [PATCH 01/16] dt-bindings: mali-midgard: Allow dma-coherent
Add the boolean dma-coherent property to the list of allowed properties,
since some boards (Arm Juno) integrate the GPU this way.
Signed-off-by: Andre Przywara
---
Documentation/devicetree
On Tue, 13 Nov 2018 16:46:33 +0530
Jagan Teki wrote:
Hi,
I couldn't find a schematic for this board, but some things in here
look inconsistent:
> Amarula A64-Relic board by default bound with Techstar TS8550B
> MIPI-DSI panel, add support for it.
>
> DSI panel connected via board DSI port
On Tue, 13 Nov 2018 16:46:32 +0530
Jagan Teki wrote:
Hi,
> This patch add support for Bananapi S070WV20-CT16 DSI panel to
> BPI-M64 board.
>
> DSI panel connected via board DSI port with,
> - DC1SW as AVDD supply
Are you sure of that? I don't see anything in the schematic to support
this. The
Hi,
On 25/05/18 06:32, Oleksandr Andrushchenko wrote:
> On 05/23/2018 02:46 PM, Juergen Gross wrote:
>> On 23/05/18 13:36, Oleksandr Andrushchenko wrote:
>>> From: Oleksandr Andrushchenko
>>>
>>> Building for a 32-bit target results in warnings from casting
>>> between a 32-bit pointer and a
On 05/23/2018 17:16, Marek Vasut wrote:
> On 05/18/2018 11:28 AM, Qiang Yu wrote:
>> From: Lima Project Developers
>>
>> Signed-off-by: Qiang Yu
>> Signed-off-by: Neil Armstrong
>> Signed-off-by: Simon Shields
>> Signed-off-by: Heiko Stuebner
>> ---
>> drivers/gpu/drm/Kconfig | 2 ++
rm/drmP.h:207:34: note: in definition of macro
'DRM_DEBUG_DRIVER'
drm_ut_debug_printk(__func__, fmt, ##args); \
.
Use the proper printk format specifier [1] for dma_addr_t which takes
care of those differences.
Signed-off-by: Andre Przywara
[1] Documentation/printk-formats.txt
---
dr
Hi,
On 02/02/16 17:19, Jean-Francois Moine wrote:
> On Wed, 20 Jan 2016 11:14:38 +
> Andre Przywara wrote:
>
>> I haven't looked at it in detail yet, I just tried to compile it for
>> ARM64 to prepare for a test on the Allwinner A64.
>>
>> So just two thin
Hi Jean-Francois,
I haven't looked at it in detail yet, I just tried to compile it for
ARM64 to prepare for a test on the Allwinner A64.
So just two things I spotted below:
On 15/01/16 15:54, Jean-Francois Moine wrote:
> In recent SoCs, as the H3, Allwinner uses a new display interface, DE2.
>
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