g out, as that may break older kernels.
Anyway, for this commit:
Reviewed-by: AngeloGioacchino Del Regno
Il 26/05/23 07:20, CK Hu (胡俊光) ha scritto:
Hi, Angelo:
On Thu, 2023-05-18 at 12:48 +0200, AngeloGioacchino Del Regno wrote:
External email : Please do not click links or open attachments until
you have verified the sender or the content.
Newer SoCs support a bigger Gamma LUT table: wire up
Il 26/05/23 07:32, CK Hu (胡俊光) ha scritto:
Hi, Angelo:
On Thu, 2023-05-18 at 12:48 +0200, AngeloGioacchino Del Regno wrote:
External email : Please do not click links or open attachments until
you have verified the sender or the content.
Make the code more robust and improve readability
All of the entries do fit in a maximum of 82 columns, which is
acceptable. While at it, also remove the useless comma on the
last entry and add the usual sentinel comment.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/phy/mediatek/phy-mtk-mipi-dsi.c | 11 ---
1 file changed, 4
Switch to devm_of_clk_add_hw_provider() in the probe function: this
also allows to entirely remove the .remove_new() callback, as its
only task was to unregister the clock provider.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/phy/mediatek/phy-mtk-mipi-dsi.c | 8 +---
1 file
.remove_new() callback, as it's not needed anymore.
This also cleans up the of_device_id table.
Tested on MT8173, MT8192 Chromebooks, MT6795 Xperia M5 smartphone.
AngeloGioacchino Del Regno (3):
phy: mediatek: mipi-dsi: Convert to register clk_hw
phy: mediatek: mipi-dsi: Use devm variant
Instead of registering a struct clk, directly register clk_hw: this
allows us to cleanup a pointer to struct clk from struct mtk_mipi_tx.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/phy/mediatek/phy-mtk-mipi-dsi.c | 13 ++---
drivers/phy/mediatek/phy-mtk-mipi-dsi.h | 1 -
2
Il 24/05/23 10:30, Julien Stephan ha scritto:
Add definition for CDPHY phy type that can be configured in either D-PHY
mode or C-PHY mode
Signed-off-by: Julien Stephan
Reviewed-by: AngeloGioacchino Del Regno
---
include/dt-bindings/phy/phy.h | 1 +
1 file changed, 1 insertion(+)
diff
Il 24/05/23 10:30, Julien Stephan ha scritto:
From: Florian Sylvestre
This adds the bindings, for the MIPI CD-PHY module v0.5 embedded in
some Mediatek soc, such as the mt8365
Signed-off-by: Florian Sylvestre
Signed-off-by: Julien Stephan
---
.../bindings/phy/mediatek,mt8365-csi-rx.yaml
Function mtk_dsi_ps_control() is a subset of mtk_dsi_ps_control_vact():
merge the two in one mtk_dsi_ps_control() function by adding one
function parameter `config_vact` which, when true, writes the VACT
related registers.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek
(), where
it was possible to change a switch to a short for loop and to
also remove the need to check for maximum DSI lanes == 4 thanks
to the FIELD_PREP macro masking the value.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 95 --
1
series depends and can be applied only on top of [1].
[1]:
https://lore.kernel.org/lkml/20230523104234.7849-1-angelogioacchino.delre...@collabora.com/
AngeloGioacchino Del Regno (4):
drm/mediatek: dsi: Use GENMASK() for register mask definitions
drm/mediatek: dsi: Cleanup functions mtk_dsi_ps_c
In mtk_dsi_phy_timconfig(), we're dividing the `data_rate` variable,
expressed in Hz to retrieve a value in MHz: instead of open-coding,
use the HZ_PER_MHZ definition, available in linux/units.h.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 3 ++-
1 file
Change magic numerical masks with usage of the GENMASK() macro
to improve readability.
This commit brings no functional changes.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 46 --
1 file changed, 24 insertions(+), 22 deletions
ol")
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 7d5250351193..b0ab38e59db9 100644
--- a/drivers/gpu/dr
Il 22/05/23 12:00, CK Hu (胡俊光) ha scritto:
Hi, Angelo:
On Thu, 2023-05-18 at 12:48 +0200, AngeloGioacchino Del Regno wrote:
External email : Please do not click links or open attachments until
you have verified the sender or the content.
Move the write to DISP_GAMMA_CFG to enable the Gamma
Newer SoCs support a bigger Gamma LUT table: wire up a callback
to retrieve the correct LUT size for each different Gamma IP.
Co-developed-by: Jason-JH.Lin
Signed-off-by: Jason-JH.Lin
[Angelo: Rewritten commit message/description + porting]
Signed-off-by: AngeloGioacchino Del Regno
Reviewed
]
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 78 +++
1 file changed, 51 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 62e1e50d2671
All of the SoCs that don't have dithering control in the gamma IP
have got a GAMMA_LUT_TYPE bit that tells to the IP if the LUT is
"descending" (bit set) or "rising" (bit cleared): make sure to set
it correctly after programming the LUT.
Signed-off-by: AngeloGioacchino
the subtractions on the 16-bits values and
doing the 10 bits conversion later.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 30 +++
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/drivers
Add support for 12-bit gamma lookup tables and introduce the first
user for it: MT8195.
While at it, also reorder the variables in mtk_gamma_set_common()
and rename `lut_base` to `lut0_base` to improve readability.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Jason-JH.Lin
Move the write to DISP_GAMMA_CFG to enable the Gamma LUT to after
programming the actual table to avoid potential visual glitches during
table modification.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 13 -
1
Disable relay mode at the end of LUT programming to make sure that the
processed image goes through.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm
Del Regno
Reviewed-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index ed2aa1fb0171..62e1e50d2671 100644
Make the code more robust and improve readability by using bitfield
macros instead of open coding bit operations.
While at it, also add a definition for LUT_BITS_DEFAULT.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 41
From: "Jason-JH.Lin"
Adjust the parameters in mtk_drm_gamma_set_common()
- add (struct device *dev) to get lut_diff from gamma's driver data
- remove (bool lut_diff) and use false as default value in the function
Signed-off-by: Jason-JH.Lin
Signed-off-by: AngeloGioacchino
Invert the check for state->gamma_lut and move it at the beginning
of the function to reduce indentation: this prepares the code for
keeping readability on later additions.
This commit brings no functional changes.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: Jason-JH.
1200/1380 MT8195/MT8195T, but also Smartphone chips such as
the Dimensity 9200 (MT6985) and others.
This series was tested on MT8195, MT8192, MT8173, MT6795:
* MT6795, MT8192, MT8173: No regression, works fine.
* MT8195: Color correction is finally working!
AngeloGioacchino Del Regno (10):
drm
Il 09/05/23 17:07, Jason-JH.Lin ha scritto:
Add DSI as main display output for mt8188 vdosys0.
Signed-off-by: Nathan Lu
Signed-off-by: Jason-JH.Lin
Reviewed-by: Matthias Brugger
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
Il 09/05/23 17:07, Jason-JH.Lin ha scritto:
1. Move output drm connector from each ddp_path array to connector array.
2. Add dynamic select available connector flow in crtc create and enable.
Signed-off-by: Nancy Lin
Signed-off-by: Nathan Lu
Signed-off-by: Jason-JH.Lin
---
Il 17/05/23 16:52, Alexandre Bailon ha scritto:
This adds the device tree bindings for the APU DRM driver.
Signed-off-by: Alexandre Bailon
Reviewed-by: Julien Stephan
---
.../devicetree/bindings/gpu/mtk,apu-drm.yaml | 38 +++
mediatek,mt(model)-apu.yaml
1 file changed,
Il 16/05/23 11:30, Julien Stephan ha scritto:
On Mon, May 15, 2023 at 04:32:42PM +0200, AngeloGioacchino Del Regno wrote:
Il 15/05/23 16:07, Julien Stephan ha scritto:
On Mon, May 15, 2023 at 02:22:52PM +0200, AngeloGioacchino Del Regno wrote:
+#define CSIxB_OFFSET 0x1000
What
Il 15/05/23 16:07, Julien Stephan ha scritto:
On Mon, May 15, 2023 at 02:22:52PM +0200, AngeloGioacchino Del Regno wrote:
+#define CSIxB_OFFSET 0x1000
What if we grab two (or three?) iospaces from devicetree?
- base (global)
- csi_a
- csi_b
That would make it possible to maybe
Il 15/05/23 15:36, Julien Stephan ha scritto:
On Mon, May 15, 2023 at 02:22:52PM +0200, AngeloGioacchino Del Regno wrote:
Il 15/05/23 11:05, Julien Stephan ha scritto:
..snip..
+ port->is_cdphy = of_property_read_bool(dev->of_node,
"mediatek,is_cdphy");
This driver
Il 15/05/23 11:05, Julien Stephan ha scritto:
From: Phi-bang Nguyen
This is a new driver that supports the MIPI CSI CD-PHY version 0.5
The number of PHYs depend on the soc.
Signed-off-by: Louis Kuo
Signed-off-by: Phi-bang Nguyen
[Julien Stephan: use GENMASK]
[Julien Stephan: refactor code]
]
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 78 +++
1 file changed, 51 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 62e1e50d2671
Disable relay mode at the end of LUT programming to make sure that the
processed image goes through.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
b
Add support for 12-bit gamma lookup tables and introduce the first
user for it: MT8195.
While at it, also reorder the variables in mtk_gamma_set_common()
and rename `lut_base` to `lut0_base` to improve readability.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek
All of the SoCs that don't have dithering control in the gamma IP
have got a GAMMA_LUT_TYPE bit that tells to the IP if the LUT is
"descending" (bit set) or "rising" (bit cleared): make sure to set
it correctly after programming the LUT.
Signed-off-by: AngeloGioacchino Del
Make the code more robust and improve readability by using bitfield
macros instead of open coding bit operations.
While at it, also add a definition for LUT_BITS_DEFAULT.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 41 ++-
1
Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index ed2aa1fb0171..62e1e50d2671 100644
--- a/drivers/gpu/drm
Move the write to DISP_GAMMA_CFG to enable the Gamma LUT to after
programming the actual table to avoid potential visual glitches during
table modification.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 13 -
1 file changed, 8 insertions
From: "Jason-JH.Lin"
Adjust the parameters in mtk_drm_gamma_set_common()
- add (struct device *dev) to get lut_diff from gamma's driver data
- remove (bool lut_diff) and use false as default value in the function
Signed-off-by: Jason-JH.Lin
Signed-off-by: AngeloGioacchino
the subtractions on the 16-bits values and
doing the 10 bits conversion later.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 30 +++
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/mediatek
Newer SoCs support a bigger Gamma LUT table: wire up a callback
to retrieve the correct LUT size for each different Gamma IP.
Co-developed-by: Jason-JH.Lin
Signed-off-by: Jason-JH.Lin
[Angelo: Rewritten commit message/description + porting]
Signed-off-by: AngeloGioacchino Del Regno
Invert the check for state->gamma_lut and move it at the beginning
of the function to reduce indentation: this prepares the code for
keeping readability on later additions.
This commit brings no functional changes.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/media
such as
the Dimensity 9200 (MT6985) and others.
This series was tested on MT8195, MT8192, MT8173, MT6795:
* MT6795, MT8192, MT8173: No regression, works fine.
* MT8195: Color correction is finally working!
AngeloGioacchino Del Regno (10):
drm/mediatek: gamma: Reduce indentation
Add support for 12-bit gamma lookup tables and introduce the first
user for it: MT8195.
While at it, also reorder the variables in mtk_gamma_set_common()
and rename `lut_base` to `lut0_base` to improve readability.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek
All of the SoCs that don't have dithering control in the gamma IP
have got a GAMMA_LUT_TYPE bit that tells to the IP if the LUT is
"descending" (bit set) or "rising" (bit cleared): make sure to set
it correctly after programming the LUT.
Signed-off-by: AngeloGioacchino Del
]
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 76 +++
1 file changed, 49 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index a655373d568d
Disable relay mode at the end of LUT programming to make sure that the
processed image goes through.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
b
Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 1436e2c860cb..a655373d568d 100644
--- a/drivers/gpu/drm
Make the code more robust and improve readability by using bitfield
macros instead of open coding bit operations.
While at it, also add a definition for LUT_BITS_DEFAULT.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 41 ++-
1
the subtractions on the 16-bits values and
doing the 10 bits conversion later.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 30 +++
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/mediatek
Move the write to DISP_GAMMA_CFG to enable the Gamma LUT to after
programming the actual table to avoid potential visual glitches during
table modification.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 13 -
1 file changed, 8 insertions
From: "Jason-JH.Lin"
Adjust the parameters in mtk_drm_gamma_set_common()
- add (struct device *dev) to get lut_diff from gamma's driver data
- remove (bool lut_diff) and use false as default value in the function
Signed-off-by: Jason-JH.Lin
Signed-off-by: AngeloGioacchino
Newer SoCs support a bigger Gamma LUT table: wire up a callback
to retrieve the correct LUT size for each different Gamma IP.
Co-developed-by: Jason-JH.Lin
Signed-off-by: Jason-JH.Lin
[Angelo: Rewritten commit message/description + porting]
Signed-off-by: AngeloGioacchino Del Regno
Invert the check for state->gamma_lut and move it at the beginning
of the function to reduce indentation: this prepares the code for
keeping readability on later additions.
This commit brings no functional changes.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/media
correction is finally working!
AngeloGioacchino Del Regno (10):
drm/mediatek: gamma: Reduce indentation in mtk_gamma_set_common()
drm/mediatek: gamma: Support SoC specific LUT size
drm/mediatek: gamma: Improve and simplify HW LUT calculation
drm/mediatek: gamma: Enable the Gamma LUT table only
Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index ef0243034663..320a7e36d9c5 100644
--- a/drivers/gpu/drm
All of the SoCs that don't have dithering control in the gamma IP
have got a GAMMA_LUT_TYPE bit that tells to the IP if the LUT is
"descending" (bit set) or "rising" (bit cleared): make sure to set
it correctly after programming the LUT.
Signed-off-by: AngeloGioacchino Del
Add support for 12-bit gamma lookup tables and introduce the first
user for it: MT8195.
While at it, also reorder the variables in mtk_gamma_set_common()
and rename `lut_base` to `lut0_base` to improve readability.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek
Disable relay mode at the end of LUT programming to make sure that the
processed image goes through.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
b
]
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 76 +++
1 file changed, 49 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index 320a7e36d9c5
Make the code more robust and improve readability by using bitfield
macros instead of open coding bit operations.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 40 ++-
1 file changed, 25 insertions(+), 15 deletions(-)
diff --git
Move the write to DISP_GAMMA_CFG to enable the Gamma LUT to after
programming the actual table to avoid potential visual glitches during
table modification.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 13 -
1 file changed, 8 insertions
the subtractions on the 16-bits values and
doing the 10 bits conversion later.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 30 +++
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/mediatek
Invert the check for state->gamma_lut and move it at the beginning
of the function to reduce indentation: this prepares the code for
keeping readability on later additions.
This commit brings no functional changes.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/media
Newer SoCs support a bigger Gamma LUT table: wire up a callback
to retrieve the correct LUT size for each different Gamma IP.
Co-developed-by: Jason-JH.Lin
Signed-off-by: Jason-JH.Lin
[Angelo: Rewritten commit message/description + porting]
Signed-off-by: AngeloGioacchino Del Regno
From: "Jason-JH.Lin"
Adjust the parameters in mtk_drm_gamma_set_common()
- add (struct device *dev) to get lut_diff from gamma's driver data
- remove (bool lut_diff) and use false as default value in the function
Signed-off-by: Jason-JH.Lin
Signed-off-by: AngeloGioacchino
MT8195/MT8195T, but also Smartphone chips such as
the Dimensity 9200 (MT6985) and others.
This series was tested on MT8195, MT8192, MT8173, MT6795:
* MT6795, MT8192, MT8173: No regression, works fine.
* MT8195: Color correction is finally working!
AngeloGioacchino Del Regno (10):
drm/mediatek
Il 26/04/23 13:43, AngeloGioacchino Del Regno ha scritto:
Il 12/09/22 03:29, Jason-JH.Lin ha scritto:
Since the gamma_set_common() function for previous SoC,
such as mt8173 and mt8183, is designed for 9bit-to-10bit
conversion.
mt8195 is using 10bit-to-12bit conversion, which is
not compatible
Il 12/09/22 03:30, Jason-JH.Lin ha scritto:
Add multiple bank support for mt8195.
If bank size is 0 which means no bank support.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 45 +--
1 file changed, 26 insertions(+), 19 deletions(-)
diff
Il 12/09/22 03:29, Jason-JH.Lin ha scritto:
Since the gamma_set_common() function for previous SoC,
such as mt8173 and mt8183, is designed for 9bit-to-10bit
conversion.
mt8195 is using 10bit-to-12bit conversion, which is
not compatible with the previous function.
Thus, need to update the
Il 21/04/23 04:16, Nancy.Lin ha scritto:
fix Smatch static checker warning
- uninitialized symbol comp_pdev in mtk_ddp_comp_init.
Fixes: 0d9eee9118b7 ("drm/mediatek: Add drm ovl_adaptor sub driver for MT8195")
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Il 20/04/23 12:51, Nancy.Lin ha scritto:
fix Smatch static checker warning
- uninitialized symbol comp_pdev in mtk_ddp_comp_init.
Signed-off-by: Nancy.Lin
I agree with this commit, but please add a Fixes tag.
Thanks,
Angelo
Il 21/03/23 12:14, AngeloGioacchino Del Regno ha scritto:
The documentation for some of the driver structures in mediatek-drm
was set to be kerneldoc but some code additions didn't actually update
the comments accordingly and this caused triggering some warnings.
Add comments for the remaining
e DSI host is used.
Fix that.
Fixes: 5dd45b66742a ("drm/panel: novatek-nt35950: Improve error handling")
Reported-by: AngeloGioacchino Del Regno
Signed-off-by: Konrad Dybcio
Reviewed-by: AngeloGioacchino Del Regno
Il 17/04/23 15:38, Konrad Dybcio ha scritto:
On 17.04.2023 11:44, AngeloGioacchino Del Regno wrote:
Il 17/04/23 11:44, AngeloGioacchino Del Regno ha scritto:
Il 17/04/23 09:25, Neil Armstrong ha scritto:
On 15/04/2023 13:00, Konrad Dybcio wrote:
In a very peculiar case when probing
Il 13/04/23 06:06, xinlei@mediatek.com ha scritto:
From: Xinlei Lee
Mainly add the following two flag:
1.The audio packet arrangement function is to only arrange audio
packets into the Hblanking area. In order to align with the HW
default setting of g1200, this function needs to be turned
Il 13/04/23 06:06, xinlei@mediatek.com ha scritto:
From: Xinlei Lee
Add dt-binding documentation of dp-tx for MediaTek MT8188 SoC.
Signed-off-by: Xinlei Lee
Signed-off-by: Jitao Shi
Acked-by: Krzysztof Kozlowski
Are you sure that there's no eDP support planned for this SoC?
Il 13/04/23 06:06, xinlei@mediatek.com ha scritto:
From: Xinlei Lee
Add dt-binding documentation of dp-tx for MediaTek MT8188 SoC.
Signed-off-by: Xinlei Lee
Signed-off-by: Jitao Shi
Acked-by: Krzysztof Kozlowski
Are you sure that there's no eDP support planned for this SoC?
Il 17/04/23 11:44, AngeloGioacchino Del Regno ha scritto:
Il 17/04/23 09:25, Neil Armstrong ha scritto:
On 15/04/2023 13:00, Konrad Dybcio wrote:
In a very peculiar case when probing and registering with the secondary
DSI host succeeds, but the OF backlight or DSI attachment fails, the
primary
Il 17/04/23 09:25, Neil Armstrong ha scritto:
On 15/04/2023 13:00, Konrad Dybcio wrote:
In a very peculiar case when probing and registering with the secondary
DSI host succeeds, but the OF backlight or DSI attachment fails, the
primary DSI device is automatically cleaned up, but the secondary
iatek: add support for phy-mtk-hdmi-mt8195")
Reported-by: kernel test robot
Signed-off-by: Guillaume Ranquet
Reviewed-by: AngeloGioacchino Del Regno
.
Fixes: 45810d486bb4 ("phy: mediatek: add support for phy-mtk-hdmi-mt8195")
Signed-off-by: Tom Rix
Reviewed-by: AngeloGioacchino Del Regno
_u64(((u64)ns_hdmipll_ck) << PCW_DECIMAL_WIDTH,
- da_hdmitx21_ref_ck / PLL_FBKDIV_HS3);
+ da_hdmitx21_ref_ck * PLL_FBKDIV_HS3);
How did that even work?!?!?!? Because ... it worked, I did test it. Bah!
Luck was on your side :-P
Reviewed-by: AngeloGioacchino Del Regno
Il 13/04/23 14:46, Guillaume Ranquet ha scritto:
The ret variable in mtk_hdmi_pll_calc() was used unitialized as reported
by the kernel test robot.
Fix the issue by removing the variable altogether and testing out the
return value of mtk_hdmi_pll_set_hw()
Fixes: 45810d486bb44 ("phy: mediatek:
Il 14/04/23 10:46, Krzysztof Kozlowski ha scritto:
On 12/04/2023 13:27, AngeloGioacchino Del Regno wrote:
I have added more than 800 lines to this devicetree: adding myself to
the copyright header.
Signed-off-by: AngeloGioacchino Del Regno
---
arch/arm64/boot/dts/mediatek/mt6795.dtsi | 3
Il 14/04/23 10:34, Krzysztof Kozlowski ha scritto:
On 14/04/2023 10:30, Uwe Kleine-König wrote:
On Fri, Apr 14, 2023 at 10:21:05AM +0200, Krzysztof Kozlowski wrote:
On 12/04/2023 13:27, AngeloGioacchino Del Regno wrote:
Add a compatible string for MediaTek Helio X10 MT6795's display PWM
block
Il 13/04/23 10:52, Matthias Brugger ha scritto:
On 12/04/2023 23:03, Rob Herring wrote:
On Wed, 12 Apr 2023 13:27:13 +0200, AngeloGioacchino Del Regno wrote:
Add a compatible string for MediaTek Helio X10 MT6795's display PWM
block: this is the same as MT8173.
Signed-off
Il 12/04/23 14:41, Matthias Brugger ha scritto:
On 12/04/2023 13:27, AngeloGioacchino Del Regno wrote:
I have added more than 800 lines to this devicetree: adding myself to
the copyright header.
Signed-off-by: AngeloGioacchino Del Regno
---
arch/arm64/boot/dts/mediatek/mt6795.dtsi | 3
Il 12/04/23 14:36, Matthias Brugger ha scritto:
On 12/04/2023 13:27, AngeloGioacchino Del Regno wrote:
Add a compatible string for MediaTek Helio X10 MT6795, using the same
DSI block as MT8173.
Signed-off-by: AngeloGioacchino Del Regno
---
.../display/mediatek/mediatek,dsi.yaml
Il 12/04/23 15:12, Alexandre Mergnat ha scritto:
On 12/04/2023 15:03, AngeloGioacchino Del Regno wrote:
Il 12/04/23 14:59, Alexandre Mergnat ha scritto:
On 12/04/2023 13:27, AngeloGioacchino Del Regno wrote:
Add a compatible string for MediaTek Helio X10 MT6795: this SoC uses
the same DSI PHY
Il 12/04/23 14:59, Alexandre Mergnat ha scritto:
On 12/04/2023 13:27, AngeloGioacchino Del Regno wrote:
Add a compatible string for MediaTek Helio X10 MT6795: this SoC uses
the same DSI PHY as MT8173.
Signed-off-by: AngeloGioacchino Del Regno
---
Documentation/devicetree/bindings/phy
Il 12/04/23 14:22, Hans Verkuil ha scritto:
On 12/04/2023 05:30, Xiaoyong Lu wrote:
Add mediatek av1 decoder linux driver which use the stateless API in
MT8195.
Signed-off-by: Xiaoyong Lu
Tested-by: Nicolas Dufresne
Reviewed-by: Nicolas Dufresne
Tested-by: AngeloGioacchino Del Regno
Instead of the open-coded platform_get_resource, devm_ioremap_resource
switch to devm_platform_get_and_ioremap_resource(), doing exactly the
same.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff
Change drm_bridge_add() to its devm variant to slightly simplify the
probe function.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
b/drivers/gpu/drm
Function drm_of_find_panel_or_bridge() is marked as deprecated: since
the usage of that in this driver exactly corresponds to the new function
devm_drm_of_get_bridge(), switch to it.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 7 +++
1 file changed, 3
Use dev_err_probe() across the entire probe function of this driver
to shrink the size.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 44 ++
1 file changed, 14 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/mediatek
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