will not be confused by a corresponding dpcd write.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 38 +++
1 file changed, 22 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
b/drivers/gpu/drm/display
With a value of '0' read from MSTM_CAP register MST to be enabled.
DP2.1 SCR updates the spec for 128/132b DP capable supporting only one
stream and not supporting single stream sideband MSG.
The underlying protocol will be MST to enable use of MTP.
Signed-off-by: Arun R Murthy
---
drivers/gpu
With a value of '0' read from MSTM_CAP register MST to be enabled.
DP2.1 SCR updates the spec for 128/132b DP capable supporting only one
stream and not supporting single stream sideband MSG.
The underlying protocol will be MST to enable use of MTP.
Signed-off-by: Arun R Murthy
---
drivers/gpu
will not be confused by a corresponding dpcd write.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 26 +++
1 file changed, 15 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
b/drivers/gpu/drm/display
this write.
Corrective actions on SDP corruption is yet to be defined.
v2: Moved the CRC enable to link training init(Jani N)
v3: Moved crc enable to ddi pre enable
v4: Separate function for SDP CRC16 (Jani N)
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_ddi.c | 4
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
v2: Update the macro name to reflect the DP spec(Harry)
Signed-off-by: Arun R Murthy
Reviewed-by: Harry Wentland
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions
*** BLURB HERE ***
Arun R Murthy (2):
drm: Add SDP Error Detection Configuration Register
i915/display/dp: SDP CRC16 for 128b132b link layer
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
include/drm/display/drm_dp.h | 3 +++
2 files changed
this write.
Corrective actions on SDP corruption is yet to be defined.
v2: Moved the CRC enable to link training init(Jani N)
v3: Moved crc enable to ddi pre enable
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_ddi.c | 12
1 file changed, 12 insertions(+)
diff
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
v2: Update the macro name to reflect the DP spec(Harry)
Signed-off-by: Arun R Murthy
Reviewed-by: Harry Wentland
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions
*** BLURB HERE ***
Arun R Murthy (2):
drm: Add SDP Error Detection Configuration Register
i915/display/dp: SDP CRC16 for 128b132b link layer
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
include/drm/display/drm_dp.h | 3 +++
2 files changed
this write.
Corrective actions on SDP corruption is yet to be defined.
v2: Moved the CRC enable to link training init(Jani N)
v3: Moved crc enable to ddi pre enable
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
1 file changed, 12
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
v2: Update the macro name to reflect the DP spec(Harry)
Signed-off-by: Arun R Murthy
Reviewed-by: Harry Wentland
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions
*** BLURB HERE ***
Arun R Murthy (2):
drm: Add SDP Error Detection Configuration Register
i915/display/dp: SDP CRC16 for 128b132b link layer
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
include/drm/display/drm_dp.h | 3 +++
2 files changed
this write.
Corrective actions on SDP corruption is yet to be defined.
v2: Moved the CRC enable to link training init(Jani N)
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915
*** BLURB HERE ***
Arun R Murthy (2):
drm: Add SDP Error Detection Configuration Register
i915/display/dp: SDP CRC16 for 128b132b link layer
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
include/drm/display/drm_dp.h | 3 +++
2 files changed
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
v2: Update the macro name to reflect the DP spec(Harry)
Signed-off-by: Arun R Murthy
Reviewed-by: Harry Wentland
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions
this write.
Corrective actions on SDP corruption is yet to be defined.
v2: Moved the CRC enable to link training init(Jani N)
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
v2: Update the macro name to reflect the DP spec(Harry)
Signed-off-by: Arun R Murthy
Reviewed-by: Harry Wentland
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
v2: Update the macro name to reflect the DP spec(Harry)
Signed-off-by: Arun R Murthy
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/drm
this write.
Corrective actions on SDP corruption is yet to be defined.
v2: Moved the CRC enable to link training init(Jani N)
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915
.
Corrective actions on SDP corruption is yet to be defined.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_dp.c | 13 +
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
Signed-off-by: Arun R Murthy
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index
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