On 13.06.2023 10:04, Manikandan Muralidharan wrote:
> - XLCDC in SAM9X7 has different sets of registers and additional
> configuration bits when compared to previous HLCDC IP. Read/write
> operation on the controller registers is now separated using the
> XLCDC status flag.
> - HEO scaling,
On 13.06.2023 10:04, Manikandan Muralidharan wrote:
> From: Durai Manickam KR
>
> Add compatible string check to differentiate XLCDC and HLCDC code
> within the atmel-hlcdc driver files.
>
> Signed-off-by: Durai Manickam KR
> Signed-off-by: Manikandan Muralidharan
> ---
>
Hi, Manikandan,
On 13.06.2023 10:04, Manikandan Muralidharan wrote:
> From: Durai Manickam KR
>
> The register address of the XLCDC IP used in SAM9X7 are different from
> the previous HLCDC.Defining those address space with valid macros.
>
> Signed-off-by: Durai Manickam KR
>
On 04.04.2023 13:10, Maxime Ripard wrote:
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> content is safe
>
> The SAM9x5 slow clock implements a mux with a set_parent hook, but
> doesn't provide a determine_rate implementation.
>
> This is a bit odd, since
On 04.04.2023 13:11, Maxime Ripard wrote:
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> content is safe
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> The Atmel SAM9x5 SMD clocks implements a mux with a set_parent
> hook, but doesn't provide a determine_rate implementation.
>
> This is a bit odd, since
On 04.04.2023 13:10, Maxime Ripard wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> The SAM9x5 main clock implements a mux with a set_parent hook, but
> doesn't provide a determine_rate implementation.
>
> This is a bit odd, since
On 07.05.2023 19:25, Uwe Kleine-König wrote:
>
> The .remove() callback for a platform driver returns an int which makes
> many driver authors wrongly assume it's possible to do error handling by
> returning an error code. However the value returned is (mostly) ignored
> and this typically
On 07.11.2022 19:50, Paul Cercueil wrote:
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> content is safe
>
> Use the DEFINE_SIMPLE_DEV_PM_OPS() and pm_sleep_ptr() macros to handle
> the .suspend/.resume callbacks.
>
> These macros allow the suspend and resume
On 04.01.2020 19:12, Sam Ravnborg wrote:
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> content is safe
>
> Hi Claudiu
>
> On Thu, Jan 02, 2020 at 10:08:48AM +0100, Sam Ravnborg wrote:
>> On Wed, Dec 18, 2019 at 02:28:28PM +0200, Claudiu Beznea wrote:
>>>
On 02.01.2020 11:08, Sam Ravnborg wrote:
> On Wed, Dec 18, 2019 at 02:28:28PM +0200, Claudiu Beznea wrote:
>> From: Peter Rosin
>>
>> The intention was to only select a higher pixel-clock rate than the
>> requested, if a slight overclocking would result in a rate significantly
>> closer to the
On 16.12.2019 18:24, Lee Jones wrote:
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> content is safe
>
> On Fri, 13 Dec 2019, Claudiu Beznea wrote:
>
>> For HLCDC timing engine configurations bit ATMEL_HLCDC_SIP of
>> ATMEL_HLCDC_SR needs to be polled before
On 11.12.2019 15:28, Peter Rosin wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> On 2019-12-11 12:45, claudiu.bez...@microchip.com wrote:
>>
>>
>> On 10.12.2019 19:22, Peter Rosin wrote:
>>> EXTERNAL EMAIL: Do not click links or open
Hi Sam,
On 10.12.2019 22:37, Sam Ravnborg wrote:
> Hi Claudiu.
>
> On Tue, Dec 10, 2019 at 03:24:45PM +0200, Claudiu Beznea wrote:
>> For HLCDC timing engine configurations bit ATMEL_HLCDC_SIP of
>> ATMEL_HLCDC_SR needs to checked if it is equal with zero before applying
>> new configuration to
On 10.12.2019 22:34, Sam Ravnborg wrote:
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> content is safe
>
> Hi Cladiu
>
> On Tue, Dec 10, 2019 at 03:24:47PM +0200, Claudiu Beznea wrote:
>> This reverts commit d2c755e66617620b729041c625a6396c81d1231c.
>> ("drm:
On 10.12.2019 19:22, Peter Rosin wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> On 2019-12-10 15:59, claudiu.bez...@microchip.com wrote:
>>
>>
>> On 10.12.2019 16:11, Peter Rosin wrote:
>>> On 2019-12-10 14:24, Claudiu Beznea wrote:
On 10.12.2019 16:11, Peter Rosin wrote:
> On 2019-12-10 14:24, Claudiu Beznea wrote:
>> This reverts commit f6f7ad3234613f6f7f27c25036aaf078de07e9b0.
>> ("drm/atmel-hlcdc: allow selecting a higher pixel-clock than requested")
>> because allowing selecting a higher pixel clock may overclock
>>
On 05.06.2019 09:49, Lee Jones wrote:
> External E-Mail
>
>
> On Thu, 25 Apr 2019, claudiu.bez...@microchip.com wrote:
>
>> From: Claudiu Beznea
>>
>> Hi,
>>
>> These patches adds support for SAM9X60's LCD controller.
>>
>> First patches add option to specify if controller clock source is
On 05.06.2019 00:54, Sam Ravnborg wrote:
> Hi Claudiu.
>
> On Tue, Jun 04, 2019 at 04:18:33PM +, claudiu.bez...@microchip.com wrote:
>> Hi Sam,
>>
>> On 07.05.2019 21:27, Sam Ravnborg wrote:
>>> External E-Mail
>>>
>>>
>>> Hi Thierry.
>>>
pwm: atmel-hlcdc: add compatible for SAM9X60
Hi Sam,
On 07.05.2019 21:27, Sam Ravnborg wrote:
> External E-Mail
>
>
> Hi Thierry.
>
>> pwm: atmel-hlcdc: add compatible for SAM9X60 HLCDC's PWM
> OK to add the "pwm: atmel-hlcdc: add compatible for SAM9X60 HLCDC's PWM"
> patch via drm-misc?
> Then we can add all 6 patches in one go.
On 08.05.2019 09:23, Lee Jones wrote:
> External E-Mail
>
>
>> drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 18 ++--
>> drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c| 120
>> +++-
>> drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h| 2 +
>>
From: Sandeep Sheriker Mallikarjun
Add the LCD controller for SAM9X60.
Signed-off-by: Sandeep Sheriker Mallikarjun
[claudiu.bez...@microchip.com: add fixed_clksrc option to
atmel_hlcdc_dc_sam9x60]
Signed-off-by: Claudiu Beznea
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 101
From: Claudiu Beznea
Remove cfg initialization with zero and read state with
drm_crtc_state_to_atmel_hlcdc_crtc_state() so that cfg to be initialized
with state's output_mode.
Signed-off-by: Claudiu Beznea
Reviewed-by: Sam Ravnborg
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 6
From: Claudiu Beznea
Hi,
These patches adds support for SAM9X60's LCD controller.
First patches add option to specify if controller clock source is fixed.
Second patch avoid a variable initialization in
atmel_hlcdc_crtc_mode_set_nofb().
The 3rd add compatibles in pwm-atmel-hlcdc driver.
The
From: Sandeep Sheriker Mallikarjun
For SAM9X60 SoC, sys_clk is through lcd_gclk clock source and this
needs to be enabled before enabling lcd_clk.
Signed-off-by: Sandeep Sheriker Mallikarjun
[claudiu.bez...@microchip.com: add fixed_clksrc checks]
Signed-off-by: Claudiu Beznea
---
From: Claudiu Beznea
Revert shift by 8 of state->base.alpha. This introduced regresion
on planes.
Fixes: 7f73c10b256b ("drm/atmel-hclcdc: Convert to the new generic alpha
property")
Cc: Maxime Ripard
Signed-off-by: Claudiu Beznea
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +-
1
From: Claudiu Beznea
Add compatible string for SAM9X60 HLCDC's PWM.
Signed-off-by: Claudiu Beznea
Acked-by: Thierry Reding
---
drivers/pwm/pwm-atmel-hlcdc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pwm/pwm-atmel-hlcdc.c b/drivers/pwm/pwm-atmel-hlcdc.c
index
From: Claudiu Beznea
Add compatible string for SAM9X60 HLCDC's PWM.
Signed-off-by: Claudiu Beznea
Acked-by: Thierry Reding
---
drivers/pwm/pwm-atmel-hlcdc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pwm/pwm-atmel-hlcdc.c b/drivers/pwm/pwm-atmel-hlcdc.c
index
From: Claudiu Beznea
Remove cfg initialization with zero and read state with
drm_crtc_state_to_atmel_hlcdc_crtc_state() so that cfg to be initialized
with state's output_mode.
Signed-off-by: Claudiu Beznea
Reviewed-by: Sam Ravnborg
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 6
From: Claudiu Beznea
SAM9x60 LCD Controller has no option to select clock source as previous
controllers have. To be able to use the same driver even for this LCD
controller add a config option to know if controller supports this.
Signed-off-by: Claudiu Beznea
Reviewed-by: Sam Ravnborg
---
From: Sandeep Sheriker Mallikarjun
For SAM9X60 SoC, sys_clk is through lcd_gclk clock source and this
needs to be enabled before enabling lcd_clk.
Signed-off-by: Sandeep Sheriker Mallikarjun
[claudiu.bez...@microchip.com: add fixed_clksrc checks]
Signed-off-by: Claudiu Beznea
---
From: Claudiu Beznea
SAM9x60 LCD Controller has no option to select clock source as previous
controllers have. To be able to use the same driver even for this LCD
controller add a config option to know if controller supports this.
Signed-off-by: Claudiu Beznea
Reviewed-by: Sam Ravnborg
---
From: Claudiu Beznea
Hi,
These patches adds support for SAM9X60's LCD controller.
First patches add option to specify if controller clock source is fixed.
Second patch avoid a variable initialization in
atmel_hlcdc_crtc_mode_set_nofb().
The 3rd add compatibles in pwm-atmel-hlcdc driver.
The
From: Claudiu Beznea
Revert shift by 8 of state->base.alpha. This introduced regresion
on planes.
Fixes: 7f73c10b256b ("drm/atmel-hclcdc: Convert to the new generic alpha
property")
Cc: Maxime Ripard
Signed-off-by: Claudiu Beznea
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +-
1
From: Sandeep Sheriker Mallikarjun
Add the LCD controller for SAM9X60.
Signed-off-by: Sandeep Sheriker Mallikarjun
[claudiu.bez...@microchip.com: add fixed_clksrc option to
atmel_hlcdc_dc_sam9x60]
Signed-off-by: Claudiu Beznea
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 101
Hi Lee,
On v1 of this series Thierry suggested that this patch would be good to
also go through MFD tree. Would you be able to also pick this patch?
Bellow is his comment on v1 version of this patch:
https://patchwork.ozlabs.org/patch/1049006/
Thank you,
Claudiu Beznea
On 05.03.2019 12:07,
From: Claudiu Beznea
Add compatible for SAM9X60 HLCD controller.
Signed-off-by: Claudiu Beznea
---
drivers/mfd/atmel-hlcdc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mfd/atmel-hlcdc.c b/drivers/mfd/atmel-hlcdc.c
index e82543bcfdc8..35a9e16f9902 100644
---
From: Sandeep Sheriker Mallikarjun
For SAM9X60 SoC, sys_clk is through lcd_gclk clock source and this
needs to be enabled before enabling lcd_clk.
Signed-off-by: Sandeep Sheriker Mallikarjun
[claudiu.bez...@microchip.com: add fixed_clksrc checks]
Signed-off-by: Claudiu Beznea
---
From: Sandeep Sheriker Mallikarjun
Add the LCD controller for SAM9X60.
Signed-off-by: Sandeep Sheriker Mallikarjun
[claudiu.bez...@microchip.com: add fixed_clksrc option to
atmel_hlcdc_dc_sam9x60]
Signed-off-by: Claudiu Beznea
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 101
From: Claudiu Beznea
Add compatible string for SAM9X60 HLCDC's PWM.
Signed-off-by: Claudiu Beznea
Acked-by: Thierry Reding
---
drivers/pwm/pwm-atmel-hlcdc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/pwm/pwm-atmel-hlcdc.c b/drivers/pwm/pwm-atmel-hlcdc.c
index
From: Claudiu Beznea
SAM9x60 LCD Controller has no option to select clock source as previous
controllers have. To be able to use the same driver even for this LCD
controller add a config option to know if controller supports this.
Signed-off-by: Claudiu Beznea
Reviewed-by: Sam Ravnborg
---
From: Claudiu Beznea
Remove cfg initialization with zero and read state with
drm_crtc_state_to_atmel_hlcdc_crtc_state() so that cfg to be initialized
with state's output_mode.
Signed-off-by: Claudiu Beznea
Reviewed-by: Sam Ravnborg
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 6
From: Claudiu Beznea
Add new compatible string for the HLCD controller on SAM9X60 SoC.
Signed-off-by: Claudiu Beznea
---
Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt
From: Claudiu Beznea
Hi,
These patches adds support for SAM9X60's LCD controller.
First patches add option to specify if controller clock source is fixed.
Second patch avoid a variable initialization in
atmel_hlcdc_crtc_mode_set_nofb().
The 3rd one adds specific bindings for SAM9X60 LCD
On 28.02.2019 23:55, Sam Ravnborg wrote:
> Hi Claudiu
>
> On Wed, Feb 27, 2019 at 04:24:40PM +, claudiu.bez...@microchip.com wrote:
>> From: Sandeep Sheriker Mallikarjun
>>
>>
>> For SAM9X60 SoC, sys_clk is through lcd_gclk clock source and this
>> needs to be enabled before enabling
On 28.02.2019 23:13, Sam Ravnborg wrote:
> Hi Alexandre.
>
These patches adds support for SAM9X60's LCD controller.
>>> Can you elaborate a little more which chips that are relevant.
>>> To be able to look into the right data-sheet, while reviewing.
>>> Link to data-sheet would be
On 28.02.2019 23:38, Sam Ravnborg wrote:
> Hi Claudiu
>
> One more reply to this patch...
>
> On Wed, Feb 27, 2019 at 04:24:16PM +, claudiu.bez...@microchip.com wrote:
>> From: Claudiu Beznea
>>
>> SAM9x60 LCD Controller has no option to select clock source as previous
>> controllers
On 28.02.2019 23:25, Sam Ravnborg wrote:
> Hi Claudiu
>
> On Wed, Feb 27, 2019 at 04:24:16PM +, claudiu.bez...@microchip.com wrote:
>> From: Claudiu Beznea
>>
>> SAM9x60 LCD Controller has no option to select clock source as previous
>> controllers have. To be able to use the same driver
From: Claudiu Beznea
Add new compatible string for the HLCD controller on SAM9X60 SoC.
Signed-off-by: Claudiu Beznea
---
Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mfd/atmel-hlcdc.txt
From: Claudiu Beznea
Hi,
These patches adds support for SAM9X60's LCD controller.
First patches add option to specify if controller clock source is fixed.
Second patch avoid a variable initialization in
atmel_hlcdc_crtc_mode_set_nofb().
The 3rd one adds specific bindings for SAM9X60 LCD
From: Claudiu Beznea
Add compatible for SAM9X60 HLCD controller.
Signed-off-by: Claudiu Beznea
---
drivers/mfd/atmel-hlcdc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mfd/atmel-hlcdc.c b/drivers/mfd/atmel-hlcdc.c
index e82543bcfdc8..35a9e16f9902 100644
---
From: Sandeep Sheriker Mallikarjun
For SAM9X60 SoC, sys_clk is through lcd_gclk clock source and this
needs to be enabled before enabling lcd_clk.
Signed-off-by: Sandeep Sheriker Mallikarjun
[claudiu.bez...@microchip.com: add fixed_clksrc checks]
Signed-off-by: Claudiu Beznea
---
From: Sandeep Sheriker Mallikarjun
Add the LCD controller for SAM9X60.
Signed-off-by: Sandeep Sheriker Mallikarjun
[claudiu.bez...@microchip.com: add fixed_clksrc option to
atmel_hlcdc_dc_sam9x60]
Signed-off-by: Claudiu Beznea
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 101
From: Claudiu Beznea
SAM9x60 LCD Controller has no option to select clock source as previous
controllers have. To be able to use the same driver even for this LCD
controller add a config option to know if controller supports this.
Signed-off-by: Claudiu Beznea
---
From: Claudiu Beznea
Add compatible string for SAM9X60 HLCDC's PWM.
Signed-off-by: Claudiu Beznea
---
drivers/pwm/pwm-atmel-hlcdc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/pwm/pwm-atmel-hlcdc.c b/drivers/pwm/pwm-atmel-hlcdc.c
index 54c6633d9b5d..331ca0233d9e 100644
---
From: Claudiu Beznea
Remove cfg initialization with zero and read state with
drm_crtc_state_to_atmel_hlcdc_crtc_state() so that cfg to be initialized
with state's output_mode.
Signed-off-by: Claudiu Beznea
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 6 ++
1 file changed, 2
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