Hi,
On Thu, Nov 17, 2022 at 1:14 PM Doug Anderson wrote:
>
> Hi,
>
> On Thu, Nov 17, 2022 at 12:39 PM Drew Davenport
> wrote:
> >
> > Same change as done for panel-samsung-atna33xc20. Extend the autosuspend
> > delay to avoid oscillating between power status d
Hi,
On Thu, Nov 17, 2022 at 1:14 PM Doug Anderson wrote:
>
> Hi,
>
> On Thu, Nov 17, 2022 at 12:39 PM Drew Davenport
> wrote:
> >
> > ktime_get_boottime continues while the device is suspended. This change
> > ensures that the resume path will not be delay
Hi,
On Thu, Nov 17, 2022 at 1:14 PM Doug Anderson wrote:
>
> Hi,
>
> On Thu, Nov 17, 2022 at 12:39 PM Drew Davenport
> wrote:
> >
> > ktime_get is based on CLOCK_MONOTONIC which stops on suspend. On
> > suspend, the time that the panel was powerd off is re
Hi,
On Fri, Nov 18, 2022 at 2:46 PM Uwe Kleine-König wrote:
>
> From: Uwe Kleine-König
>
> The probe function doesn't make use of the i2c_device_id * parameter so it
> can be trivially converted.
>
> Signed-off-by: Uwe Kleine-König
> ---
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 5 ++---
> 1 f
Hi,
On Fri, Nov 25, 2022 at 2:54 AM Qiqi Zhang wrote:
>
> According to the description in ti-sn65dsi86's datasheet:
>
> CHA_HSYNC_POLARITY:
> 0 = Active High Pulse. Synchronization signal is high for the sync
> pulse width. (default)
> 1 = Active Low Pulse. Synchronization signal is low for the s
Hi,
On Thu, Nov 17, 2022 at 12:39 PM Drew Davenport wrote:
>
> Avoid the panel oscillating on and off during boot. In some cases it
> will be more than 1000ms between powering the panel to read the EDID early
> during boot, and enabling the panel for display. Extending the
> autosuspend delay avo
Hi,
On Thu, Nov 17, 2022 at 12:39 PM Drew Davenport wrote:
>
> Same change as done for panel-samsung-atna33xc20. Extend the autosuspend
> delay to avoid oscillating between power status during boot.
>
> Signed-off-by: Drew Davenport
> ---
>
> drivers/gpu/drm/bridge/parade-ps8640.c | 4 ++--
> 1
Hi,
On Thu, Nov 17, 2022 at 12:39 PM Drew Davenport wrote:
>
> ktime_get_boottime continues while the device is suspended. This change
> ensures that the resume path will not be delayed if the power off delay
> has already been met while the device is suspended
>
> Signed-off-by: Drew Davenport
Hi,
On Thu, Nov 17, 2022 at 12:39 PM Drew Davenport wrote:
>
> ktime_get_boottime continues while the device is suspended. This change
> ensures that the resume path will not be delayed if the power off delay
> has already been met while the device is suspended
>
> Signed-off-by: Drew Davenport
Hi,
On Thu, Nov 17, 2022 at 12:39 PM Drew Davenport wrote:
>
> ktime_get is based on CLOCK_MONOTONIC which stops on suspend. On
> suspend, the time that the panel was powerd off is recorded with
> ktime_get, and on resume this time is compared to the current ktime_get
> time to determine if the d
Hi,
On Fri, Nov 11, 2022 at 12:44 PM Doug Anderson wrote:
>
> Hi,
>
> On Thu, Nov 10, 2022 at 1:51 PM Drew Davenport
> wrote:
> >
> > ktime_get is based on CLOCK_MONOTONIC which stops on suspend. On
> > suspend, the time that the panel was powerd off is re
Hi,
On Thu, Nov 17, 2022 at 9:12 AM Hsin-Yi Wang wrote:
>
> On Thu, Nov 17, 2022 at 11:57 PM Doug Anderson wrote:
> >
> > Hi,
> >
> > On Thu, Nov 17, 2022 at 3:08 AM Hsin-Yi Wang wrote:
> > >
> > > Some bridges are able to update HDCP status f
Hi,
On Thu, Nov 17, 2022 at 3:08 AM Hsin-Yi Wang wrote:
>
> Some bridges are able to update HDCP status from userspace request if
> they support HDCP.
>
> HDCP property is the same as other connector properties that needs to be
> created after the connecter is initialized and before the connector
Hi,
On Tue, Nov 15, 2022 at 7:55 AM Rob Clark wrote:
>
> From: Rob Clark
>
> This was overlooked.
>
> Signed-off-by: Rob Clark
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
Reviewed-by: Douglas Anderson
Hi,
On Mon, Nov 14, 2022 at 2:02 AM Jani Nikula wrote:
>
> On Fri, 11 Nov 2022, Doug Anderson wrote:
> > Hi,
> >
> > On Tue, Oct 25, 2022 at 1:39 PM Abhinav Kumar
> > wrote:
> >>
> >> Hi Doug
> >>
> >> On 10/24/2022 1:28 PM,
Hi,
On Mon, Nov 14, 2022 at 12:50 PM Rob Clark wrote:
>
> From: Rob Clark
>
> If we get an error (other than -ENOENT) we need to propagate that up the
> stack. Otherwise if the nvmem driver hasn't probed yet, we'll end up
> end up claiming that we support all the OPPs which is not likely to be
Hi,
On Mon, Nov 14, 2022 at 11:41 AM Rob Clark wrote:
>
> From: Rob Clark
>
> If we get an error (other than -ENOENT) we need to propagate that up the
> stack. Otherwise if the nvmem driver hasn't probed yet, we'll end up with
> whatever OPP(s) are represented by bit zero.
Can you explain the
Hi,
On Tue, Oct 25, 2022 at 1:39 PM Abhinav Kumar wrote:
>
> Hi Doug
>
> On 10/24/2022 1:28 PM, Doug Anderson wrote:
> > Hi,
> >
> > On Fri, Oct 21, 2022 at 2:18 PM Abhinav Kumar
> > wrote:
> >>
> >> Hi Doug
> >>
> >>
Hi,
On Thu, Nov 10, 2022 at 1:51 PM Drew Davenport wrote:
>
> ktime_get is based on CLOCK_MONOTONIC which stops on suspend. On
> suspend, the time that the panel was powerd off is recorded with
> ktime_get, and on resume this time is compared to the current ktime_get
> time to determine if the dr
Hi,
On Thu, Nov 10, 2022 at 5:13 AM Francesco Dolcini wrote:
>
> On Mon, Oct 17, 2022 at 04:18:13PM +0200, Francesco Dolcini wrote:
> > On Wed, Aug 31, 2022 at 04:16:22PM +0200, Francesco Dolcini wrote:
> > > From: Aishwarya Kothari
> > >
> > > In case bpc is not set for a panel it then throws a
Hi,
On Wed, Nov 2, 2022 at 10:23 AM Dmitry Baryshkov
wrote:
>
> > 1. Someone figures out how to model this with the bridge chain and
> > then we only allow HBR3 if we detect we've got a TCPC that supports
> > it. This seems like the cleanest / best but feels like a long pole.
> > Not only have we
Hi,
On Wed, Nov 2, 2022 at 10:15 AM Dmitry Baryshkov
wrote:
>
> On 01/11/2022 17:37, Doug Anderson wrote:
> > Hi,
> >
> > On Mon, Oct 31, 2022 at 5:15 PM Dmitry Baryshkov
> > wrote:
> >>
> >> On 01/11/2022 03:08, Doug Anderson wrote:
> >>
Hi,
On Tue, Nov 1, 2022 at 7:37 AM Doug Anderson wrote:
>
> Hi,
>
> On Mon, Oct 31, 2022 at 5:15 PM Dmitry Baryshkov
> wrote:
> >
> > On 01/11/2022 03:08, Doug Anderson wrote:
> > > Hi,
> > >
> > > On Mon, Oct 31, 2022 at 2:11
Hi,
On Mon, Oct 31, 2022 at 5:15 PM Dmitry Baryshkov
wrote:
>
> On 01/11/2022 03:08, Doug Anderson wrote:
> > Hi,
> >
> > On Mon, Oct 31, 2022 at 2:11 PM Kuogee Hsieh
> > wrote:
> >>
> >> Hi Dmitry,
> >>
> >>
> >> Li
Hi,
On Mon, Oct 31, 2022 at 2:11 PM Kuogee Hsieh wrote:
>
> Hi Dmitry,
>
>
> Link rate is advertised by sink, but adjusted (reduced the link rate)
> by host during link training.
>
> Therefore should be fine if host did not support HBR3 rate.
>
> It will reduce to lower link rate during link trai
Hi,
On Fri, Oct 21, 2022 at 2:18 PM Abhinav Kumar wrote:
>
> Hi Doug
>
> On 10/21/2022 1:07 PM, Douglas Anderson wrote:
> > If we fail to get a valid panel ID in drm_edid_get_panel_id() we'd
> > like to see the EDID that was read so we have a chance of
> > understanding what's wrong. There's alre
Hi,
On Wed, Oct 19, 2022 at 11:22 AM Doug Anderson wrote:
>
> Hi,
>
> On Wed, Oct 19, 2022 at 11:18 AM Stephen Boyd wrote:
> >
> > Quoting Douglas Anderson (2022-10-17 12:18:51)
> > > Back in commit 826cff3f7ebb ("drm/bridge: parade-ps8640: Enable
> &g
Hi,
On Thu, Oct 20, 2022 at 8:10 PM Sean Hong
wrote:
>
> Add support for the INX - N116BGE-EA2 (HW: C4) panel.
>
> Signed-off-by: Sean Hong
> ---
> drivers/gpu/drm/panel/panel-edp.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Douglas Anderson
NOTE: please send patches in a 2-part se
Hi,
On Thu, Oct 20, 2022 at 7:58 PM Sean Hong
wrote:
>
> Add support for the INX - N116BGE-EA2 (HW: C2) panel.
>
> Signed-off-by: Sean Hong
> ---
> drivers/gpu/drm/panel/panel-edp.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Douglas Anderson
For these simple table entries, I don't
Hi,
On Wed, Oct 19, 2022 at 11:18 AM Stephen Boyd wrote:
>
> Quoting Douglas Anderson (2022-10-17 12:18:51)
> > Back in commit 826cff3f7ebb ("drm/bridge: parade-ps8640: Enable
> > runtime power management") we removed a mysterious 50 ms delay because
> > "Parade's support [couldn't] explain what
Hi,
On Fri, Sep 30, 2022 at 7:20 AM Doug Anderson wrote:
>
> Hi,
>
> On Thu, Sep 29, 2022 at 9:25 PM Jason Yen
> wrote:
> >
> > This chip can not handle aux defer if the host directly program
> > its aux registers to access edid/dpcd. So we need let sof
Hi,
On Thu, Sep 29, 2022 at 9:25 PM Jason Yen
wrote:
>
> This chip can not handle aux defer if the host directly program
> its aux registers to access edid/dpcd. So we need let software
> to handle the aux defer situation.
>
> Signed-off-by: Jason Yen
> ---
>
> Changes in v2:
> - Add aux defer h
Hi,
On Wed, Sep 28, 2022 at 6:57 PM Yuan Can wrote:
>
> In the probe path, dev_err() can be replaced with dev_err_probe()
> which will check if error code is -EPROBE_DEFER and prints the
> error name. It also sets the defer probe reason which can be
> checked later through debugfs.
>
> Signed-off
Hi,
On Wed, Sep 28, 2022 at 6:56 PM Yuan Can wrote:
>
> In the probe path, dev_err() can be replaced with dev_err_probe()
> which will check if error code is -EPROBE_DEFER and prints the
> error name. It also sets the defer probe reason which can be
> checked later through debugfs.
>
> Signed-off
Hi,
On Wed, Sep 14, 2022 at 5:16 AM Kalyan Thota wrote:
>
> Flush mechanism for DSPP blocks has changed in sc7280 family, it
> allows individual sub blocks to be flushed in coordination with
> master flush control.
>
> Representation: master_flush && (PCC_flush | IGC_flush .. etc )
>
> This chang
Hi,
On Wed, Sep 28, 2022 at 6:29 PM Jason Yen
wrote:
>
> This chip can not handle aux defer if the host directly program
> its aux registers to access edid/dpcd. So we need let software
> to handle the aux defer situation.
>
> Signed-off-by: Jason Yen
> ---
>
> drivers/gpu/drm/bridge/parade-ps8
Hi,
On Fri, Sep 23, 2022 at 6:59 PM Yuan Can wrote:
>
> In the probe path, dev_err() can be replaced with dev_err_probe()
> which will check if error code is -EPROBE_DEFER and prints the
> error name. It also sets the defer probe reason which can be
> checked later through debugfs.
>
> Signed-off
Hi,
On Fri, Sep 23, 2022 at 6:58 PM Yuan Can wrote:
>
> In the probe path, dev_err() can be replaced with dev_err_probe()
> which will check if error code is -EPROBE_DEFER and prints the
> error name. It also sets the defer probe reason which can be
> checked later through debugfs.
>
> Signed-off
Hi,
On Tue, Sep 27, 2022 at 11:51 PM Sean Hong
wrote:
>
> On Tue, Sep 27, 2022 at 11:27 PM Doug Anderson wrote:
> >
> > Hi,
> >
> > On Mon, Sep 26, 2022 at 11:35 PM Sean Hong
> > wrote:
> > >
> > > Add support for the BOE - NT116WHM-N4C
Hi,
On Mon, Sep 26, 2022 at 11:35 PM Sean Hong
wrote:
>
> Add support for the BOE - NT116WHM-N4C (HW: V8.1) panel.
>
> Signed-off-by: Sean Hong
> ---
> drivers/gpu/drm/panel/panel-edp.c | 1 +
> 1 file changed, 1 insertion(+)
Wow, another panel?!?
Reviewed-by: Douglas Anderson
Pushed to drm
Hi,
On Mon, Sep 26, 2022 at 7:18 PM Sean Hong
wrote:
>
> This panel has the same delay timing as N116BCA-EA1. So, fix the
> delay timing from delay_200_500_p2e80 to delay_200_500_e80_d50.
>
> Signed-off-by: Sean Hong
> ---
> drivers/gpu/drm/panel/panel-edp.c | 2 +-
> 1 file changed, 1 insertio
Hi,
On Mon, Sep 26, 2022 at 7:10 PM Sean Hong
wrote:
>
> This panel has the same delay timing as N116BCA-EA1. So, fix the
> delay timing from delay_200_500_p2e80 to delay_200_500_e80_d50.
>
> Signed-off-by: Sean Hong
> ---
> drivers/gpu/drm/panel/panel-edp.c | 2 +-
> 1 file changed, 1 insertio
Hi,
On Mon, Sep 26, 2022 at 7:39 AM Doug Anderson wrote:
>
> Hi,
>
> On Mon, Sep 26, 2022 at 3:08 AM Sean Hong
> wrote:
> >
> > Add support for the INX - N116BCA-EA2 (HW: C1) panel
> >
> > Signed-off-by: Sean Hong
> > ---
> > drivers/gpu
Hi,
On Mon, Sep 26, 2022 at 3:08 AM Sean Hong
wrote:
>
> Add support for the INX - N116BCA-EA2 (HW: C1) panel
>
> Signed-off-by: Sean Hong
> ---
> drivers/gpu/drm/panel/panel-edp.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-edp.c
> b/drivers/gpu/drm/pa
Hi,
On Thu, Sep 22, 2022 at 10:51 PM Sean Hong
wrote:
>
> Add support for the AUO - B116XAK01.6 (HW: 1A) panel.
>
> Signed-off-by: Sean Hong
> ---
> drivers/gpu/drm/panel/panel-edp.c | 1 +
> 1 file changed, 1 insertion(+)
As with previous trivial patches that just add an entry to this
structu
Hi,
On Thu, Sep 22, 2022 at 10:46 PM Sean Hong
wrote:
>
> Add support for the BOE - NT116WHM-N21 (HW: V8.2) panel.
>
> Signed-off-by: Sean Hong
> ---
> drivers/gpu/drm/panel/panel-edp.c | 1 +
> 1 file changed, 1 insertion(+)
As with previous trivial patches that just add an entry to this
stru
Hi,
On Fri, Sep 23, 2022 at 1:50 AM Sean Hong
wrote:
>
> Add support for the BOE - NT116WHM-N21 (HW: V8.1) panel.
>
> Signed-off-by: Sean Hong
> ---
> drivers/gpu/drm/panel/panel-edp.c | 1 +
> 1 file changed, 1 insertion(+)
As with previous trivial patches that just add an entry to this
struc
Hi,
On Thu, Sep 22, 2022 at 10:37 PM Sean Hong
wrote:
>
> Add support for the INX - N116BCN-EA1 (HW: C4) panel.
>
> Signed-off-by: Sean Hong
> ---
> drivers/gpu/drm/panel/panel-edp.c | 1 +
> 1 file changed, 1 insertion(+)
As with previous trivial patches that just add an entry to this
structu
Hi,
On Mon, Sep 12, 2022 at 11:48 AM Brian Norris wrote:
>
> On Thu, Aug 25, 2022 at 11:06 AM Brian Norris
> wrote:
> > On Thu, Aug 25, 2022 at 10:37 AM Doug Anderson
> > wrote:
> > > Given that this is _not_ an area that I'm an expert in nor is it an
&g
Hi,
On Tue, Sep 13, 2022 at 9:58 AM Johan Hovold wrote:
>
> Device-managed resources allocated post component bind must be tied to
> the lifetime of the aggregate DRM device or they will not necessarily be
> released when binding of the aggregate device is deferred.
>
> This can lead resource lea
Hi,
On Mon, Sep 12, 2022 at 7:10 PM Dmitry Baryshkov
wrote:
>
> On 12/09/2022 18:40, Johan Hovold wrote:
> > Device-managed resources allocated post component bind must be tied to
> > the lifetime of the aggregate DRM device or they will not necessarily be
> > released when binding of the aggrega
Robert,
On Mon, Sep 12, 2022 at 12:43 PM Robert Foss wrote:
>
> As reported by Laurent in response to this commit[1], this functionality
> should
> not be implemented using the devicetree, because of this let's revert this
> series
> for now.
>
> This reverts commit c312b0df3b13e4c533743bb2c37f
Hi,
On Thu, Sep 8, 2022 at 1:55 AM Chen-Yu Tsai wrote:
>
> This panel has the same delay timing as N116BCA-EA1 from the same
> company, which is also the same as delay_200_500_e80_d50.
>
> Add an entry for it.
>
> Signed-off-by: Chen-Yu Tsai
> ---
> drivers/gpu/drm/panel/panel-edp.c | 1 +
> 1
Hi,
On Thu, Sep 8, 2022 at 1:55 AM Chen-Yu Tsai wrote:
>
> Commit 52824ca4502d ("drm/panel-edp: Better describe eDP panel delays")
> clarified the various delays used for eDP panels, tying them to the eDP
> panel timing diagram.
>
> For Innolux N116BCA-EA1, .prepare_to_enable would be:
>
> t4
Sam,
On Wed, Jul 20, 2022 at 4:23 PM Douglas Anderson wrote:
>
> Ever since I got the spell-check working in my editor this one has
> been bugging me. Fix it.
>
> Signed-off-by: Douglas Anderson
> ---
>
> drivers/gpu/drm/panel/panel-edp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Hi,
On Tue, Aug 30, 2022 at 9:11 AM Tomi Valkeinen
wrote:
>
> >>> eDP the _correct_ implementation for detect is to always return true.
> >>> Yes, there is a line called HPD for eDP and yes that line is used for
> >>> full DisplayPort for detecting a display. For eDP, though, HPD does
> >>> not d
Hi,
On Fri, Aug 26, 2022 at 8:07 AM Sam Ravnborg wrote:
>
> On Mon, Aug 22, 2022 at 10:53:59AM -0700, Douglas Anderson wrote:
> > panel-edp changes go through the drm-misc tree (as per the "DRM PANEL
> > DRIVERS" entry in MAINTAINERS), but ever since splitting panel-edp out
> > of panel-simple I'
Hi,
On Tue, Aug 30, 2022 at 2:00 AM Tomi Valkeinen
wrote:
>
> Hi,
>
> On 29/08/2022 20:38, Doug Anderson wrote:
> > Hi,
> >
> > On Wed, Aug 24, 2022 at 6:00 AM Tomi Valkeinen
> > wrote:
> >>
> >> From: Laurent Pinchart
> >>
>
Hi,
On Mon, Aug 22, 2022 at 9:33 AM Doug Anderson wrote:
>
> Hi,
>
> On Thu, Aug 18, 2022 at 8:03 AM Doug Anderson wrote:
> >
> > Hi,
> >
> > On Wed, Aug 17, 2022 at 8:22 PM Hsin-Yi Wang wrote:
> > >
> > > On Thu, Aug 18, 2022 at 11:19 AM
Hi,
On Wed, Aug 24, 2022 at 6:00 AM Tomi Valkeinen
wrote:
>
> From: Laurent Pinchart
>
> Implement the bridge connector-related .get_edid() and .detect()
> operations, and report the related bridge capabilities and type.
>
> These ops are only added for DP mode. They should also be used for eDP
Hi,
On Wed, Aug 24, 2022 at 6:00 AM Tomi Valkeinen
wrote:
>
> From: Tomi Valkeinen
>
> The blanking related registers are 8 bits, so reject any modes
> with larger blanking periods.
>
> Signed-off-by: Tomi Valkeinen
> ---
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 23 +++
>
Hi,
On Wed, Aug 24, 2022 at 6:01 AM Tomi Valkeinen
wrote:
>
> From: Tomi Valkeinen
>
> The driver does not check AUX_IRQ_STATUS_NAT_I2C_FAIL bit at all when
> sending AUX transfers,
It doesn't? What about a few lines down from where your patch modifies
that reads:
else if (val & AUX_IRQ_STAT
Hi,
On Mon, Aug 22, 2022 at 6:08 PM Brian Norris wrote:
>
> This reverts commit 211f276ed3d96e964d2d1106a198c7f4a4b3f4c0.
>
> For quite some time, core DRM helpers already ensure that any relevant
> connectors/CRTCs/etc. are disabled, as well as their associated
> components (e.g., bridges) when
Hi,
On Wed, Aug 24, 2022 at 1:16 PM Kuogee Hsieh wrote:
>
> At current implementation there is an extra 0 at 1.62G link rate which cause
> no correct pixel_div selected for 1.62G link rate to calculate mvid and nvid.
> This patch delete the extra 0 to have mvid and nvid be calculated correctly.
>
Hi,
On Thu, Aug 18, 2022 at 8:03 AM Doug Anderson wrote:
>
> Hi,
>
> On Wed, Aug 17, 2022 at 8:22 PM Hsin-Yi Wang wrote:
> >
> > On Thu, Aug 18, 2022 at 11:19 AM Rock Chiu
> > wrote:
> > >
> > > How does T4/T5 impact the real case? We talked
Hi,
On Mon, Aug 15, 2022 at 11:45 PM Zhang Zekun wrote:
>
> Add the missing clk_disable_unprepare() before return from
> analogix_dp_resume() in the error handling case.
>
> Fixes: 211f276ed3d9 ("drm: bridge: analogix/dp: add panel prepare/unprepare
> in suspend/resume time")
> Signed-off-by: Zh
Hi,
On Tue, Jul 19, 2022 at 10:42 PM Steev Klimaszewski wrote:
>
> Add an eDP panel entry for IVO M133NW4J-R3.
>
> Due to lack of documentation, use the delay_200_500_e50 timings for now.
Doesn't actually match the commit, which uses "delay_200_500_p2e100".
Fixing while applying.
> Signed-off-
Hi,
On Mon, Aug 22, 2022 at 11:23 PM Yongqin Liu wrote:
>
> Hi, Douglas
>
> Just an update on the fix you pointed out previously here:
> > > [1]
> > > https://lore.kernel.org/r/20220809142738.1.I91625242f137c707bb345c51c80c5ecee02eeff3@changeid
>
> With it I could boot the hikey960 build to the
Hi,
On Mon, Aug 22, 2022 at 10:33 AM Doug Anderson wrote:
>
> Hi,
>
> On Mon, Aug 22, 2022 at 6:35 AM Johan Hovold wrote:
> >
> > On Fri, Jul 22, 2022 at 11:48:40AM +0200, Johan Hovold wrote:
> > > On Mon, Jul 11, 2022 at 09:52:02AM +0200, Johan Hovold wrote:
&
Hi,
On Mon, Aug 22, 2022 at 6:35 AM Johan Hovold wrote:
>
> On Fri, Jul 22, 2022 at 11:48:40AM +0200, Johan Hovold wrote:
> > On Mon, Jul 11, 2022 at 09:52:02AM +0200, Johan Hovold wrote:
> > > Add an eDP panel entry for AUO B133UAN02.1.
> > >
> > > Due to lack of documentation, use the delay_200
Hi,
On Wed, Aug 17, 2022 at 8:22 PM Hsin-Yi Wang wrote:
>
> On Thu, Aug 18, 2022 at 11:19 AM Rock Chiu
> wrote:
> >
> > How does T4/T5 impact the real case? We talked previously the T4/T5
> > shouldn't cause user impact.
> > Do we have testing data from ODM?
> >
> Please leave comments below th
Hi,
On Sun, Aug 14, 2022 at 11:46 PM Maxime Ripard wrote:
>
> On Fri, Jul 29, 2022 at 12:57:40PM -0700, Doug Anderson wrote:
> > Hi,
> >
> > On Fri, Jul 29, 2022 at 9:41 AM Maxime Ripard wrote:
> > >
> > > On Fri, Jul 29, 2022 at 07:50:20AM -0700, D
Hi,
On Mon, Aug 15, 2022 at 2:39 AM Hsin-Yi Wang wrote:
>
> The double reset power-on sequence is a workaround for the hardware
> flaw in some chip that SPI Clock output glitch and cause internal MPU
> unable to read firmware correctly. The sequence is suggested in ps8640
> application note.
>
>
Hi,
On Wed, Jul 20, 2022 at 3:42 PM Doug Anderson wrote:
>
> Hi,
>
> On Wed, Jul 20, 2022 at 1:46 PM Rob Clark wrote:
> >
> > On Fri, Jul 8, 2022 at 8:25 AM Doug Anderson wrote:
> > >
> > > Hi,
> > >
> > > On Wed, Jul 6, 2022 at
Hi,
On Tue, Aug 16, 2022 at 5:58 AM Yongqin Liu wrote:
>
> HI, Douglas
>
> With this change, I get one kernel panic with my hikey960
> android-mainline based Android build,
> if it's reverted, then the build could boot to the home screen successfully.
> From the log information I shared here, not
Hi,
On Mon, Aug 8, 2022 at 3:44 AM Kalyan Thota wrote:
>
> >I'd like to land at least patches 6-8 from [1] next cycle. They clean up the
> >CTL
> >interface. Could you please rebase your patch on top of them?
> >
>
> Sure I'll wait for the series to rebase. @Doug can you comment if this is
> ok
Hi,
On Thu, Aug 4, 2022 at 9:21 AM Robert Foss wrote:
>
> On Fri, 29 Jul 2022 at 02:22, Doug Anderson wrote:
> >
> > Hi,
> >
> > On Mon, Jul 11, 2022 at 5:57 AM Vinod Polimera
> > wrote:
> > >
> > > Changes in v2:
> > >
On Thu, Aug 4, 2022 at 3:29 AM Kalyan Thota wrote:
>
> +static void dpu_hw_ctl_set_dspp_hierarchical_flush(struct dpu_hw_ctl *ctx,
> + enum dpu_dspp dspp, enum dpu_dspp_sub_blk dspp_sub_blk)
> +{
> + uint32_t flushbits = 0, active = 0;
nit: don't init to 0 since you just override belo
Hi,
On Wed, Aug 3, 2022 at 12:32 AM Dmitry Baryshkov
wrote:
>
> > @@ -634,88 +631,71 @@ static int dsi_phy_driver_probe(struct
> > platform_device *pdev)
> > phy->cphy_mode = (phy_type == PHY_TYPE_CPHY);
> >
> > phy->base = msm_ioremap_size(pdev, "dsi_phy", &phy->base_size);
Hi,
On Wed, Aug 3, 2022 at 12:19 AM Dmitry Baryshkov
wrote:
>
> On 03/08/2022 01:37, Douglas Anderson wrote:
> > As of the commit 1de452a0edda ("regulator: core: Allow drivers to
> > define their init data as const") we no longer need to do copying of
> > regulator bulk data from initdata to some
Hi,
On Wed, Aug 3, 2022 at 12:12 AM Dmitry Baryshkov
wrote:
>
> On 03/08/2022 01:37, Douglas Anderson wrote:
> > As of commit 6eabfc018e8d ("regulator: core: Allow specifying an
> > initial load w/ the bulk API") we can now specify the initial load in
> > the bulk data rather than having to manua
Hi,
On Thu, Jul 21, 2022 at 4:36 AM Dmitry Baryshkov
wrote:
>
> On Thu, 21 Jul 2022 at 01:55, Douglas Anderson wrote:
> >
> > I found that writing to `/sys/kernel/debug/dri/*/eDP*/edid_override`
> > wasn't working for me. I could see the new EDID take effect in
> > `/sys/class/drm/card*-eDP*/edi
Hi,
On Fri, Jul 29, 2022 at 9:41 AM Maxime Ripard wrote:
>
> On Fri, Jul 29, 2022 at 07:50:20AM -0700, Doug Anderson wrote:
> > On Fri, Jul 29, 2022 at 12:51 AM Maxime Ripard wrote:
> > >
> > > On Thu, Jul 28, 2022 at 02:18:38PM -0700, Doug Anderson wrote:
>
Hi,
On Fri, Jul 29, 2022 at 12:51 AM Maxime Ripard wrote:
>
> On Thu, Jul 28, 2022 at 02:18:38PM -0700, Doug Anderson wrote:
> > Hi,
> >
> > On Thu, Jul 28, 2022 at 10:34 AM Abhinav Kumar
> > wrote:
> > >
> > > Hi Rob and Doug
> > >
>
Hi,
On Mon, Jul 11, 2022 at 5:57 AM Vinod Polimera
wrote:
>
> Changes in v2:
> - Use dp bridge to set psr entry/exit instead of dpu_enocder.
> - Don't modify whitespaces.
> - Set self refresh aware from atomic_check.
> - Set self refresh aware only if psr is supported.
> - Provide a stu
Hi,
On Mon, Jul 11, 2022 at 5:57 AM Vinod Polimera
wrote:
>
> @@ -359,6 +367,24 @@ void dp_catalog_ctrl_lane_mapping(struct dp_catalog
> *dp_catalog)
> ln_mapping);
> }
>
> +void dp_catalog_ctrl_psr_mainlink_enable(struct dp_catalog *dp_catalog,
> +
Hi,
On Mon, Jul 11, 2022 at 5:57 AM Vinod Polimera
wrote:
>
> Add new helper functions, drm_atomic_get_old_crtc_for_encoder
> and drm_atomic_get_new_crtc_for_encoder to retrieve the
> corresponding crtc for the encoder.
>
> Signed-off-by: Sankeerth Billakanti
> Signed-off-by: Vinod Polimera
> -
Hi,
On Mon, Jul 11, 2022 at 5:57 AM Vinod Polimera
wrote:
>
> Use atomic variants for DP bridge callback functions so that
> the atomic state can be accessed in the interface drivers.
> The atomic state will help the driver find out if the display
> is in self refresh state.
>
> Signed-off-by: Sa
Hi,
On Mon, Jul 11, 2022 at 5:57 AM Vinod Polimera
wrote:
>
> Update crtc retrieval from dpu_enc to dpu_enc connector state,
> since new links get set as part of the dpu enc virt mode set.
> The dpu_enc->crtc cache is no more needed, hence cleaning it as
> part of this change.
I don't know this
Hi,
On Thu, Jul 28, 2022 at 10:34 AM Abhinav Kumar
wrote:
>
> Hi Rob and Doug
>
> On 7/22/2022 10:36 AM, Rob Clark wrote:
> > On Fri, Jul 22, 2022 at 9:48 AM Doug Anderson wrote:
> >>
> >> Hi,
> >>
> >> On Fri, Jul 22, 2022 at 9:37
Hi,
On Wed, Jul 27, 2022 at 6:59 AM Dmitry Baryshkov
wrote:
>
> On Wed, 27 Jul 2022 at 16:57, Doug Anderson wrote:
> >
> > Hi,
> >
> > On Tue, Jul 26, 2022 at 4:53 PM Abhinav Kumar
> > wrote:
> > >
> > > On 7/25/2022 5:49 PM, Dou
Hi,
On Tue, Jul 26, 2022 at 4:53 PM Abhinav Kumar wrote:
>
> On 7/25/2022 5:49 PM, Douglas Anderson wrote:
> > As of commit 5451781dadf8 ("regulator: core: Only count load for
> > enabled consumers"), a load isn't counted for a disabled
> > regulator. That means all the code in the DSI driver to
Hi,
On Fri, Jul 22, 2022 at 9:37 AM Abhinav Kumar wrote:
>
> + sankeerth
>
> Hi Doug
>
> On 7/21/2022 3:23 PM, Douglas Anderson wrote:
> > The Sharp LQ140M1JW46 panel is on the Qualcomm sc7280 CRD reference
> > board. This panel supports 144 Hz and 60 Hz. In the EDID, the 144 Hz
> > mode is liste
Hi,
On Fri, Jul 22, 2022 at 12:48 AM Javier Martinez Canillas
wrote:
>
> If devm_drm_of_get_bridge() can't find the connected bridge, it returns an
> ERR_PTR(-EPROBE_DEFER) to indicate that the probe should be deferred.
>
> But this path also prints an error message, which pollutes the kernel log
Hi,
On Thu, Jul 21, 2022 at 7:52 AM Doug Anderson wrote:
>
> Hi,
>
> On Thu, Jul 21, 2022 at 7:39 AM Doug Anderson wrote:
> >
> > > You could add a way to specify constant base loads in DT on either a per
> > > regulator or per consumer basis.
> >
Hi,
On Thu, Jul 21, 2022 at 8:06 AM Mark Brown wrote:
>
> On Thu, Jul 21, 2022 at 07:49:55AM -0700, Doug Anderson wrote:
>
> > Every single LDO on Qualcomm's PMICs seems to be able to be set in
> > "high power mode" and "low power mode", but I thin
Hi,
On Thu, Jul 21, 2022 at 7:39 AM Doug Anderson wrote:
>
> > You could add a way to specify constant base loads in DT on either a per
> > regulator or per consumer basis.
>
> Yes, this please! ...on a per consumer basis. :-) It's been on my
> wishlist for a while
Hi,
On Thu, Jul 21, 2022 at 6:25 AM Dmitry Baryshkov
wrote:
>
> > This series breaks USB and PCIe for some SC8280XP and SA540P machines
> > where the DP PHY regulators are shared with other PHYs whose drivers do
> > not request a load.
>
> I'm trying to understand, why does this series cause the
Hi,
On Thu, Jul 21, 2022 at 4:20 AM Mark Brown wrote:
>
> On Thu, Jul 21, 2022 at 12:31:41PM +0200, Johan Hovold wrote:
>
> If you're copying someone into a thread that's not obviously relevant
> for them it's good practice to put a note about it at the top of the
> mail to reduce the chances tha
Hi,
On Wed, Jul 20, 2022 at 12:12 PM Nícolas F. R. A. Prado
wrote:
>
> Add panel identification entry for the AUO B120XAN01.0 (product ID:
> 0x1062) panel.
>
> Signed-off-by: Nícolas F. R. A. Prado
>
> ---
> v1:
> https://lore.kernel.org/all/20220719203857.1488831-3-nfrapr...@collabora.com
>
>
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