Hi,
On 7/1/20 3:48 PM, Thomas Zimmermann wrote:
Hi Hans
Am 29.06.20 um 11:38 schrieb Hans de Goede:
Hi,
On 6/25/20 2:00 PM, Thomas Zimmermann wrote:
This patchset adds support for simple-framebuffer platform devices and
a handover mechanism for native drivers to take-over control
Hi,
On 6/30/20 11:06 AM, Daniel Vetter wrote:
On Mon, Jun 29, 2020 at 11:39 AM Hans de Goede wrote:
Hi,
On 6/25/20 2:00 PM, Thomas Zimmermann wrote:
This patchset adds support for simple-framebuffer platform devices and
a handover mechanism for native drivers to take-over control
Hi,
On 6/25/20 2:00 PM, Thomas Zimmermann wrote:
This patchset adds support for simple-framebuffer platform devices and
a handover mechanism for native drivers to take-over control of the
hardware.
The new driver, called simplekms, binds to a simple-frambuffer platform
device. The kernel's
Hi,
On 5/31/20 7:25 PM, Emil Velikov wrote:
On Sun, 31 May 2020 at 10:30, Hans de Goede wrote:
Like the Asus T100HA the Asus T101HA also uses a panel which has been
mounted 90 degrees rotated, add a quirk for this.
Reading the commit message, made me wonder: If it's similar why it
doesn't
of duplicating this inside the resume
handler, this commit makes the resume handler use pwm_lpss_apply() to
restore the settings when necessary. This fixes the output-freq and
duty-cycle being reset to their defaults on resume.
Signed-off-by: Hans de Goede
---
Changes in v3:
- This replaces
/ duty_cycle calculations to take the
extra division by 256 into account.
Signed-off-by: Hans de Goede
---
Changes in v3:
- Use NSEC_PER_USEC instead of adding a new (non-sensical) NSEC_PER_MHZ define
---
drivers/pwm/pwm-crc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
rail PWM controllers will be resumed in the
no-irq phase. Together with the device-link added by the pwm-get this
ensures that the PWM controller will be on when the troublesome PS0
method runs, which stops it from poking the PWM controller.
Signed-off-by: Hans de Goede
---
drivers/acpi/acpi_lpss.c | 1 +
wm: lpss: Avoid potential overflow of base_unit")
Reviewed-by: Andy Shevchenko
Signed-off-by: Hans de Goede
---
Changes in v3:
- Add Fixes tag
- Add Reviewed-by: Andy Shevchenko tag
---
drivers/pwm/pwm-lpss.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pwm/pwm-
Replace the enable, disable and config pwm_ops with an apply op,
to support the new atomic PWM API.
Signed-off-by: Hans de Goede
---
Changes in v3:
- Keep crc_pwm_calc_clk_div() helper to avoid needless churn
---
drivers/pwm/pwm-crc.c | 89 ++-
1 file
will actually be honored.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 44ec7d5b63e1..81232da0c767 100644
--- a/drivers/pwm/pwm-crc.c
+++ b/drivers/pwm/pwm-crc.c
@@ -82,14
the minimum level.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/display/intel_panel.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c
b/drivers/gpu/drm/i915/display/intel_panel.c
index 14e611c92194..cb28b9908ca4 100644
setting a divider of 128 (register-value 127).
Signed-off-by: Hans de Goede
---
Changes in v3:
- Introduce crc_pwm_calc_clk_div() here instead of later in the patch-set
to reduce the amount of churn in the patch-set a bit
---
drivers/pwm/pwm-crc.c | 17 ++---
1 file changed, 14
it again on re-enable.
Signed-off-by: Hans de Goede
---
Changes in v3:
- Remove paragraph about tri-stating the output from the commit message,
we don't have a datasheet so this was just an unfounded guess
---
drivers/pwm/pwm-crc.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers
the fastset path.
Signed-off-by: Hans de Goede
---
.../drm/i915/display/intel_display_types.h| 3 +-
drivers/gpu/drm/i915/display/intel_panel.c| 73 +--
2 files changed, 37 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers
- 1).
Fixes: 684309e5043e ("pwm: lpss: Avoid potential overflow of base_unit")
Signed-off-by: Hans de Goede
---
Changes in v3:
- Change upper limit of clamp to (base_unit_range - 1)
- Add Fixes tag
---
drivers/pwm/pwm-lpss.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
.
Honoring the VBT specified PWM frequency will also hopefully fix the
various bug reports which we have received about users perceiving the
backlight to flicker after a suspend/resume cycle.
Signed-off-by: Hans de Goede
---
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915
_ONCE flag and setting that for the CHT PWM controllers.
Signed-off-by: Hans de Goede
---
Changes in v2:
- Move #define LPSS_SAVE_CTX_ONCE define to group it with LPSS_SAVE_CTX
---
drivers/acpi/acpi_lpss.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/dr
Implement the pwm_ops.get_state() method to complete the support for the
new atomic PWM API.
Reviewed-by: Andy Shevchenko
Signed-off-by: Hans de Goede
---
Changes in v3:
- Add Andy's Reviewed-by tag
- Remove extra whitespace to align some code after assignments (requested by
Uwe Kleine-König
Factor the code which checks and drm_dbg_kms-s the VBT PWM frequency
out of get_backlight_max_vbt().
This is a preparation patch for honering the VBT PWM frequency for
devices which use an external PWM controller (devices using
pwm_setup_backlight()).
Signed-off-by: Hans de Goede
---
drivers
Hi All,
Here is v3 of my patch series converting the i915 driver's code for
controlling the panel's backlight with an external PWM controller to
use the atomic PWM API. See below for the changelog.
Initially the plan was for this series to consist of 2 parts:
1. convert the pwm-crc driver to
Hi,
On 6/11/20 11:21 PM, Uwe Kleine-König wrote:
Hello,
On Mon, Jun 08, 2020 at 04:35:00PM +0200, Daniel Vetter wrote:
On Sat, Jun 06, 2020 at 10:25:45PM +0200, Hans de Goede wrote:
Hi All,
This patch series converts the i915 driver's cpde for controlling the
panel's backlight
Hi,
On 6/11/20 11:37 PM, Uwe Kleine-König wrote:
Hello,
On Sun, Jun 07, 2020 at 08:18:36PM +0200, Hans de Goede wrote:
Implement the pwm_ops.get_state() method to complete the support for the
new atomic PWM API.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 29
Hi,
On 6/12/20 12:20 AM, Uwe Kleine-König wrote:
On Sun, Jun 07, 2020 at 08:18:34PM +0200, Hans de Goede wrote:
The pwm-crc code is using 2 different enable bits:
1. bit 7 of the PWM0_CLK_DIV (PWM_OUTPUT_ENABLE)
2. bit 0 of the BACKLIGHT_EN register
So far we've kept the PWM_OUTPUT_ENABLE
Hi,
On 6/9/20 1:29 PM, Andy Shevchenko wrote:
On Sun, Jun 07, 2020 at 08:18:31PM +0200, Hans de Goede wrote:
While looking into adding atomic-pwm support to the pwm-crc driver I
noticed something odd, there is a PWM_BASE_CLK define of 6 MHz and
there is a clock-divider which divides
Hi,
On 6/9/20 1:32 PM, Andy Shevchenko wrote:
On Sun, Jun 07, 2020 at 08:18:35PM +0200, Hans de Goede wrote:
Replace the enable, disable and config pwm_ops with an apply op,
to support the new atomic PWM API.
...
-static int crc_pwm_calc_clk_div(int period_ns)
+static int crc_pwm_apply
Hi,
On 6/8/20 2:51 PM, Andy Shevchenko wrote:
On Mon, Jun 08, 2020 at 01:07:12PM +0200, Hans de Goede wrote:
On 6/8/20 5:50 AM, Andy Shevchenko wrote:
On Sun, Jun 07, 2020 at 08:18:28PM +0200, Hans de Goede wrote:
When the user requests a high enough period ns value, then the
calculations
Hi,
On 6/8/20 5:55 AM, Andy Shevchenko wrote:
On Sun, Jun 07, 2020 at 08:18:29PM +0200, Hans de Goede wrote:
According to the data-sheet the way the PWM controller works is that
each input clock-cycle the base_unit gets added to a N bit counter and
that counter overflowing determines the PWM
Hi,
On 6/8/20 5:50 AM, Andy Shevchenko wrote:
On Sun, Jun 07, 2020 at 08:18:28PM +0200, Hans de Goede wrote:
When the user requests a high enough period ns value, then the
calculations in pwm_lpss_prepare() might result in a base_unit value of 0.
But according to the data-sheet the way
it again on re-enable.
This should disable the internal (divided) PWM clock and tri-state the
PWM output pin when disabled, saving some power.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git
Factor the code which checks and drm_dbg_kms-s the VBT PWM frequency
out of get_backlight_max_vbt().
This is a preparation patch for honering the VBT PWM frequency for
devices which use an external PWM controller (devices using
pwm_setup_backlight()).
Signed-off-by: Hans de Goede
---
drivers
Implement the pwm_ops.get_state() method to complete the support for the
new atomic PWM API.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 58c7e9ef7278
Replace the enable, disable and config pwm_ops with an apply op,
to support the new atomic PWM API.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 107 +++---
1 file changed, 59 insertions(+), 48 deletions(-)
diff --git a/drivers/pwm/pwm-crc.c b
f any bits in
the ctrl-register have actually changed and if that is the case then sets
the SW_UPDATE bit.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-lpss.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lps
the fastset path.
Signed-off-by: Hans de Goede
---
.../drm/i915/display/intel_display_types.h| 3 +-
drivers/gpu/drm/i915/display/intel_panel.c| 73 +--
2 files changed, 37 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers
.
Honoring the VBT specified PWM frequency will also hopefully fix the
various bug reports which we have received about users perceiving the
backlight to flicker after a suspend/resume cycle.
Signed-off-by: Hans de Goede
---
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915
/ duty_cycle calculations to take the
extra division by 256 into account.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 272eeb071147..43fc912c1fe9 100644
the minimum level.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/display/intel_panel.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c
b/drivers/gpu/drm/i915/display/intel_panel.c
index 14e611c92194..cb28b9908ca4 100644
will actually be honored.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 5ba2a65c524c..ef49a6e3c4d6 100644
--- a/drivers/pwm/pwm-crc.c
+++ b/drivers/pwm/pwm-crc.c
@@ -72,8
setting a divider of 128 (register-value 127).
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 43fc912c1fe9..5ba2a65c524c 100644
--- a/drivers/pwm/pwm-crc.c
+++ b
in
pwm_lpss_prepare() with those in pwm_lpss_get_state().
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-lpss.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
index cae74ce61654..a764e062103b 100644
--- a/drivers/pwm/pwm
rail PWM controllers will be resumed in the
no-irq phase. Together with the device-link added by the pwm-get this
ensures that the PWM controller will be on when the troublesome PS0
method runs, which stops it from poking the PWM controller.
Signed-off-by: Hans de Goede
---
drivers/acpi/acpi_lpss.c | 1 +
_ONCE flag and setting that for the CHT PWM controllers.
Signed-off-by: Hans de Goede
---
Changes in v2:
- Move #define LPSS_SAVE_CTX_ONCE define to group it with LPSS_SAVE_CTX
---
drivers/acpi/acpi_lpss.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/dr
Hi All,
Here is v2 dropping a debugging-patch which I accidentally kept for v1
and addressing a minor review remark from Andy for the 2nd patch.
This patch series converts the i915 driver's code for controlling the
panel's backlight with an external PWM controller to use the atomic PWM API.
ion of at least 32 steps. This limits the maximum
output frequency to 600 KHz / 780 KHz depending on the base clock.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-lpss.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lps
Hi All,
I forgot the [PATCH 0/16] part of the subject here and I accidentally
left a patch adding some debugging printk-s in the series. I will
send out a v2 addressing this.
Regards,
Hans
On 6/6/20 10:25 PM, Hans de Goede wrote:
Hi All,
This patch series converts the i915 driver's cpde
Hi,
On 6/7/20 7:03 PM, Andy Shevchenko wrote:
On Sat, Jun 06, 2020 at 10:25:47PM +0200, Hans de Goede wrote:
The DSDTs on most Cherry Trail devices have an ugly clutch where the PWM
controller gets turned off from the _PS3 method of the graphics-card dev:
Method (_PS3, 0
the minimum level.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/i915/display/intel_panel.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c
b/drivers/gpu/drm/i915/display/intel_panel.c
index 14e611c92194..cb28b9908ca4 100644
Factor the code which checks and drm_dbg_kms-s the VBT PWM frequency
out of get_backlight_max_vbt().
This is a preparation patch for honering the VBT PWM frequency for
devices which use an external PWM controller (devices using
pwm_setup_backlight()).
Signed-off-by: Hans de Goede
---
drivers
in
pwm_lpss_prepare() with those in pwm_lpss_get_state().
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-lpss.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
index cae74ce61654..a764e062103b 100644
--- a/drivers/pwm/pwm
rail PWM controllers will be resumed in the
no-irq phase. Together with the device-link added by the pwm-get this
ensures that the PWM controller will be on when the troublesome PS0
method runs, which stops it from poking the PWM controller.
Signed-off-by: Hans de Goede
---
drivers/acpi/acpi_lpss.c | 1 +
Add debug prints, test patch for moving i915 to atomic PWM.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-lpss.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c
index 2cb0e2a9c08c..c1f8e6da0cd7 100644
Replace the enable, disable and config pwm_ops with an apply op,
to support the new atomic PWM API.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 107 +++---
1 file changed, 59 insertions(+), 48 deletions(-)
diff --git a/drivers/pwm/pwm-crc.c b
f any bits in
the ctrl-register have actually changed and if that is the case then sets
the SW_UPDATE bit.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-lpss.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lps
/ duty_cycle calculations to take the
extra division by 256 into account.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 272eeb071147..43fc912c1fe9 100644
ion of at least 32 steps. This limits the maximum
output frequency to 600 KHz / 780 KHz depending on the base clock.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-lpss.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lps
will actually be honored.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 5ba2a65c524c..ef49a6e3c4d6 100644
--- a/drivers/pwm/pwm-crc.c
+++ b/drivers/pwm/pwm-crc.c
@@ -72,8
.
Honoring the VBT specified PWM frequency will also hopefully fix the
various bug reports which we have received about users perceiving the
backlight to flicker after a suspend/resume cycle.
Signed-off-by: Hans de Goede
---
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915
_ONCE flag and setting that for the CHT PWM controllers.
Signed-off-by: Hans de Goede
---
drivers/acpi/acpi_lpss.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
index 67892fc0b822..26933e6b7b8c 100644
--- a/dr
Hi All,
This patch series converts the i915 driver's cpde for controlling the
panel's backlight with an external PWM controller to use the atomic PWM API.
Initially the plan was for this series to consist of 2 parts:
1. convert the pwm-crc driver to support the atomic PWM API and
2. convert the
setting a divider of 128 (register-value 127).
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 43fc912c1fe9..5ba2a65c524c 100644
--- a/drivers/pwm/pwm-crc.c
+++ b
the fastset path.
Signed-off-by: Hans de Goede
---
.../drm/i915/display/intel_display_types.h| 3 +-
drivers/gpu/drm/i915/display/intel_panel.c| 73 +--
2 files changed, 37 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers
Implement the pwm_ops.get_state() method to complete the support for the
new atomic PWM API.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
index 58c7e9ef7278
it again on re-enable.
This should disable the internal (divided) PWM clock and tri-state the
PWM output pin when disabled, saving some power.
Signed-off-by: Hans de Goede
---
drivers/pwm/pwm-crc.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git
Like the Asus T100HA the Asus T101HA also uses a panel which has been
mounted 90 degrees rotated, add a quirk for this.
Signed-off-by: Hans de Goede
---
drivers/gpu/drm/drm_panel_orientation_quirks.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm
The Acer S1003 has proper DMI strings for sys-vendor and product-name,
so we do not need to match by BIOS-date.
This means that the Acer S1003 can use the generic lcd800x1280_rightside_up
drm_dmi_panel_orientation_data struct which is also used by other quirks.
Signed-off-by: Hans de Goede
Hi,
On 5/14/20 11:53 AM, Emil Velikov wrote:
Hi Hans,
On Thu, 30 Apr 2020 at 15:55, Hans de Goede wrote:
Hi,
On 4/30/20 4:52 PM, Ville Syrjälä wrote:
On Thu, Apr 30, 2020 at 02:47:00PM +0100, Emil Velikov wrote:
Hi Hans,
On Fri, 21 Feb 2020 at 17:33, Hans de Goede wrote
Hi,
On 5/12/20 10:44 PM, mario.limoncie...@dell.com wrote:
-Original Message-
From: Hans de Goede
Sent: Monday, May 11, 2020 12:47 PM
To: Maarten Lankhorst; Maxime Ripard; Thomas Zimmermann; Daniel Vetter; David
Airlie; Rajat Jain; Jani Nikula
Cc: Hans de Goede; Pekka Paalanen
Hi,
On 5/12/20 4:20 PM, Pekka Paalanen wrote:
On Tue, 12 May 2020 10:18:31 +0200
Hans de Goede wrote:
Hi,
On 5/11/20 9:55 PM, Rajat Jain wrote:
Hi Hans,
On Mon, May 11, 2020 at 10:47 AM Hans de Goede mailto:hdego...@redhat.com>> wrote:
Hi All,
This RFC takes Rajat's e
Hi,
On 5/11/20 9:55 PM, Rajat Jain wrote:
Hi Hans,
On Mon, May 11, 2020 at 10:47 AM Hans de Goede mailto:hdego...@redhat.com>> wrote:
Hi All,
This RFC takes Rajat's earlier patch for adding privacy-screen properties
infra to drm_connector.c and then adds the r
Hi,
On 5/11/20 10:04 PM, Rajat Jain wrote:
On Mon, May 11, 2020 at 10:47 AM Hans de Goede wrote:
From: Rajat Jain
Add support for generic electronic privacy screen properties, that
can be added by systems that have an integrated EPS.
Changes in v2 (Hans de Goede)
- Create 2 properties
Hi,
On 5/12/20 9:49 AM, Pekka Paalanen wrote:
On Mon, 11 May 2020 19:47:24 +0200
Hans de Goede wrote:
From: Rajat Jain
Add support for generic electronic privacy screen properties, that
can be added by systems that have an integrated EPS.
Changes in v2 (Hans de Goede)
- Create 2
Hi All,
This RFC takes Rajat's earlier patch for adding privacy-screen properties
infra to drm_connector.c and then adds the results of the discussion from
the "RFC: Drm-connector properties managed by another driver / privacy
screen support" mail thread on top, hence the v2.
The most important
From: Rajat Jain
Add support for generic electronic privacy screen properties, that
can be added by systems that have an integrated EPS.
Changes in v2 (Hans de Goede)
- Create 2 properties, "privacy-screen sw-state" and
"privacy-screen hw-state", to deal with device
that this is taking care of
with device specific settings done by the device's vendor.
Regards,
Hans
El mar., 28 abr. 2020 a las 10:45, Hans de Goede
() escribió:
Hi David,
On 4/28/20 1:58 AM, David Santamaría Rogado wrote:
This is related to the issues at least on some devices for panel
Hi,
On 4/29/20 8:40 PM, Noralf Trønnes wrote:
Den 29.04.2020 16.13, skrev Hans de Goede:
Hi Noralf,
On 4/29/20 2:48 PM, Noralf Trønnes wrote:
This adds a function that creates a backlight device for a connector.
It does not deal with the KMS backlight ABI proposition[1] to add a
connector
Hi,
On 4/30/20 4:52 PM, Ville Syrjälä wrote:
On Thu, Apr 30, 2020 at 02:47:00PM +0100, Emil Velikov wrote:
Hi Hans,
On Fri, 21 Feb 2020 at 17:33, Hans de Goede wrote:
drm_helper_probe_add_cmdline_mode() prefers using a probed mode matching
a video= argument over calculating our own timings
em/internal_backlight.cc
[6] https://github.com/freedesktop/xorg-randrproto/blob/master/randrproto.txt
[7]
https://gitlab.freedesktop.org/xorg/xserver/-/blob/master/hw/xfree86/drivers/modesetting/drmmode_display.c
[8]
https://gitlab.freedesktop.org/xorg/driver/xf86-video-intel/-/blob/master/src/
Hi David,
On 4/28/20 1:58 AM, David Santamaría Rogado wrote:
This is related to the issues at least on some devices for panel
orientation quirks where added.
Thank you for looking into this.
My tests have been done over a Lenovo ideapad D330.
This devices like the other ones that need
Hi all,
On 4/24/20 11:08 AM, Pekka Paalanen wrote:
On Fri, 24 Apr 2020 10:24:31 +0200
Hans de Goede wrote:
Agree on the hw-state prop reflecting the actual hardware state at
all times, that one is easy.
However, when userspace sets "privacy-screen-sw-state", the driver
shou
Hi all,
Pekka, Rajat,
Thank you for your input in this.
On 4/24/20 9:40 AM, Pekka Paalanen wrote:
On Thu, 23 Apr 2020 11:21:47 -0700
Rajat Jain wrote:
On Tue, Apr 21, 2020 at 7:46 AM Pekka Paalanen wrote:
On Tue, 21 Apr 2020 14:37:41 +0200
Hans de Goede wrote:
TL;DR: Yes
Hi,
On 4/17/20 1:55 PM, Jani Nikula wrote:
On Fri, 17 Apr 2020, Pekka Paalanen wrote:
On Wed, 15 Apr 2020 17:40:46 +0200
Hans de Goede wrote:
Hi,
On 4/15/20 5:28 PM, Jani Nikula wrote:
On Wed, 15 Apr 2020, Hans de Goede wrote:
ii. Currently the "privacy-screen" prop
Hi,
On 4/15/20 7:44 PM, Daniel Vetter wrote:
On Wed, Apr 15, 2020 at 05:03:55PM +0200, Hans de Goede wrote:
Hi,
On 4/15/20 9:39 AM, Daniel Vetter wrote:
Allows us to drop the cleanup code on the floor.
Sam noticed in his review:
With this change we avoid calling pci_disable_device()
twise
Hi,
On 4/15/20 11:10 PM, Jani Nikula wrote:
On Wed, 15 Apr 2020, Rajat Jain wrote:
Hello,
On Wed, Apr 15, 2020 at 8:40 AM Hans de Goede wrote:
Hi,
On 4/15/20 5:28 PM, Jani Nikula wrote:
On Wed, 15 Apr 2020, Hans de Goede wrote:
ii. Currently the "privacy-screen" prop
Hi,
On 4/15/20 8:29 PM, Daniel Vetter wrote:
On Wed, Apr 15, 2020 at 8:19 PM Hans de Goede wrote:
Hi,
On 4/15/20 7:54 PM, Daniel Vetter wrote:
On Wed, Apr 15, 2020 at 03:02:53PM +0200, Hans de Goede wrote:
Hi,
On 4/15/20 2:01 PM, Daniel Vetter wrote:
On Wed, Apr 15, 2020 at 01:39:23PM
Hi,
On 4/15/20 7:54 PM, Daniel Vetter wrote:
On Wed, Apr 15, 2020 at 03:02:53PM +0200, Hans de Goede wrote:
Hi,
On 4/15/20 2:01 PM, Daniel Vetter wrote:
On Wed, Apr 15, 2020 at 01:39:23PM +0200, Hans de Goede wrote:
Hi,
On 4/15/20 12:22 PM, Daniel Vetter wrote:
On Wed, Apr 15, 2020 at 12
Hi Mark,
On 4/15/20 7:14 PM, Mark Pearson wrote:
Hi,
-Original Message-
From: Hans de Goede
Sent: Wednesday, April 15, 2020 11:41 AM
On 4/15/20 5:28 PM, Jani Nikula wrote:
On Wed, 15 Apr 2020, Hans de Goede wrote:
Moreover, do we actually need two properties, one which could
Hi,
On 4/15/20 5:28 PM, Jani Nikula wrote:
On Wed, 15 Apr 2020, Hans de Goede wrote:
ii. Currently the "privacy-screen" property added by Rajat's
patch-set is an enum with 2 possible values:
"Enabled"
"Disabled"
We could add a third value "Not Ava
Hi,
On 4/15/20 9:39 AM, Daniel Vetter wrote:
Upcasting using a container_of macro is more typesafe, faster and
easier for the compiler to optimize.
Acked-by: Sam Ravnborg
Signed-off-by: Daniel Vetter
Cc: Hans de Goede
LGTM:
Reviewed-by: Hans de Goede
Regards,
Hans
---
drivers
Hi,
On 4/15/20 9:39 AM, Daniel Vetter wrote:
Already using devm_drm_dev_init, so very simple replacment.
Acked-by: Sam Ravnborg
Signed-off-by: Daniel Vetter
Cc: Hans de Goede
LGTM:
Reviewed-by: Hans de Goede
Regards,
Hans
---
drivers/gpu/drm/tiny/gm12u320.c | 13
Hi,
On 4/15/20 9:39 AM, Daniel Vetter wrote:
Aside from deleting all the cleanup code we're now also setting a name
for the pool
Acked-by: Sam Ravnborg
Signed-off-by: Daniel Vetter
Cc: Hans de Goede
LGTM:
Reviewed-by: Hans de Goede
Regards,
Hans
---
drivers/gpu/drm/vboxvideo
remarks
Acked-by: Sam Ravnborg
Signed-off-by: Daniel Vetter
Cc: Hans de Goede
---
drivers/gpu/drm/vboxvideo/vbox_drv.c | 6 ++
drivers/gpu/drm/vboxvideo/vbox_main.c | 7 +--
2 files changed, 3 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/vboxvideo/vbox_drv.c
b/drivers
Hi,
On 4/15/20 9:39 AM, Daniel Vetter wrote:
Doesn't apply to upstream kernels since a rather long time.
Acked-by: Sam Ravnborg
Signed-off-by: Daniel Vetter
Cc: Hans de Goede
LGTM:
Reviewed-by: Hans de Goede
Regards,
Hans
---
drivers/gpu/drm/vboxvideo/vbox_ttm.c | 12
Hi,
On 4/15/20 9:39 AM, Daniel Vetter wrote:
Straightforward conversion.
Signed-off-by: Daniel Vetter
Cc: Hans de Goede
LGTM:
Reviewed-by: Hans de Goede
Regards,
Hans
---
drivers/gpu/drm/vboxvideo/vbox_drv.c | 19 +--
1 file changed, 5 insertions(+), 14 deletions
Hi,
On 4/15/20 9:39 AM, Daniel Vetter wrote:
We use the baseclass pattern here, so lets to the proper (and more
typesafe) upcasting.
Acked-by: Sam Ravnborg
Acked-by: Thomas Zimmermann
Signed-off-by: Daniel Vetter
Cc: Hans de Goede
LGTM:
Reviewed-by: Hans de Goede
Regards,
Hans
Hi,
On 4/15/20 2:01 PM, Daniel Vetter wrote:
On Wed, Apr 15, 2020 at 01:39:23PM +0200, Hans de Goede wrote:
Hi,
On 4/15/20 12:22 PM, Daniel Vetter wrote:
On Wed, Apr 15, 2020 at 12:11 PM Hans de Goede wrote:
Hi,
On 4/15/20 11:52 AM, Daniel Vetter wrote:
iv. What every SoC subsystem
Hi,
On 4/15/20 1:39 PM, Hans de Goede wrote:
/* Add comment explaining why we need this messy stuff here */
const char * const shadow_providers[] = {
#ifdef CONFIG_THINKPAD_ACPI_MODULE
"thinkpad_acpi",
#endif
#ifdef CONFIG_OTHER_MODULE
"other",
#endif
Hi,
On 4/15/20 12:22 PM, Daniel Vetter wrote:
On Wed, Apr 15, 2020 at 12:11 PM Hans de Goede wrote:
Hi,
On 4/15/20 11:52 AM, Daniel Vetter wrote:
iv. What every SoC subsystem does:
- lcdshadow drivers register drivers
- drm drivers look them up
- if stuff isn't there yet, we delay
Hi,
On 4/15/20 11:52 AM, Daniel Vetter wrote:
On Wed, Apr 15, 2020 at 11:42 AM Hans de Goede wrote:
Hi All,
Somewhat long mail, so I've divided it into "chapters", sorry.
1. Back ground info
---
First some quick background, some recent Lenovo models have
a built
Hi All,
Somewhat long mail, so I've divided it into "chapters", sorry.
1. Back ground info
---
First some quick background, some recent Lenovo models have
a builtin privacy screen which can be turned on/off in software
and the kernel recently has gotten support for this:
Hi,
On 3/31/20 6:44 PM, Jani Nikula wrote:
On Fri, 27 Mar 2020, David Santamaría Rogado wrote:
This patch is still valid as no changes to panel orientation quirks
have been done. Someone can review this to merge?
Cc: Hans.
Looks good to me:
Reviewed-by: Hans de Goede
Regards,
Hans
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