1. Add a loop flag for CMDQ packet struct.
CMDQ helper will use a loop flag to mark CMDQ packet as lopping command
and make current command buffer jumps to the beginning when GCE executes
to the end of command buffer.
2. Add a looping task handle flow in irq handler.
GCE irq occurs when GCE
Open secure cmdq_pkt APIs to support executing commands in secure world.
1. Add cmdq_sec_pkt_alloc_sec_data(), cmdq_sec_pkt_free_sec_data() and
cmdq_sec_pkt_set_data() to prepare the sec_data in cmdq_pkt that will
be referenced in the secure world.
2. Add cmdq_sec_insert_backup_cookie()
CMDQ driver will probe a secure CMDQ driver when has_sec flag
in platform data is true and its device node in dts has defined a
event id of CMDQ_SYNC_TOKEN_SEC_EOF.
Secure CMDQ driver support on mt8188 and mt8195 currently.
So add a has_secure flag to their driver data to probe it.
1. Add mboxes property to define a GCE loopping thread as a secure IRQ
handler.
The CMDQ secure driver requests a mbox channel and sends a looping
command to the GCE thread. The looping command will wait for a secure
packet done event signal from secure world and then jump back to the
first
To support secure video path feature, GCE have to read/write registgers
in the secure world. GCE will enable the secure access permission to the
HW who wants to access the secure content buffer.
Add CMDQ secure mailbox driver to make CMDQ client user is able to
sending their HW settings to the
To support CMDQ secure driver, move some reuseable definition to header.
- define: e.g. CMDQ_GCE_NUM_MAX, CMDQ_THR_BASE, CMDQ_THR_SIZE.
- struct: e.g. cmdq_thread, cmdq, cmdq_task.
- include: e.g. .
Add "#include " for the function that takes
"struct mbox_chan * chan" as a parameter. That may
There are 2 kind of GCE event signal:
- The SW token means: a GCE event signal triggered by SW drivers.
e.g. SW driver append a GCE command to set a GCE event after a specific
GCE command. Or SW driver use CPU to write a event id to GCE register to
trigger the GCE event corresponding to that event
Add cmdq_pkt_logic_command to support math operation.
cmdq_pkt_logic_command can append logic command to the CMDQ packet,
ask GCE to execute a arithmetic calculate instruction,
such as add, subtract, multiply, AND, OR and NOT, etc.
Note that all arithmetic instructions are unsigned calculations.
From: Jason-jh Lin
For the Secure Video Path (SVP) feature, inculding the memory stored
secure video content, the registers of display HW pipeline and the
HW configure operations are required to execute in the secure world.
So using a CMDQ secure driver to make all display HW registers
From: Jason-jh Lin
Memory Definitions:
secure memory - Memory allocated in the TEE (Trusted Execution
Environment) which is inaccessible in the REE (Rich Execution
Environment, i.e. linux kernel/userspace).
secure handle - Integer value which acts as reference to 'secure
memory'. Used
Add secure buffer control flow to mtk_drm_gem.
When user space takes DRM_MTK_GEM_CREATE_RESTRICTED flag and size
to create a mtk_drm_gem object, mtk_drm_gem will find a matched size
dma buffer from secure dma-heap and bind it to mtk_drm_gem object.
TODO:
1. Drop the mtk_gem_create_from_heap()
Add cmdq_insert_backup_cookie to append some commands before EOC:
1. Get GCE HW thread execute count from the GCE HW register.
2. Add 1 to the execute count and then store into a shared memory.
3. Set a software event siganl as secure irq to GCE HW.
Since the value of execute count + 1 is stored
Add DRM_MTK_GEM_CREATE_RESTRICTED flag for the user space to tell the
kernel space this dma buffer is restricted.
The user space can store this flag into the private data of the dma
buffer after allocating.
A restricted buffer is used to store the secure video content to support
secure video path
Add mtk_ddp_sec_write() to configure secure buffer information to
cmdq secure packet data and send to the secure world.
OVL and OVL_ADAPTOR need to use mtk_ddp_sec_write() instead of original
mtk_ddp_write() because the address in plane is secure handle not the real
buffer address.
The secure
Add is_sec flag to identify current mtk_drm_plane is secure.
Add mtk_plane_is_sec_fb() to check current drm_framebuffer is secure.
Signed-off-by: Jason-JH.Lin
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_plane.c | 18 ++
drivers/gpu/drm/mediatek/mtk_plane.h
To add secure flow support for mediatek-drm, each crtc have to
create a secure cmdq mailbox channel. Then cmdq packets with
display HW configuration will be sent to secure cmdq mailbox channel
and configured in the secure world.
Each crtc have to use secure cmdq interface to configure some secure
From: CK Hu
Add an interface to allocate MediaTek GEM buffers, allow the IOCTLs
to be used by render nodes.
This patch also sets the RENDER driver feature.
TODO:
Drop this path after we change all the usages of this ioctl to
DMA_HEAP_IOCTL_ALLOC in the user sapce.
Signed-off-by: CK Hu
CMDQ driver will probe a secure CMDQ driver when has_sec flag
in platform data is true and its device node in dts has defined a
event id of CMDQ_SYNC_TOKEN_SEC_EOF.
Secure CMDQ driver support on mt8188 and mt8195 currently.
So add a has_secure flag to their driver data to probe it.
There are 2 kind of GCE event signal:
- The SW token means: a GCE event signal triggered by SW drivers.
e.g. SW driver append a GCE command to set a GCE event after a specific
GCE command. Or SW driver use CPU to write a event id to GCE register to
trigger the GCE event corresponding to that event
To support CMDQ secure driver, move some reuseable definition to header.
- define: e.g. CMDQ_GCE_NUM_MAX, CMDQ_THR_BASE, CMDQ_THR_SIZE.
- struct: e.g. cmdq_thread, cmdq, cmdq_task.
- include: e.g. .
Add "#include " for the function that takes
"struct mbox_chan * chan" as a parameter. That may
Add cmdq_pkt_logic_command to support math operation.
cmdq_pkt_logic_command can append logic command to the CMDQ packet,
ask GCE to execute a arithmetic calculate instruction,
such as add, subtract, multiply, AND, OR and NOT, etc.
Note that all arithmetic instructions are unsigned calculations.
1. Add a loop flag for CMDQ packet struct.
CMDQ helper will use a loop flag to mark CMDQ packet as lopping command
and make current command buffer jumps to the beginning when GCE executes
to the end of command buffer.
2. Add a looping task handle flow in irq handler.
GCE irq occurs when GCE
From: Jason-jh Lin
For the Secure Video Path (SVP) feature, inculding the memory stored
secure video content, the registers of display HW pipeline and the
HW configure operations are required to execute in the secure world.
So using a CMDQ secure driver to make all display HW registers
To support secure video path feature, GCE have to read/write registgers
in the secure world. GCE will enable the secure access permission to the
HW who wants to access the secure content buffer.
Add CMDQ secure mailbox driver to make CMDQ client user is able to
sending their HW settings to the
Open secure cmdq_pkt APIs to support executing commands in secure world.
1. Add cmdq_sec_pkt_alloc_sec_data(), cmdq_sec_pkt_free_sec_data() and
cmdq_sec_pkt_set_data() to prepare the sec_data in cmdq_pkt that will
be referenced in the secure world.
2. Add cmdq_sec_insert_backup_cookie()
1. Add mboxes property to define a GCE loopping thread as a secure IRQ
handler.
The CMDQ secure driver requests a mbox channel and sends a looping
command to the GCE thread. The looping command will wait for a secure
packet done event signal from secure world and then jump back to the
first
When we run kernel with lockdebug option, we will get the BUG below:
[ 106.692124] BUG: sleeping function called from invalid context at
drivers/base/power/runtime.c:1164
[ 106.692190] in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 3616,
name: kworker/u17:3
[ 106.692226]
Since MT8195 gamma has multiple bank for 12 bits LUT and it is
different from any other SoC LUT setting.
So we add MT8195 compatible to the single enum group to make its
driver data settings can be reused by other SoC.
Signed-off-by: Jason-JH.Lin
Acked-by: Krzysztof Kozlowski
---
Since MT8195 compatible is in the single enum group, we have to add its
compatible into mediatek-drm component binding table to ensure that
it can be bound as a ddp_comp.
Signed-off-by: Jason-JH.Lin
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++
1
From: Jason-jh Lin
Since MT8195 supports GAMMA 12-bit LUT after the landing of [1] series,
we can now add support for MT8188.
[1] MediaTek DDP GAMMA - 12-bit LUT support
- https://patchwork.kernel.org/project/linux-mediatek/list/?series=792516
Change in v2:
1. Keep MT8195 compatible
The gamma LUT setting of MT8188 and MT8195 are the same, so we create
a one of items for MT8188 to reuse the driver data settings of MT8195.
Signed-off-by: Jason-JH.Lin
Reviewed-by: AngeloGioacchino Del Regno
---
.../devicetree/bindings/display/mediatek/mediatek,gamma.yaml | 4
1 file
Since MT8195 gamma has multiple bank for 12 bits LUT and it is
different from any other SoC LUT setting.
So we move MT8195 compatible from the one of items to the
single enum group.
Signed-off-by: Jason-JH.Lin
---
.../devicetree/bindings/display/mediatek/mediatek,gamma.yaml| 2 +-
1 file
The gamma LUT setting of MT8188 and MT8195 are the same, so we create
a one of items for MT8188 to reuse the driver data settings of MT8195.
Signed-off-by: Jason-JH.Lin
---
.../devicetree/bindings/display/mediatek/mediatek,gamma.yaml | 4
1 file changed, 4 insertions(+)
diff --git
Since MT8195 compatible is in the single enum group, we have to add its
compatible into mediatek-drm component binding table to ensure that
it can be bound as a ddp_comp.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
From: Jason-jh Lin
Since MT8195 supports GAMMA 12-bit LUT after the landing of [1] series,
we can now add support for MT8188.
[1] MediaTek DDP GAMMA - 12-bit LUT support
- https://patchwork.kernel.org/project/linux-mediatek/list/?series=792516
Jason-JH.Lin (3):
dt-bindings: display: mediatek
Change mediatek,gce-events property to reference mediatek,gce-props.yaml
instead of defining itself.
Signed-off-by: Jason-JH.Lin
Reviewed-by: Conor Dooley
---
.../bindings/soc/mediatek/mediatek,ccorr.yaml| 12
.../bindings/soc/mediatek/mediatek,mutex.yaml| 11
Change mediatek,gce-events property to reference mediatek,gce-props.yaml
instead of defining itself.
Signed-off-by: Jason-JH.Lin
Reviewed-by: Conor Dooley
---
.../bindings/media/mediatek,mdp3-rdma.yaml | 11 +++
.../devicetree/bindings/media/mediatek,mdp3-rsz.yaml | 12
From: Jason-jh Lin
The property "mediatek,gce-events" is used for GCE event ID corresponding
to a hardware event signal sent by the hardware or a software driver.
If the mailbox providers or consumers want to manipulate the value of
the event ID, they need to know the specific event
Add mediatek,gce-props.yaml for common GCE properties that is used for
both mailbox providers and consumers. We place the common property
"mediatek,gce-events" in this binding currently.
The property "mediatek,gce-events" is used for GCE event ID corresponding
to a hardware event signal sent by
Change mediatek,gce-events property to reference mediatek,gce-props.yaml
instead of defining itself.
Signed-off-by: Jason-JH.Lin
---
.../bindings/soc/mediatek/mediatek,ccorr.yaml| 12
.../bindings/soc/mediatek/mediatek,mutex.yaml| 11 +++
Add mediatek,gce-props.yaml for common GCE properties that is used for
both mailbox providers and consumers. We place the common property
"mediatek,gce-events" in this binding currently.
The property "mediatek,gce-events" is used for GCE event ID corresponding
to a hardware event signal sent by
Change mediatek,gce-events property to reference mediatek,gce-props.yaml
instead of defining itself.
Signed-off-by: Jason-JH.Lin
---
.../bindings/media/mediatek,mdp3-rdma.yaml | 11 +++
.../devicetree/bindings/media/mediatek,mdp3-rsz.yaml | 12
From: Jason-jh Lin
The property "mediatek,gce-events" is used for GCE event ID corresponding
to a hardware event signal sent by the hardware or a sofware driver.
If the mailbox providers or consumers want to manipulate the value of
the event ID, they need to know the specific event
From: Jason-jh Lin
Memory Definitions:
secure memory - Memory allocated in the TEE (Trusted Execution
Environment) which is inaccessible in the REE (Rich Execution
Environment, i.e. linux kernel/userspace).
secure handle - Integer value which acts as reference to 'secure
memory'. Used
Add secure layer config support for ovl_adaptor and sub driver mdp_rdma.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 15 +++
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
To add secure flow support for mediatek-drm, each crtc have to
create a secure cmdq mailbox channel. Then cmdq packets with
display HW configuration will be sent to secure cmdq mailbox channel
and configured in the secure world.
Each crtc have to use secure cmdq interface to configure some secure
Add is_sec flag to identify current mtk_drm_plane is secure.
Add mtk_plane_is_sec_fb() to check current drm_framebuffer is secure.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_plane.c | 19 +++
drivers/gpu/drm/mediatek/mtk_drm_plane.h | 2 ++
2 files
Add DRM_MTK_GEM_CREATE_ENCRYPTED flag to allow user to allocate
a secure buffer to support secure video path feature.
Signed-off-by: Jason-JH.Lin
---
include/uapi/drm/mediatek_drm.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/drm/mediatek_drm.h
Add a secure mailbox channel to support secure video path on
vdosys0 and vdosys1.
Signed-off-by: Jason-JH.Lin
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
Add get_sec_port interface to ddp_comp to get the secure port settings
from ovl and ovl_adaptor.
Then mediatek-drm will use secure cmdq driver to configure DRAM access
permission in secure world by their secure port settings.
Signed-off-by: Jason-JH.Lin
---
Add secure buffer control flow to mtk_drm_gem.
When user space takes DRM_MTK_GEM_CREATE_ENCRYPTED flag and size
to create a mtk_drm_gem object, mtk_drm_gem will find a matched size
dma buffer from secure dma-heap and bind it to mtk_drm_gem object.
Signed-off-by: Jason-JH.Lin
---
Add secure layer config support for ovl.
TODO:
1. Move DISP_REG_OVL_SECURE setting to secure world.
2. Change the parameter register address in mtk_ddp_sec_write()
from "u32 addr" to "struct cmdq_client_reg *cmdq_reg".
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h
Add cmdq_insert_backup_cookie to append some commands before EOC:
1. Get GCE HW thread execute count from the GCE HW register.
2. Add 1 to the execute count and then store into a shared memory.
3. Set a software event siganl as secure irq to GCE HW.
Since the value of execute count + 1 is stored
From: CK Hu
Add an interface to allocate MediaTek GEM buffers, allow the IOCTLs
to be used by render nodes.
This patch also sets the RENDER driver feature.
Signed-off-by: CK Hu
Signed-off-by: Nicolas Boichat
Signed-off-by: Philipp Zabel
Signed-off-by: Jason-JH.Lin
Reviewed-by: Daniel Kurtz
Add mtk_ddp_sec_write to configure secure buffer information to
cmdq secure packet data.
Then secure cmdq driver will use these information to configure
curresponding secure DRAM address to HW overlay in secure world.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |
Add mtk_ddp_sec_write to configure secure buffer information to
cmdq secure packet data.
Then secure cmdq driver will use these information to configure
curresponding secure DRAM address to HW overlay in secure world.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |
The patch series provides drm driver support for enabling secure video
path (SVP) playback on MediaiTek hardware in the Linux kernel.
Memory Definitions:
secure memory - Memory allocated in the TEE (Trusted Execution
Environment) which is inaccessible in the REE (Rich Execution
Environment, i.e.
Add DRM_MTK_GEM_CREATED_ENCRYPTTED flag to allocate a secure buffer
to support secure video path feature.
Signed-off-by: Jason-JH.Lin
---
include/uapi/drm/mediatek_drm.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/drm/mediatek_drm.h b/include/uapi/drm/mediatek_drm.h
index
Add a secure mailbox channel to support secure video path on
vdosys0 and vdosys1.
Signed-off-by: Jason-JH.Lin
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
Add cmdq_insert_backup_cookie to append some commands before EOC:
1. Get GCE HW thread execute count from the GCE HW register.
2. Add 1 to the execute count and then store into a shared memory.
3. Set a software event siganl as secure irq to GCE HW.
Since the value of execute count + 1 is stored
From: CK Hu
Add an interface to allocate MediaTek GEM buffers, allow the IOCTLs
to be used by render nodes.
This patch also sets the RENDER driver feature.
Signed-off-by: CK Hu
Signed-off-by: Nicolas Boichat
Signed-off-by: Philipp Zabel
Signed-off-by: Jason-JH.Lin
Reviewed-by: Daniel Kurtz
Add secure layer config support for ovl.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 3 ++
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 31 +--
.../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 12 +++
To add secure flow support for mediatek-drm, each crtc have to
create a secure cmdq mailbox channel. Then cmdq packets with
display HW configuration will be sent to secure cmdq mailbox channel
and configured in the secure world.
Each crtc have to use secure cmdq interface to configure some secure
Add secure buffer control flow to mtk_drm_gem.
When user space takes DRM_MTK_GEM_CREATE_ENCRYPTED flag and size
to create a mtk_drm_gem object, mtk_drm_gem will find a matched size
dma buffer from secure dma-heap and bind it to mtk_drm_gem object.
Signed-off-by: Jason-JH.Lin
---
Add is_sec flag to identify current mtk_drm_plane is secure.
Add mtk_plane_is_sec_fb() to check current drm_framebuffer is secure.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_plane.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
Add secure layer config support for ovl_adaptor and sub driver mdp_rdma.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 3 +++
drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 11 ---
drivers/gpu/drm/mediatek/mtk_mdp_rdma.h | 2 ++
3 files
Add get_sec_port interface to ddp_comp to get the secure port settings
from ovl and ovl_adaptor.
Then mediatek-drm will use secure cmdq driver to configure DRAM access
permission in secure world by their secure port settings.
Signed-off-by: Jason-JH.Lin
---
Add dynamic select available connector flow in mtk_drm_crtc_create()
and mtk_drm_crtc_atomic_enable().
In mtk_drm_crtc_create(), if there is a connector routes array in drm
driver data, all components definded in the connector routes array will
be checked and their encoder_index will be set.
In
To support dynamic connector selection function, each ddp_comp need to
get their encoder_index to identify which connector should be selected.
Add encoder_index interface for mtk_ddp_comp_funcs to get the encoder
identifier by drm_encoder_index().
Then drm driver will call
To support DSI and eDP as main display connector without modifying
mtk-drm driver, we add connector dynamic selection capability.
Change in v11:
1. move some global variable to a scope.
2. move mtk_drm_crtc_update_output() after pm_runtime_resume_and_get().
3. move return 0 when error occurred
Add implementation of mtk_dpi_encoder_index to mtk_ddp_comp_func
to make mtk_dpi support dynamic connector selection.
Signed-off-by: Jason-JH.Lin
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
drivers/gpu/drm/mediatek/mtk_dpi.c | 9
Add DDP_COMPONENT_DSI0 as a main display output selection on
MT8188 VDOSYS0.
Signed-off-by: Nathan Lu
Signed-off-by: Jason-JH.Lin
Reviewed-by: Matthias Brugger
Reviewed-by: Fei Shao
Reviewed-by: AngeloGioacchino Del Regno
Tested-by: Fei Shao
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 1
According to mtk_drm_kms_init(), the all_drm_private array in each
drm private data stores all drm private data in display path order.
In mtk_drm_get_all_drm_priv(), each element in all_drm_priv should have one
display path private data, such as:
all_drm_priv[CRTC_MAIN] should only have main_path
Move DDP_COMPONENT_DP_INTF0 from mt8188_mtk_ddp_main array to a
connector routes array called mt8188_mtk_ddp_main_routes to support
dynamic selection capability for mt8188.
Signed-off-by: Jason-JH.Lin
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 7
Add implementation of mtk_dsi_encoder_index to mtk_ddp_comp_func
to make mtk_dsi support dynamic connector selection.
Signed-off-by: Jason-JH.Lin
Reviewed-by: CK Hu
Reviewed-by: Fei Shao
Reviewed-by: AngeloGioacchino Del Regno
Tested-by: Fei Shao
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h
Add mtk_drm_crtc_path enum for each display path.
Instead of using array index of all_drm_priv in mtk_drm_kms_init(),
mtk_drm_crtc_path enum can make code more readable.
Signed-off-by: Jason-JH.Lin
Reviewed-by: Fei Shao
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Tested-by:
Add missing mmsys_dev_num to mt8188 vdosys0 driver data.
Fixes: 54b48080278a ("drm/mediatek: Add mediatek-drm of vdosys0 support for
mt8188")
Signed-off-by: Jason-JH.Lin
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Fei Shao
Tested-by: Fei Shao
---
Add dynamic select available connector flow in mtk_drm_crtc_create()
and mtk_drm_crtc_atomic_enable().
In mtk_drm_crtc_create(), if there is a connector routes array in drm
driver data, all components definded in the connector routes array will
be checked and their encoder_index will be set.
In
To support dynamic connector selection function, each ddp_comp need to
get their encoder_index to identify which connector should be selected.
Add encoder_index interface for mtk_ddp_comp_funcs to get the encoder
identifier by drm_encoder_index().
Then drm driver will call
Add DDP_COMPONENT_DSI0 as a main display output selection on
MT8188 VDOSYS0.
Signed-off-by: Nathan Lu
Signed-off-by: Jason-JH.Lin
Reviewed-by: Matthias Brugger
Reviewed-by: Fei Shao
Tested-by: Fei Shao
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 1 +
1 file changed, 1 insertion(+)
diff
Add implementation of mtk_dsi_encoder_index to mtk_ddp_comp_func
to make mtk_dsi support dynamic connector selection.
Signed-off-by: Jason-JH.Lin
Reviewed-by: CK Hu
Reviewed-by: Fei Shao
Tested-by: Fei Shao
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
Add missing mmsys_dev_num to mt8188 vdosys0 driver data.
Fixes: 54b48080278a ("drm/mediatek: Add mediatek-drm of vdosys0 support for
mt8188")
Signed-off-by: Jason-JH.Lin
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Fei Shao
Tested-by: Fei Shao
---
Add implementation of mtk_dpi_encoder_index to mtk_ddp_comp_func
to make mtk_dpi support dynamic connector selection.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
drivers/gpu/drm/mediatek/mtk_dpi.c | 9 +
Add mtk_drm_crtc_path enum for each display path.
Instead of using array index of all_drm_priv in mtk_drm_kms_init(),
mtk_drm_crtc_path enum can make code more readable.
Signed-off-by: Jason-JH.Lin
Reviewed-by: Fei Shao
Reviewed-by: CK Hu
Tested-by: Fei Shao
---
To support DSI and eDP as main display connector without modifying
mtk-drm driver, we add connector dynamic selection capability.
Change in v10:
1. rebase to Linux 6.6-rc3.
2. separate the common part of adding encoder_index interface for ddp_comp
to a single patch.
3. separate the DP_INTF0
According to mtk_drm_kms_init(), the all_drm_private array in each
drm private data stores all drm private data in display path order.
In mtk_drm_get_all_drm_priv(), each element in all_drm_priv should have one
display path private data, such as:
all_drm_priv[CRTC_MAIN] should only have main_path
Move DDP_COMPONENT_DP_INTF0 from mt8188_mtk_ddp_main array to a
connector routes array called mt8188_mtk_ddp_main_routes to support
dynamic selection capability for mt8188.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 7 ++-
1 file changed, 6 insertions(+), 1
Add spinlock protection to avoid race condition on vblank event
between mtk_drm_crtc_atomic_begin() and mtk_drm_finish_page_flip().
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
Signed-off-by: Jason-JH.Lin
Suggested-by: AngeloGioacchino Del Regno
Reviewed-by:
Add is_sec flag to identify current mtk_drm_plane is secure.
Add mtk_plane_is_sec_fb() to check current drm_framebuffer is secure.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_plane.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
Add secure layer config support for ovl_adaptor and sub driver mdp_rdma.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 3 +++
drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 11 ---
drivers/gpu/drm/mediatek/mtk_mdp_rdma.h | 2 ++
3 files
Add mtk_ddp_sec_write to configure secure buffer information to
cmdq secure packet data.
Then secure cmdq driver will use these information to configure
curresponding secure DRAM address to HW overlay in secure world.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |
The patch series provides drm driver support for enabling secure video
path (SVP) playback on MediaiTek hardware in the Linux kernel.
Memory Definitions:
secure memory - Memory allocated in the TEE (Trusted Execution
Environment) which is inaccessible in the REE (Rich Execution
Environment, i.e.
To add secure flow support for mediatek-drm, each crtc have to
create a secure cmdq mailbox channel. Then cmdq packets with
display HW configuration will be sent to secure cmdq mailbox channel
and configured in the secure world.
Each crtc have to use secure cmdq interface to configure some secure
Add secure layer config support for ovl.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 3 ++
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 31 +--
.../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 12 +++
Add secure buffer control flow to mtk_drm_gem.
When user space takes DRM_MTK_GEM_CREATE_ENCRYPTED flag and size
to create a mtk_drm_gem object, mtk_drm_gem will find a matched size
dma buffer from secure dma-heap and bind it to mtk_drm_gem object.
Signed-off-by: Jason-JH.Lin
---
Add a secure mailbox channel to support secure video path on
vdosys0 and vdosys1.
Signed-off-by: Jason-JH.Lin
---
arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
Add get_sec_port interface to ddp_comp to get the secure port settings
from ovl and ovl_adaptor.
Then mediatek-drm will use secure cmdq driver to configure DRAM access
permission in secure world by their secure port settings.
Signed-off-by: Jason-JH.Lin
---
From: CK Hu
Add an interface to allocate MediaTek GEM buffers, allow the IOCTLs
to be used by render nodes.
This patch also sets the RENDER driver feature.
Signed-off-by: CK Hu
Signed-off-by: Nicolas Boichat
Signed-off-by: Philipp Zabel
Signed-off-by: Jason-JH.Lin
Reviewed-by: Daniel Kurtz
Add DRM_MTK_GEM_CREATED_ENCRYPTTED flag to allocate a secure buffer
to support secure video path feature.
Signed-off-by: Jason-JH.Lin
---
include/uapi/drm/mediatek_drm.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/drm/mediatek_drm.h b/include/uapi/drm/mediatek_drm.h
index
Add CMDQ secure driver support for GCE0.
CMDQ secure driver will requset a GCE HW thread in GCE0 core to support
sending a CMDQ packet through secure mailbox.
Then ask GCE HW thread to excute commands in the secure world.
Signed-off-by: Jason-JH.Lin
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi
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