On 5/21/2024 8:41 AM, Tomeu Vizoso wrote:
On Tue, May 21, 2024 at 2:12 PM Daniel Vetter wrote:
On Sat, May 18, 2024 at 10:46:01AM +0200, Tomeu Vizoso wrote:
Hi,
I would like to use the chance at the next Plumbers to discuss the
present challenges related to ML accelerators in mainline.
I'm
On 5/8/2024 7:29 AM, Jacek Lawrynowicz wrote:
From: Tomasz Rusinowicz
The driver tracks the time spent by NPU executing jobs
and shares it through sysfs `npu_busy_time_us` file.
It can be then used by user space applications to monitor device
utilization.
NPU is considered 'busy' starting
On 5/8/2024 7:29 AM, Jacek Lawrynowicz wrote:
Failed warm boot causes a cold boot that looses FW state and is
equivalent to a recovery or reset, so reset_counter should be
incremented in order for this failure to be detected by tests.
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey
Wachowski, Karol
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 5/8/2024 7:21 AM, Jacek Lawrynowicz wrote:
From: Tomasz Rusinowicz
Implement time based Metric Streamer profiling UAPI.
This is a generic mechanism allowing user mode tools to sample
NPU metrics. These metrics are defined by the FW and transparent to
the driver.
The user space can check
On 5/8/2024 7:21 AM, Jacek Lawrynowicz wrote:
From: "Wachowski, Karol"
Create debugfs interface that triggers sending resume engine IPC
command to VPU.
Why? Who would use this and for what purpose?
-Jeff
On 5/8/2024 7:21 AM, Jacek Lawrynowicz wrote:
+#define IVPU_FOCUS_PRESENT_TIMER_MS 1000
+
static char *ivpu_firmware;
module_param_named_unsafe(firmware, ivpu_firmware, charp, 0644);
MODULE_PARM_DESC(firmware, "NPU firmware binary in /lib/firmware/..");
@@ -467,6 +469,10 @@ static void
awrynowicz
Reviewed-by: Jeffrey Hugo
ge
Signed-off-by: Wachowski, Karol
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
Signed-off-by: Wachowski, Karol
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 5/8/2024 7:20 AM, Jacek Lawrynowicz wrote:
From: "Wachowski, Karol"
This param will be used to enable/disable HWS (hardware scheduler).
The HWS is a FW side feature and may not be available on all
HW generations and FW versions.
Signed-off-by: Wachowski, Karol
Signed-off-by: Jacek
On 5/8/2024 7:20 AM, Jacek Lawrynowicz wrote:
Update JSM API to 3.16.0.
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 4/24/2024 12:37 AM, Tomeu Vizoso wrote:
If we expose a render node for NPUs without rendering capabilities, the
userspace stack will offer it to compositors and applications for
rendering, which of course won't work.
Userspace is probably right in not questioning whether a render node
might
On 4/9/2024 7:39 AM, Arnd Bergmann wrote:
From: Arnd Bergmann
The alternative stub functions are listed as global, which produces
a build failure in some configs:
In file included from drivers/accel/qaic/qaic_drv.c:31:
drivers/accel/qaic/qaic_debugfs.h:16:5: error: no previous prototype for
inline as intended.
Fixes: 5f8df5c6def6 ("accel/qaic: Add bootlog debugfs")
Signed-off-by: Arnd Bergmann
Doh. Thank you for addressing this so quickly.
Reviewed-by: Jeffrey Hugo
On 3/21/2024 9:49 PM, Jeffrey Hugo wrote:
The AIC100 secondary bootloader uses the Sahara protocol for two
purposes - loading the runtime firmware images from the host, and
offloading crashdumps to the host. The crashdump functionality is only
invoked when the AIC100 device encounters a crash
On 3/22/2024 11:57 AM, Jeffrey Hugo wrote:
Add 3 debugfs entries that can be useful in debugging a variety of
issues.
bootlog - output the device bootloader log
fifo_size - output the configured dbc fifo size
queued - output how many requests are queued in the dbc fifo
Bootlog is unique
ond time causing the deadlock.
This deadlock was reported by lockdep and observed in internal tests.
Fixes: 35b137630f08 ("accel/ivpu: Introduce a new DRM driver for Intel VPU")
Cc: # v6.3+
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 4/2/2024 4:49 AM, Jacek Lawrynowicz wrote:
Change "VPU" to "NPU" in ivpu_suspend() so it matches all other error
messages.
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
return max freq instead which can be used to estimate
NPU performance.
Fixes: c39dc15191c4 ("accel/ivpu: Read clock rate only if device is up")
Cc: # v6.7
Signed-off-by: Jacek Lawrynowicz
With the above,
Reviewed-by: Jeffrey Hugo
Signed-off-by: Wachowski, Karol
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
x DevTLB errors on suspend/resume and
recovery")
Cc: # v6.8+
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
accel/ivpu: Fix DevTLB errors on suspend/resume and
recovery")
Cc: # v6.8+
Signed-off-by: Wachowski, Karol
Signed-off-by: Jacek Lawrynowicz
Reviewed_by: Jeffrey Hugo
On 4/2/2024 4:49 AM, Jacek Lawrynowicz wrote:
Always enter D3hot after entering D0i3 an all platforms.
This minimizes power usage.
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
Lawrynowicz
Reviewed-by: Jeffrey Hugo
I tweaked the implementation to address both of these.
>From what I can tell, the i915 change no longer applies to the code
base, likely due to refactoring from merging xe. I dropped it.
v2:
-Fix make htmldocs warnings
Jeffrey Hugo (1):
accel/qaic: Use drmm_alloc_workqueue()
Jiasheng Ji
to return the alloc'd workqueue]
Signed-off-by: Jeffrey Hugo
Reviewed-by: Carl Vanderlip
Reviewed-by: Pranjal Ramajor Asha Kanojiya
---
drivers/gpu/drm/drm_managed.c | 87 +++
include/drm/drm_managed.h | 8
2 files changed, 95 insertions(+)
diff --git a/drivers
Now that drmm_alloc_workqueue() exists, we can stop open coding our own
implementation.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Carl Vanderlip
Reviewed-by: Pranjal Ramajor Asha Kanojiya
---
drivers/accel/qaic/qaic_drv.c | 30 --
1 file changed, 4 insertions(+), 26
the driver and SBL have not communicated.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Carl Vanderlip
Reviewed-by: Pranjal Ramajor Asha Kanojiya
Reviewed-by: Jacek Lawrynowicz
---
drivers/accel/qaic/Makefile | 2 +
drivers/accel/qaic/qaic.h | 8 +
drivers/accel/qaic/qaic_debug
the
number of pending requests when read.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Carl Vanderlip
Reviewed-by: Pranjal Ramajor Asha Kanojiya
Reviewed-by: Jacek Lawrynowicz
---
drivers/accel/qaic/qaic.h | 1 +
drivers/accel/qaic/qaic_data.c| 9 +
drivers/accel/qaic/qaic_debu
that will display the size of that dbc's fifo when read.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Carl Vanderlip
Reviewed-by: Pranjal Ramajor Asha Kanojiya
Reviewed-by: Jacek Lawrynowicz
---
drivers/accel/qaic/qaic_debugfs.c | 35 +++
1 file changed, 35 insertions
-dbc.
v2:
-Use size_add() for bounds check
-Move locking into reset_bootlog()
-Clamp num dbcs supported to 256 to address a sprintf warning
Jeffrey Hugo (3):
accel/qaic: Add bootlog debugfs
accel/qaic: Add fifo size debugfs
accel/qaic: Add fifo queued debugfs
drivers/accel/qaic/Makefile
of a provisioning
flow. The host is not aware of this information, and thus should report
an error to the device when an image is not available. The device will
evaluate if the image is required or not, and take the appropriate
action.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Carl Vanderlip
Reviewed
On 3/14/2024 5:41 AM, Jacek Lawrynowicz wrote:
Hi,
On 11.03.2024 17:58, Jeffrey Hugo wrote:
During the boot process of AIC100, the bootloaders (PBL and SBL) log
messages to device RAM. During SBL, if the host opens the QAIC_LOGGING
channel, SBL will offload the contents of the log buffer
I tweaked the implementation to address both of these.
>From what I can tell, the i915 change no longer applies to the code
base, likely due to refactoring from merging xe. I dropped it.
Jeffrey Hugo (1):
accel/qaic: Use drmm_alloc_workqueue()
Jiasheng Jiang (1):
drm: Add DRM-mana
Now that drmm_alloc_workqueue() exists, we can stop open coding our own
implementation.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Carl Vanderlip
Reviewed-by: Pranjal Ramajor Asha Kanojiya
---
drivers/accel/qaic/qaic_drv.c | 30 --
1 file changed, 4 insertions(+), 26
to return the alloc'd workqueue]
Signed-off-by: Jeffrey Hugo
Reviewed-by: Carl Vanderlip
Reviewed-by: Pranjal Ramajor Asha Kanojiya
---
drivers/gpu/drm/drm_managed.c | 82 +++
include/drm/drm_managed.h | 8
2 files changed, 90 insertions(+)
diff --git a/drivers
the
number of pending requests when read.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Carl Vanderlip
Reviewed-by: Pranjal Ramajor Asha Kanojiya
---
drivers/accel/qaic/qaic.h | 1 +
drivers/accel/qaic/qaic_data.c| 9 +
drivers/accel/qaic/qaic_debugfs.c | 31
the driver and SBL have not communicated.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Carl Vanderlip
Reviewed-by: Pranjal Ramajor Asha Kanojiya
---
drivers/accel/qaic/Makefile | 2 +
drivers/accel/qaic/qaic.h | 8 +
drivers/accel/qaic/qaic_debugfs.c | 271 +
that will display the size of that dbc's fifo when read.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Carl Vanderlip
Reviewed-by: Pranjal Ramajor Asha Kanojiya
---
drivers/accel/qaic/qaic_debugfs.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/accel
-dbc.
Jeffrey Hugo (3):
accel/qaic: Add bootlog debugfs
accel/qaic: Add fifo size debugfs
accel/qaic: Add fifo queued debugfs
drivers/accel/qaic/Makefile | 2 +
drivers/accel/qaic/qaic.h | 9 +
drivers/accel/qaic/qaic_data.c| 9 +
drivers/accel/qaic/qaic_debugfs.c
On 2/22/2024 6:06 PM, Jeff Johnson wrote:
MHI allows the channel configs to be const, so constify
aic100_channels to prevent runtime modification.
Signed-off-by: Jeff Johnson
Applied to drm-misc-next
-Jeff
With the x86_64_defconfig I see the following when building drm-misc-next:
CC drivers/gpu/drm/i915/display/intel_crt.o
CC drivers/gpu/drm/i915/display/intel_cx0_phy.o
CC drivers/gpu/drm/i915/display/intel_ddi.o
CC drivers/gpu/drm/i915/display/intel_ddi_buf_trans.o
On 2/22/2024 6:06 PM, Jeff Johnson wrote:
MHI allows the channel configs to be const, so constify
aic100_channels to prevent runtime modification.
Signed-off-by: Jeff Johnson
Reviewed-by: Jeffrey Hugo
I plan to apply to drm-misc-next before the rc6 freeze.
Reviewed-by: Jeffrey Hugo
On 2/14/2024 1:13 AM, Jacek Lawrynowicz wrote:
VPU was renamed to NPU but due to large overhead of renaming
all the sources only user visible messages are being updated.
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 2/14/2024 1:13 AM, Jacek Lawrynowicz wrote:
From: "Wachowski, Karol"
Rename BO allocate/create functions, so the code is more consistent.
There are now two matching buffer creation functions:
- ivpu_bo_create_ioctl() - create a BO from user space
- ivpu_bo_create() - create a BO from
On 2/14/2024 1:13 AM, Jacek Lawrynowicz wrote:
ivpu_reset_engine_fn and ivpu_reset_engine_fops were separated during
merge so move them back together to keep the file consistent.
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 2/14/2024 1:13 AM, Jacek Lawrynowicz wrote:
From: "Wachowski, Karol"
Reserve/allocate and free doorbells for command queues when needed
using xarray. This allows to avoid reserving a doorbell for
a contexts that never issues a job.
Signed-off-by: Wachowski, Karol
Missing your SOB.
On 2/14/2024 1:13 AM, Jacek Lawrynowicz wrote:
From: Krystian Pradzynski
Add support for FW boot API param system_time_us.
According to the API description this field should
be set to system time in microseconds starting from 1970.
Signed-off-by: Krystian Pradzynski
Missing your SOB.
On 2/14/2024 1:13 AM, Jacek Lawrynowicz wrote:
Update Boot API to 3.22.0 and JSM API to 3.15.6
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 2/14/2024 1:12 AM, Jacek Lawrynowicz wrote:
We are now using NPU IP generation based FW names instead of platform
code names, so mtl_vpu.bin can be removed.
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 2/14/2024 1:12 AM, Jacek Lawrynowicz wrote:
Remove legacy postfix from TILE_SKU_BOTH macro.
This was missed when renaming MTL to VPU37XX.
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
cycle for recovery as it can recover
from failed IP reset and FLR cannot.
Fixes: 3f7c0634926d ("accel/ivpu/37xx: Fix hangs related to MMIO reset")
Signed-off-by: Jacek Lawrynowicz
---
Reviewed-by: Jeffrey Hugo
Nit below
drivers/accel/ivpu/ivpu_hw_37xx.c | 44 ++---
is listed as the reviewer for this file in MAINTAINERS and has
volunteered to be listed within the file as the binding maintainer.
Therefore replace Sandeep with Doug to make the documentation current.
Signed-off-by: Jeffrey Hugo
---
.../devicetree/bindings/display/bridge/ti,sn65dsi86.yaml| 2
On 2/2/2024 12:03 PM, Doug Anderson wrote:
Hi,
On Fri, Feb 2, 2024 at 10:29 AM Jeffrey Hugo wrote:
Hi Doug,
The DT binding for the TI SN65DSI86 [1] lists Sandeep Panda
as the maintainer within the file. This is no
longer valid because the @codeaurora domain bounces, and Sandeep appears
Hi Doug,
The DT binding for the TI SN65DSI86 [1] lists Sandeep Panda
as the maintainer within the file. This is no
longer valid because the @codeaurora domain bounces, and Sandeep appears
to have left the company. As such the binding appears to be orphaned,
although the file itself is
this binding
and is not using .mailmap to pre-process their message.
Signed-off-by: Jeffrey Hugo
---
.../devicetree/bindings/leds/backlight/qcom-wled.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml
.
Signed-off-by: Grzegorz Trzebiatowski
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 1/26/2024 5:28 AM, Jacek Lawrynowicz wrote:
From: Krystian Pradzynski
This parameter was never used by the 40xx FW.
Signed-off-by: Krystian Pradzynski
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 1/26/2024 5:28 AM, Jacek Lawrynowicz wrote:
From: Krystian Pradzynski
All recent 40xx firmware already supports D0i3 entry message and this
WA is no longer needed.
Can I assume that the workaround only applies to pre-production firmware?
On 1/26/2024 5:28 AM, Jacek Lawrynowicz wrote:
From: "Wachowski, Karol"
Replace forceful disable of power domains with requests to disable
TOP NOC CPU_CTRL and HOSTIF_L2CACHE through QREQN.
In case of failure retry multiple times following HAS sequence of
checking both QACCEPN and QDENYN
On 1/26/2024 5:28 AM, Jacek Lawrynowicz wrote:
NPU does not require this delay regardless of the generation.
All generations are integrated into the SOC.
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
s possible to lose events in case when event
queue was full.
Signed-off-by: Wachowski, Karol
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
write-back which break cache coherency. Force write
transactions to be snooped solving the problem.
Signed-off-by: Wachowski, Karol
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 1/22/2024 5:09 AM, Jacek Lawrynowicz wrote:
- Synchronize job submission with reset/recovery using reset_lock
- Always print recovery reason and call diagnose_failure()
- Don't allow for autosupend during recovery
- Prevent immediate autosuspend after reset/recovery
- Prevent
job->job_id, job->file_priv->ctx.id, job->engine_idx,
job_status);
+ ivpu_job_destroy(job);
ivpu_stop_job_timeout_detection(vdev);
- job_put(job);
+ ivpu_rpm_put(vdev);
Since this put() corresponds to a get() that is not in this function, I
suggest adding a comment that points to where the corresponding get() is.
Reviewed-by: Jeffrey Hugo
On 1/22/2024 5:09 AM, Jacek Lawrynowicz wrote:
- Add context_list_lock to synchronize user context addition/removal
- Use drm_dev_enter() to prevent unbinding the device during ivpu_open()
and vpu address allocation
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
Lawrynowicz
Reviewed-by: Jeffrey Hugo
as in panfrost or etnaviv
drivers and it will be implemented in future if required.
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 1/16/2024 9:58 AM, Baruch Siach wrote:
Hi qaic driver maintainers,
Sorry I was holiday last week and I am just now catching up on email and
seeing this.
I am testing an A100 device on arm64 platform. Kernel version is current
Linus master as of commit 052d534373b7. The driver is unable
On 1/10/2024 7:33 AM, Jacek Lawrynowicz wrote:
On 05.01.2024 18:29, Jeffrey Hugo wrote:
On 1/5/2024 4:22 AM, Jacek Lawrynowicz wrote:
From: "Wachowski, Karol"
DRM_IVPU_PARAM_CONTEXT_PRIORITY has been deprecated because it
has been replaced with DRM_IVPU_JOB_PRIORITY levels set w
On 1/5/2024 4:22 AM, Jacek Lawrynowicz wrote:
From: "Wachowski, Karol"
DRM_IVPU_PARAM_CONTEXT_PRIORITY has been deprecated because it
has been replaced with DRM_IVPU_JOB_PRIORITY levels set with
submit IOCTL and was unused anyway.
Signed-off-by: Wachowski, Karol
Signed-off-by: Jacek
On 1/5/2024 4:22 AM, Jacek Lawrynowicz wrote:
Make debug logs more readable and consistent:
- don't print handle as it is not always available for all buffers
- use hashed ivpu_bo ptr as main buffer identifier
- remove unused fields from ivpu_bo_print_info()
Signed-off-by: Jacek
On 1/5/2024 4:22 AM, Jacek Lawrynowicz wrote:
This was not supported properly. A buffer was imported to another VPU
context as a separate buffer object with duplicated sgt.
Both exported and imported buffers could be DMA mapped causing a double
mapping on the same device.
Imported buffer from
On 1/5/2024 4:22 AM, Jacek Lawrynowicz wrote:
Call dma_unmap() on all buffers before to VPU is unbinded to avoid
to -> the ?
"device driver has pending DMA allocations while released from device"
warning when DMA-API debug is enabled.
Signed-off-by: Jacek Lawrynowicz
Reviewe
On 1/5/2024 4:22 AM, Jacek Lawrynowicz wrote:
Limit number of iterations in ivpu_mmu_irq_evtq_handler() and
ivpu_ipc_irq_handler().
"potential infinite loops" sounds like something that has not been
observed. Has a problem actually occurred?
Are you concerned that the FW is broken and
On 1/5/2024 4:22 AM, Jacek Lawrynowicz wrote:
drm_gem_shmem_vmap/vunmap requires dma resv lock to be held.
This was missed during conversion to shmem helper.
> Signed-off-by: Jacek Lawrynowicz
Fixes tag?
Reviewed-by: Jeffrey Hugo
On 1/5/2024 4:22 AM, Jacek Lawrynowicz wrote:
From: "Wachowski, Karol"
Make boot/suspend failure debugging easier by dumping FW logs and error
registers.
Signed-off-by: Wachowski, Karol
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 1/5/2024 4:22 AM, Jacek Lawrynowicz wrote:
From: "Wachowski, Karol"
It is common need to be able to see IOVA/physical to VPU addresses
Errant double space between "to" and "see"
mappings. Especially when debugging different kind of memory related
issues. Lack of such logs forces user
ol
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
o boot due to MMU faults, those faults were missed because of
interrupts not yet being enabled. This will allow checking potential
fault reason of VPU not booting.
Signed-off-by: Wachowski, Karol
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
o boot due to MMU faults, those faults were missed because of
interrupts not yet being enabled. This will allow checking potential
fault reason of VPU not booting.
Signed-off-by: Wachowski, Karol
Signed-off-by: Jacek Lawrynowicz
Reviewed-by: Jeffrey Hugo
On 1/1/2024 4:52 PM, Stephen Rothwell wrote:
Hi all,
Today's linux-next merge of the drm tree got a conflict in:
drivers/accel/qaic/qaic_data.c
between commit:
78f5d33f3dd4 ("mm, treewide: rename MAX_ORDER to MAX_PAGE_ORDER")
from the mm tree and commit:
47fbee5f27ed ("accel/qaic:
On 12/15/2023 11:05 AM, Jeffrey Hugo wrote:
On 12/8/2023 9:34 AM, Jeffrey Hugo wrote:
A set of cleanups to the driver to improve error cases and reduce some
code duplication.
Jeffrey Hugo (2):
accel/qaic: Fix MHI channel struct field order
accel/qaic: Order pci_remove() operations
On 12/20/2023 12:02 AM, Jacek Lawrynowicz wrote:
On 15.12.2023 19:06, Jeffrey Hugo wrote:
On 12/8/2023 9:34 AM, Jeffrey Hugo wrote:
From: Pranjal Ramajor Asha Kanojiya
Offload the balancing of init and destroy calls to DRM managed APIs.
mutex destroy for ->cntl_mutex is not called dur
On 12/8/2023 9:34 AM, Jeffrey Hugo wrote:
From: Pranjal Ramajor Asha Kanojiya
Offload the balancing of init and destroy calls to DRM managed APIs.
mutex destroy for ->cntl_mutex is not called during device release and
destroy workqueue is not called in error path of create_qdev(). So, use
On 12/8/2023 9:34 AM, Jeffrey Hugo wrote:
A set of cleanups to the driver to improve error cases and reduce some
code duplication.
Jeffrey Hugo (2):
accel/qaic: Fix MHI channel struct field order
accel/qaic: Order pci_remove() operations in reverse of probe()
Pranjal Ramajor Asha
On 12/8/2023 9:30 AM, Jeffrey Hugo wrote:
A pair of fixes to the driver. First one is an improvement to dma_buf
handling based on a greater understanding of that framework. The second
is a reliability fix that allows some cards to boot.
Jeffrey Hugo (1):
accel/qaic: Implement quirk
A set of cleanups to the driver to improve error cases and reduce some
code duplication.
Jeffrey Hugo (2):
accel/qaic: Fix MHI channel struct field order
accel/qaic: Order pci_remove() operations in reverse of probe()
Pranjal Ramajor Asha Kanojiya (5):
accel/qaic: Deprecate ->size fi
sha Kanojiya
Reviewed-by: Carl Vanderlip
Reviewed-by: Jeffrey Hugo
Signed-off-by: Jeffrey Hugo
---
drivers/accel/qaic/qaic_data.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/accel/qaic/qaic_data.c b/drivers/accel/qaic/qaic_data.c
index 89ab8fa19
In probe() we create the drm_device, and then register the MHI controller.
In remove(), we should unregister the controller first, then remove the
drm_device. Update the remove() operations to match.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Pranjal Ramajor Asha Kanojiya
Reviewed-by: Carl
From: Pranjal Ramajor Asha Kanojiya
->size in struct qaic_attach_slice_hdr is redundant since we have BO handle
and its size can be retrieved from base BO structure.
Signed-off-by: Pranjal Ramajor Asha Kanojiya
Reviewed-by: Jeffrey Hugo
Signed-off-by: Jeffrey Hugo
---
drivers/accel/q
ase of resources and avoid such
problems.
Signed-off-by: Pranjal Ramajor Asha Kanojiya
Reviewed-by: Jeffrey Hugo
Signed-off-by: Jeffrey Hugo
---
drivers/accel/qaic/qaic.h | 1 +
drivers/accel/qaic/qaic_drv.c | 138 ++
2 files changed, 89 insertions(+), 50 deleti
From: Pranjal Ramajor Asha Kanojiya
Every time QAIC_MMAP_BO ioctl is called for a BO,
drm_gem_create_mmap_offset() is called. Calling
drm_gem_create_mmap_offset() more then once for a BO seems redundant.
Signed-off-by: Pranjal Ramajor Asha Kanojiya
Reviewed-by: Jeffrey Hugo
Signed-off
The timesync channels have their struct fields out of order with the rest
of the channels. Fix them so there is a consistent style in the file.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Carl Vanderlip
---
drivers/accel/qaic/mhi_controller.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
Kanojiya
Reviewed-by: Jeffrey Hugo
Signed-off-by: Jeffrey Hugo
---
drivers/accel/qaic/qaic.h | 2 --
drivers/accel/qaic/qaic_data.c | 23 +++
2 files changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/accel/qaic/qaic.h b/drivers/accel/qaic/qaic.h
index 582
From: Pranjal Ramajor Asha Kanojiya
Do not modify the size of dmabuf as it is immutable.
Fixes: ff13be830333 ("accel/qaic: Add datapath")
Signed-off-by: Pranjal Ramajor Asha Kanojiya
Reviewed-by: Jeffrey Hugo
Signed-off-by: Jeffrey Hugo
---
drivers/accel/qaic/qaic_data.c | 6 ++--
is down.
Intercept reads for this register, and provide the correct value - every
production instance would read 0x60110200 if the device was operating as
intended.
Fixes: a36bf7af868b ("accel/qaic: Add MHI controller")
Signed-off-by: Jeffrey Hugo
Reviewed-by: Pranjal Ramajor Ash
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