Hi Laurent,
On Tue, 2020-12-22 at 09:36 +0200, Laurent Pinchart wrote:
> Hi Liu,
>
> Thank you for the patch.
>
> On Thu, Dec 17, 2020 at 05:59:30PM +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp LVDS display bridge(LDB).
> >
On Mon, 2020-12-21 at 15:07 -0700, Rob Herring wrote:
> On Thu, Dec 17, 2020 at 05:59:23PM +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp pixel combiner.
> >
> > Signed-off-by: Liu Ying
> > ---
> > .../display/bridge/fsl,
On Mon, 2020-12-21 at 15:31 -0700, Rob Herring wrote:
> On Thu, Dec 17, 2020 at 05:59:25PM +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp display pixel link.
> >
> > Signed-off-by: Liu Ying
> > ---
> > .../display/bridge/fsl,
Hi Laurent,
On Tue, 2020-12-22 at 09:49 +0200, Laurent Pinchart wrote:
> Hi Liu,
>
> On Tue, Dec 22, 2020 at 09:36:37AM +0200, Laurent Pinchart wrote:
> > On Thu, Dec 17, 2020 at 05:59:30PM +0800, Liu Ying wrote:
> > > This patch adds bindings for i.MX8qm/qxp
On Mon, 2020-12-21 at 15:33 -0700, Rob Herring wrote:
> On Thu, Dec 17, 2020 at 05:59:30PM +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp LVDS display bridge(LDB).
> >
> > Signed-off-by: Liu Ying
> > ---
> > .../bindings/display/br
Hi,
On Fri, 2020-12-18 at 16:42 -0600, Rob Herring wrote:
> On Thu, Dec 17, 2020 at 7:48 PM Liu Ying wrote:
> >
> > Hi,
> >
> > On Thu, 2020-12-17 at 12:50 -0600, Rob Herring wrote:
> > > On Thu, 17 Dec 2020 17:59:23 +0800, Liu Ying wrote:
> > > >
Add myself as the maintainer of the i.MX8qxp DPU DRM driver.
Signed-off-by: Liu Ying
---
v4->v5:
* No change.
v3->v4:
* No change.
v2->v3:
* No change.
v1->v2:
* No change.
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
i
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Channel.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won't be found
and a control interface.
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/imx/Kconfig | 8 +
drivers/gpu/drm/bridge/imx/Makefile | 1 +
drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c | 411
3 files changed, 420 insertions(+)
create mode 100644
. In dual mode, the two channels output identical data.
In split mode, channel0 outputs odd pixels and channel1 outputs even
pixels. This patch supports the LDB single mode and split mode.
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/imx/Kconfig | 10 +
drivers/gpu/drm/bridge/imx/Makefile
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Gasket.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won't be found
and i.MX8qm in DPU's
dt binding documentation.
* Use new dt binding way to add clocks in the dt binding examples.
* Address several comments from Laurentiu on the DPU DRM patch.
Liu Ying (6):
dt-bindings: display: imx: Add i.MX8qxp/qm DPU binding
dt-bindings: display: imx: Add i.MX8qxp/qm PRG
Add myself as the maintainer of DRM bridge drivers for i.MX SoCs.
Signed-off-by: Liu Ying
---
MAINTAINERS | 10 ++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7b073c4..4b4e40e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5846,6 +5846,16 @@ F
Artifically use 'plane' and 'old_plane_state' to avoid 'not used' warning.
The precedent has already been set by other macros in the same file.
Acked-by: Daniel Vetter
Signed-off-by: Liu Ying
---
v4->v5:
* No change.
v3->v4:
* Add Daniel's A-b tag.
v2->v3:
* Add a missing blank line
codings between those modules. The PXL2DPI is purely
combinatorial.
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/imx/Kconfig | 8 +
drivers/gpu/drm/bridge/imx/Makefile | 1 +
drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c | 494 +++
3 files
This patch adds bindings for i.MX8qm/qxp pixel combiner.
Signed-off-by: Liu Ying
---
.../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 160 +
1 file changed, 160 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel
screens, or virtual screens. The pixel
combiner is also responsible for generating some of the control signals
for the pixel link output channel. For now, the driver only supports
the bypass mode.
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/Kconfig | 2 +
drivers/gpu
This patch adds bindings for i.MX8qxp pixel link to DPI(PXL2DPI).
Signed-off-by: Liu Ying
---
.../display/bridge/fsl,imx8qxp-pxl2dpi.yaml| 134 +
1 file changed, 134 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp
or a 36-bit output bus(12-bit per component) to a pixel link.
Signed-off-by: Liu Ying
---
.../userspace-api/media/v4l/subdev-formats.rst | 156 +
1 file changed, 156 insertions(+)
diff --git a/Documentation/userspace-api/media/v4l/subdev-formats.rst
b/Documentation
This patch adds bindings for i.MX8qm/qxp display pixel link.
Signed-off-by: Liu Ying
---
.../display/bridge/fsl,imx8qxp-pixel-link.yaml | 128 +
1 file changed, 128 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel
I
Cc: Vinod Koul
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
include/linux/phy/phy-lvds.h | 48
include/linux/phy/phy.h | 4
2 files changed, 52 insertions(+)
create mode 100644 include/linux/phy/phy-lvds.h
diff --git a/include/linux
This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won't be found.
v4->
This patch adds bindings for i.MX8qm/qxp LVDS display bridge(LDB).
Signed-off-by: Liu Ying
---
.../bindings/display/bridge/fsl,imx8qxp-ldb.yaml | 185 +
1 file changed, 185 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp
This patch adds a helper to support LDB drm bridge drivers for
i.MX SoCs. Helper functions exported from this driver should
implement common logics for all LDB modules embedded in i.MX SoCs.
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/imx/Kconfig | 8 +
drivers/gpu/drm/bridge
.
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/imx/Kconfig | 10 +
drivers/gpu/drm/bridge/imx/Makefile | 1 +
drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c | 762 +++
3 files changed, 773 insertions(+)
create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp
bus(12-bit per component) to a pixel link.
Signed-off-by: Liu Ying
---
include/uapi/linux/media-bus-format.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/media-bus-format.h
b/include/uapi/linux/media-bus-format.h
index 5d905ad..b218282 100644
d drm bridge drivers and dt-bindings support for the
bridges.
Patch 14/14 updates MAINTAINERS.
I've tested this series with a koe,tx26d202vm0bwa dual link LVDS panel and
a LVDS to HDMI bridge(with a downstream drm bridge driver).
Welcome comments, thanks.
Liu Ying (14):
phy: Add LVDS configur
Hi,
On Thu, 2020-12-17 at 12:50 -0600, Rob Herring wrote:
> On Thu, 17 Dec 2020 17:59:23 +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp pixel combiner.
> >
> > Signed-off-by: Liu Ying
> > ---
> > .../display/bridge/fsl,
Add support for Mixel MIPI DPHY + LVDS PHY combo IP
as found on Freescale i.MX8qxp SoC.
Cc: Guido Günther
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Rob Herring
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v2->v3:
* No change.
v1->v2:
* Add the binding for i.MX8qxp Mixel com
Koul
Cc: Rob Herring
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v2->v3:
* Improve the 'clock-names' property by dropping 'items:'.
v1->v2:
* Newly introduced in v2. (Guido)
.../devicetree/bindings/phy/mixel,mipi-dsi-phy.txt | 29 -
.../bindings/phy/mixel,mipi-dsi-ph
I
Cc: Vinod Koul
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v2->v3:
* No change.
v1->v2:
* No change.
include/linux/phy/phy-lvds.h | 48
include/linux/phy/phy.h | 4
2 files changed, 52 insertions(+)
create mode 100644 i
off-by: Liu Ying
---
Guido, I also print invalid PHY mode from mixel_dphy_configure().
v2->v3:
* Improve readability of mixel_dphy_set_mode(). (Guido)
v1->v2:
* Print invalid PHY mode in dmesg. (Guido)
drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c | 269 -
1 fil
ing.
v1->v2:
* Convert mixel,mipi-dsi-phy plain text dt binding to json-schema. (Guido)
* Print invalid PHY mode in dmesg from the Mixel PHY driver. (Guido)
* Add Guido's R-b tag on the patch for the nwl-dsi drm bridge driver.
Liu Ying (5):
drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_enable()
Chiras
Cc: Martin Kepplinger
Cc: Andrzej Hajda
Cc: Neil Armstrong
Cc: Laurent Pinchart
Cc: Jonas Karlman
Cc: Jernej Skrabec
Cc: David Airlie
Cc: Daniel Vetter
Cc: NXP Linux Team
Reviewed-by: Guido Günther
Signed-off-by: Liu Ying
---
v2->v3:
* No change.
v1->v2:
* Add Guido's R
Hi Guido,
On Thu, 2020-12-10 at 08:14 +0100, Guido Günther wrote:
> Hi,
> On Tue, Dec 08, 2020 at 06:03:05PM +0800, Liu Ying wrote:
> > On Tue, 2020-12-08 at 10:24 +0100, Guido Günther wrote:
> > > Hi Liu,
> > > some minor comments inline:
> > >
> &g
This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won't be found.
v3->
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Gasket.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won't be found
inding yamllint warnings.
* Require bypass0 and bypass1 clocks for both i.MX8qxp and i.MX8qm in DPU's
dt binding documentation.
* Use new dt binding way to add clocks in the dt binding examples.
* Address several comments from Laurentiu on the DPU DRM patch.
Liu Ying (6):
dt-bindings: display:
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Channel.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won't be found
Add myself as the maintainer of the i.MX8qxp DPU DRM driver.
Signed-off-by: Liu Ying
---
v3->v4:
* No change.
v2->v3:
* No change.
v1->v2:
* No change.
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 970d9ce..dee45
Artifically use 'plane' and 'old_plane_state' to avoid 'not used' warning.
The precedent has already been set by other macros in the same file.
Acked-by: Daniel Vetter
Signed-off-by: Liu Ying
---
v3->v4:
* Add Daniel's A-b tag.
v2->v3:
* Add a missing blank line.
v1->v2:
*
Hi Laurent,
On Tue, 2020-12-08 at 14:38 +0200, Laurent Pinchart wrote:
> Hi Liu,
>
> Thank you for the patch.
>
> On Fri, Dec 04, 2020 at 03:33:42PM +0800, Liu Ying wrote:
> > This patch allows LVDS PHYs to be configured through
> > the generic functions and through a
ver. (Guido)
* Add Guido's R-b tag on the patch for the nwl-dsi drm bridge driver.
Liu Ying (5):
drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_enable()
phy: Add LVDS configuration options
dt-bindings: phy: Convert mixel,mipi-dsi-phy to json-schema
dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel co
On Tue, 2020-12-08 at 10:24 +0100, Guido Günther wrote:
> Hi Liu,
> some minor comments inline:
>
> On Fri, Dec 04, 2020 at 03:33:44PM +0800, Liu Ying wrote:
> > i.MX8qxp SoC embeds a Mixel MIPI DPHY + LVDS PHY combo which supports
> > either a MIPI DSI display or a LVD
and then add the binding support for the
i.MX8qxp Mixel combo PHY in it.
Liu Ying
> Cheers,
> -- Guido
>
> On Fri, Dec 04, 2020 at 03:33:43PM +0800, Liu Ying wrote:
> > Add support for Mixel MIPI DPHY + LVDS PHY combo IP
> > as found on Freescale i.MX8qxp SoC.
> >
&
Hi Guido,
On Tue, 2020-12-08 at 10:02 +0100, Guido Günther wrote:
> Hi Liu,
> On Fri, Dec 04, 2020 at 03:33:40PM +0800, Liu Ying wrote:
> > Hi,
> >
> > This series adds i.MX8qxp LVDS PHY mode support for the Mixel PHY in the
> > Freescale i.MX8qxp SoC.
>
>
Add support for Mixel MIPI DPHY + LVDS PHY combo IP
as found on Freescale i.MX8qxp SoC.
Cc: Guido Günther
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Rob Herring
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v1->v2:
* Add the binding for i.MX8qxp Mixel combo PHY based on the conver
off-by: Liu Ying
---
Guido, I also print invalid PHY mode from mixel_dphy_configure().
v1->v2:
* Print invalid PHY mode in dmesg. (Guido)
drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c | 270 -
1 file changed, 259 insertions(+), 11 deletions(-)
diff --git a/drive
Chiras
Cc: Martin Kepplinger
Cc: Andrzej Hajda
Cc: Neil Armstrong
Cc: Laurent Pinchart
Cc: Jonas Karlman
Cc: Jernej Skrabec
Cc: David Airlie
Cc: Daniel Vetter
Cc: NXP Linux Team
Reviewed-by: Guido Günther
Signed-off-by: Liu Ying
---
v1->v2:
* Add Guido's R-b tag.
drivers/gpu/
Koul
Cc: Rob Herring
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v1->v2:
* Newly introduced in v2. (Guido)
.../devicetree/bindings/phy/mixel,mipi-dsi-phy.txt | 29 -
.../bindings/phy/mixel,mipi-dsi-phy.yaml | 73 ++
2 files changed, 73 insertions(+),
I
Cc: Vinod Koul
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v1->v2:
* No change.
include/linux/phy/phy-lvds.h | 48
include/linux/phy/phy.h | 4
2 files changed, 52 insertions(+)
create mode 100644 include/linux/phy/phy-lvds.h
d
On Mon, 2020-12-07 at 10:56 -0600, Rob Herring wrote:
> On Mon, 07 Dec 2020 11:20:55 +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
> >
> > Signed-off-by: Liu Ying
> > ---
> > Note that this depends on the 'two cell b
se new dt binding way to add clocks in the dt binding examples.
* Address several comments from Laurentiu on the DPU DRM patch.
Liu Ying (6):
dt-bindings: display: imx: Add i.MX8qxp/qm DPU binding
dt-bindings: display: imx: Add i.MX8qxp/qm PRG binding
dt-bindings: display: imx: Add i.MX8qxp/q
This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won't be found.
v2->v3:
* No change.
v1->v2:
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Channel.
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won't be found.
v2->v3:
* No change.
Add myself as the maintainer of the i.MX8qxp DPU DRM driver.
Signed-off-by: Liu Ying
---
v2->v3:
* No change.
v1->v2:
* No change.
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 970d9ce..dee4586 100644
--- a/MAINTAINERS
Artifically use 'plane' and 'old_plane_state' to avoid 'not used' warning.
The precedent has already been set by other macros in the same file.
Signed-off-by: Liu Ying
---
v2->v3:
* Add a missing blank line.
v1->v2:
* No change.
include/drm/drm_atomic.h | 5 -
1 file changed, 4 inse
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Gasket.
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won't be found.
v2->v3:
* No change.
LVDS PHY mode support in the Mixel PHY driver.
Welcome comments, thanks.
Liu Ying (4):
drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_enable()
phy: Add LVDS configuration options
dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for
i.MX8qxp
phy: freescale: phy-fsl-imx8
I
Cc: Vinod Koul
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
include/linux/phy/phy-lvds.h | 48
include/linux/phy/phy.h | 4
2 files changed, 52 insertions(+)
create mode 100644 include/linux/phy/phy-lvds.h
diff --git a/include/linux
off-by: Liu Ying
---
drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c | 266 -
1 file changed, 255 insertions(+), 11 deletions(-)
diff --git a/drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c
b/drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c
index a95572b..37084a9 100
Add support for Mixel MIPI DPHY + LVDS PHY combo IP
as found on Freescale i.MX8qxp SoC.
Cc: Guido Günther
Cc: Kishon Vijay Abraham I
Cc: Vinod Koul
Cc: Rob Herring
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt | 8 +++-
1
Chiras
Cc: Martin Kepplinger
Cc: Andrzej Hajda
Cc: Neil Armstrong
Cc: Laurent Pinchart
Cc: Jonas Karlman
Cc: Jernej Skrabec
Cc: David Airlie
Cc: Daniel Vetter
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/nwl-dsi.c | 6 ++
1 file changed, 6 insertions
Artifically use 'plane' and 'old_plane_state' to avoid 'not used' warning.
The precedent has already been set by other macros in the same file.
Signed-off-by: Liu Ying
---
v1->v2:
* No change.
include/drm/drm_atomic.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --
This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won't be found.
v1->v2:
* Fix yamllint warni
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Channel.
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won't be found.
v1->v2:
* Use new
Add myself as the maintainer of the i.MX8qxp DPU DRM driver.
Signed-off-by: Liu Ying
---
v1->v2:
* No change.
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 970d9ce..dee4586 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5834,6 +5834
latforms.
* Fix dt binding yamllint warnings.
* Require bypass0 and bypass1 clocks for both i.MX8qxp and i.MX8qm in DPU's
dt binding documentation.
* Use new dt binding way to add clocks in the dt binding examples.
* Address several comments from Laurentiu on the DPU DRM patch.
Liu Ying (6):
dt-bind
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Gasket.
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won't be found.
v1->v2:
* Use new
drm_of_lvds_get_dual_link_pixel_order(), as the 'ports' property is required
Suggested-by: Sam Ravnborg
Cc: Thierry Reding
Cc: Sam Ravnborg
Cc: David Airlie
Cc: Daniel Vetter
Cc: Rob Herring
Cc: Lucas Stach
Cc: Sebastian Reichel
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v4->v5:
* Require the 'po
Hi Laurentiu,
On Fri, 2020-11-20 at 16:38 +0200, Laurentiu Palcu wrote:
> Hi Liu Ying,
>
> I gave this a first look but, since this is a huge piece of code and I'm not
> very familiar with DPU, I'll probably give it another pass next week.
>
> Anyway, some comments/questions i
On Thu, 2020-11-19 at 09:46 -0600, Rob Herring wrote:
> On Thu, 19 Nov 2020 17:22:18 +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
> >
> > Signed-off-by: Liu Ying
> > ---
> > .../bindings/display/im
Hi Laurentiu,
On Thu, 2020-11-19 at 19:30 +0200, Laurentiu Palcu wrote:
> Hi Liu Ying,
>
> On Thu, Nov 19, 2020 at 05:22:17PM +0800, Liu Ying wrote:
> > Hi,
> >
> >
> > This patch set introduces i.MX8qxp Display Processing Unit(DPU) DRM support.
>
&g
Hi Sebastian,
On Fri, 2020-11-20 at 00:20 +0100, Sebastian Reichel wrote:
> Hi,
>
> On Tue, Nov 17, 2020 at 09:47:25AM +0800, Liu Ying wrote:
> > To complement panel-simple.yaml, create panel-simple-lvds-dual-ports.yaml.
> > panel-simple-lvds-dual-ports.yaml is for a
This patch enables DPU and it's prefetch engines for
the i.MX8qxp MEK platform.
Signed-off-by: Liu Ying
---
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 64 +++
1 file changed, 64 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
b/arch/arm64
instead of
the new "two cells" binding way. So, prone to update as soon as the SoC
device tree is converted to follow the new way.
Signed-off-by: Liu Ying
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 313 +
1 file changed, 313 insertions(+)
diff --
Add myself as the maintainer of the i.MX8qxp DPU DRM driver.
Signed-off-by: Liu Ying
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 970d9ce..dee4586 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5834,6 +5834,15 @@ F
Artifically use 'plane' and 'old_plane_state' to avoid 'not used' warning.
The precedent has already been set by other macros in the same file.
Signed-off-by: Liu Ying
---
include/drm/drm_atomic.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/drm/drm_atomic.h b
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Channel.
Signed-off-by: Liu Ying
---
.../bindings/display/imx/fsl,imx8qxp-dprc.yaml | 87 ++
1 file changed, 87 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Gasket.
Signed-off-by: Liu Ying
---
.../bindings/display/imx/fsl,imx8qxp-prg.yaml | 60 ++
1 file changed, 60 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp
This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
Signed-off-by: Liu Ying
---
.../bindings/display/imx/fsl,imx8qxp-dpu.yaml | 358 +
1 file changed, 358 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dpu.yaml
DPU DRM support.
Patch 6 updates MAINTAINERS.
Patch 7 & 8 add DPU and prefetch engines support in the device tree of
i.MX8qxp MEK platform.
Welcome comments, thanks.
Liu Ying (8):
dt-bindings: display: imx: Add i.MX8qxp/qm DPU binding
dt-bindings: display: imx: Add i.MX8qxp/qm PRG binding
d
On Mon, 2020-11-16 at 13:23 -0600, Rob Herring wrote:
> On Thu, Nov 12, 2020 at 02:17:11PM +0800, Liu Ying wrote:
> > To complement panel-simple.yaml, create panel-simple-lvds-dual-
> > ports.yaml.
> > panel-simple-lvds-dual-ports.yaml is for all simple LVDS panels
> &
drm_of_lvds_get_dual_link_pixel_order(), as the optional 'ports' property is
allowed
Suggested-by: Sam Ravnborg
Cc: Thierry Reding
Cc: Sam Ravnborg
Cc: David Airlie
Cc: Daniel Vetter
Cc: Rob Herring
Cc: Lucas Stach
Cc: Sebastian Reichel
Signed-off-by: Liu Ying
---
v3->v4:
* Add type and descriptions for d
drm_of_lvds_get_dual_link_pixel_order(), as the optional 'ports' property is
allowed
Suggested-by: Sam Ravnborg
Cc: Thierry Reding
Cc: Sam Ravnborg
Cc: David Airlie
Cc: Daniel Vetter
Cc: Rob Herring
Cc: Lucas Stach
Cc: Sebastian Reichel
Signed-off-by: Liu Ying
---
v2->v3:
* Do not allow 'port' property. (
On Wed, 2020-11-11 at 16:55 -0600, Rob Herring wrote:
> On Tue, Nov 10, 2020 at 03:36:37PM +0800, Liu Ying wrote:
> > To complement panel-simple.yaml, create panel-simple-lvds-dual-
> > ports.yaml.
> > panel-simple-lvds-dual-ports.yaml is for all simple LVDS panels
> > t
On Wed, 2020-11-11 at 16:57 -0600, Rob Herring wrote:
> On Tue, Nov 10, 2020 at 03:36:37PM +0800, Liu Ying wrote:
> > To complement panel-simple.yaml, create panel-simple-lvds-dual-
> > ports.yaml.
> > panel-simple-lvds-dual-ports.yaml is for all simple LVDS panels
> > t
On Tue, 2020-11-10 at 06:53 +0100, Sam Ravnborg wrote:
> Hi Liu Ying,
> On Tue, Nov 10, 2020 at 10:37:27AM +0800, Liu Ying wrote:
> > Hi Sam,
> >
> > On Wed, 2020-11-04 at 11:47 +0100, Sam Ravnborg wrote:
> > > Hi Liu Ying
> > >
> > > On We
Hi Sam,
On Wed, 2020-11-04 at 11:47 +0100, Sam Ravnborg wrote:
> Hi Liu Ying
>
> On Wed, Nov 04, 2020 at 04:03:37PM +0800, Liu Ying wrote:
> > Some simple panels have dual LVDS interfaces which receive even and
> > odd
> > pixels respectively, like 'nlt,nl1
-by: Sam Ravnborg
Cc: Thierry Reding
Cc: Sam Ravnborg
Cc: David Airlie
Cc: Daniel Vetter
Cc: Rob Herring
Cc: Lucas Stach
Cc: Sebastian Reichel
Signed-off-by: Liu Ying
---
v1->v2:
* Correct pixel order in example LVDS panel node.
.../panel/panel-simple-lvds-dual-ports.yaml|
-by: Sam Ravnborg
Cc: Thierry Reding
Cc: Sam Ravnborg
Cc: David Airlie
Cc: Daniel Vetter
Cc: Rob Herring
Cc: Lucas Stach
Cc: Sebastian Reichel
Signed-off-by: Liu Ying
---
.../panel/panel-simple-lvds-dual-ports.yaml| 85 ++
.../bindings/display/panel/panel
'
and 'port@1' contain 'dual-lvds-even-pixels' and 'dual-lvds-odd-pixels'
properties respectively.
Cc: Thierry Reding
Cc: Sam Ravnborg
Cc: David Airlie
Cc: Daniel Vetter
Cc: Rob Herring
Signed-off-by: Liu Ying
---
Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 1 +
1 file
On Fri, 2020-07-10 at 19:32 +0200, Sam Ravnborg wrote:
> On Thu, Jul 09, 2020 at 10:02:36AM +0800, Liu Ying wrote:
> > It doesn't hurt to add the bridge in the global bridge list also
> > for
> > platform specific dw-hdmi drivers which are based on the component
>
ngutronix Kernel Team
Cc: NXP Linux Team
Cc:
Signed-off-by: Liu Ying
---
drivers/gpu/drm/imx/imx-ldb.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c
index 4da22a9..af4d0d8 100644
--- a/drivers/gpu/drm/imx
el Vetter
Cc: Boris Brezillon
Cc: Jerome Brunet
Cc: Cheng-Yi Chiang
Cc: Dariusz Marcinkiewicz
Cc: Archit Taneja
Cc: Jose Abreu
Cc: Sam Ravnborg
Cc: dri-devel@lists.freedesktop.org
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v1->v2:
* Put drm_bridge_add() in __dw_hdmi_probe() just b
Cc: Laurent Pinchart
Cc: Jonas Karlman
Cc: Jernej Skrabec
Cc: David Airlie
Cc: Daniel Vetter
Cc: Boris Brezillon
Cc: Jerome Brunet
Cc: Cheng-Yi Chiang
Cc: Dariusz Marcinkiewicz
Cc: Archit Taneja
Cc: Jose Abreu
Cc: dri-devel@lists.freedesktop.org
Cc: NXP Linux Team
Signed-off-by: Liu Ying
el Vetter
Cc: Boris Brezillon
Cc: Jerome Brunet
Cc: Cheng-Yi Chiang
Cc: Dariusz Marcinkiewicz
Cc: Archit Taneja
Cc: Jose Abreu
Cc: Sam Ravnborg
Cc: dri-devel@lists.freedesktop.org
Cc: NXP Linux Team
Signed-off-by: Liu Ying
---
v1->v2:
* Put drm_bridge_add() in __dw_hdmi_probe() just b
Cc: Laurent Pinchart
Cc: Jonas Karlman
Cc: Jernej Skrabec
Cc: David Airlie
Cc: Daniel Vetter
Cc: Boris Brezillon
Cc: Jerome Brunet
Cc: Cheng-Yi Chiang
Cc: Dariusz Marcinkiewicz
Cc: Archit Taneja
Cc: Jose Abreu
Cc: dri-devel@lists.freedesktop.org
Cc: NXP Linux Team
Signed-off-by: Liu Ying
Hi Laurent,
On Sun, 2020-06-28 at 11:22 +0300, Laurent Pinchart wrote:
> Hi Liu,
>
> (CC'ing Sam)
>
> Thank you for the patch.
Thanks for your review.
>
> On Tue, Jun 16, 2020 at 05:04:52PM +0800, Liu Ying wrote:
> > It doesn't hurt to add the bridge in
> and
> > LVDS outputs.
> >
> > [1]
> > https://lore.kernel.org/dri-devel/20200409004610.12346-1-laurent.pinchart+rene...@ideasonboard.com/
> > [2]
> > https://lore.kernel.org/dri-devel/20200409003636.11792-1-laurent.pinchart+rene...@ideasonboard.com/
>
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