o
> > there's no exploit and the vm isn't confused about what's going on.
> > For any legit use case there's no difference from what userspace can
> > observe and do.
> >
> > Cc: sta...@vger.kernel.org
> > Cc: John Hubbard
> >
-off-by: Lucas Stach
---
include/uapi/drm/drm_fourcc.h | 16
1 file changed, 16 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index f76de49c768f..76df2a932637 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
the command buffer
physical address, making sure that the command buffer is always mappable.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 52 +--
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv
From: Sascha Hauer
This is the 3D GPU found on the i.MX8MP SoC. The feature bits are
taken from the NXP downstream kernel driver 6.4.3.p1.305572.
Signed-off-by: Sascha Hauer
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_hwdb.c | 31 ++
1 file changed
at one might seek by using userptr. If
that's the case I might still take this patch for stable, but then we
should rather just disallow writable GPU mappings to this BO.
Regards,
Lucas
>
> Cc: sta...@vger.kernel.org
> Cc: John Hubbard
> Signed-off-by: Daniel Vet
From: Sascha Hauer
This is the 3D GPU found on the i.MX8MP SoC.
Signed-off-by: Sascha Hauer
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_hwdb.c | 31 ++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
b/drivers
Am Montag, dem 15.02.2021 um 13:04 +0100 schrieb Christian König:
> Am 15.02.21 um 12:53 schrieb Lucas Stach:
> > Am Montag, dem 15.02.2021 um 10:34 +0100 schrieb Christian König:
> > > Am 15.02.21 um 10:06 schrieb Simon Ser:
> > > > On Monday, February 15th, 20
Am Montag, dem 15.02.2021 um 10:34 +0100 schrieb Christian König:
>
> Am 15.02.21 um 10:06 schrieb Simon Ser:
> > On Monday, February 15th, 2021 at 9:58 AM, Christian König
> > wrote:
> >
> > > we are currently working an Freesync and direct scan out from system
> > > memory on AMD APUs in A+A
Am Samstag, dem 13.02.2021 um 18:40 +0100 schrieb Pavel Machek:
> Hi!
>
> > Userspace has discovered the functionality offered by SYS_kcmp and has
> > started to depend upon it. In particular, Mesa uses SYS_kcmp for
> > os_same_file_description() in order to identify when two fd (e.g. device
> > o
Drewry
> Cc: Andrew Morton
> Cc: Dave Airlie
> Cc: Daniel Vetter
> Cc: Lucas Stach
> ---
> init/Kconfig | 11 +++
> kernel/Makefile | 2 +-
> tools/testing/selftests/seccomp/seccomp_bpf.c | 2 +-
>
Am Freitag, dem 05.02.2021 um 16:59 +0100 schrieb Daniel Vetter:
> On Fri, Feb 05, 2021 at 04:58:32PM +0100, Daniel Vetter wrote:
> > On Fri, Feb 05, 2021 at 01:03:07PM +, Chris Wilson wrote:
> > > gallium (iris) depends on os_same_file_description() to disambiguate
> > > screens and so avoid i
Am Montag, dem 25.01.2021 um 11:27 +0800 schrieb Tian Tao:
> fixed the below warning:
> drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c:84:2-8: WARNING: NULL check
> before some freeing functions is not needed.
Thanks, I've added this patch to my etnaviv/next branch.
Regards,
Lucas
> Signed-off-by:
Am Mittwoch, dem 23.12.2020 um 20:51 +0100 schrieb Marc Kleine-Budde:
> This patch fixes the following sparse warnings, by adding the missing
> endianess
> conversion functions.
>
> > etnaviv/etnaviv_dump.c:78:26: warning: restricted __le32 degrades to integer
> > etnaviv/etnaviv_dump.c:88:26: wa
Am Mittwoch, dem 16.12.2020 um 12:42 +0100 schrieb Christian Gmeiner:
> Make it possible for the user space to access these ID values.
Thanks, I've added this patch to my etnaviv/next branch.
Regards,
Lucas
> Signed-off-by: Christian Gmeiner
> ---
> drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 12 +
Hi Fabio,
I've pushed this patch to the libdrm git repo.
Regards,
Lucas
Am Mittwoch, dem 30.12.2020 um 15:29 -0300 schrieb Fabio Estevam:
> Add an entry for the "mxsfb-drm" driver, so that the test utilities
> work with the mxsfb driver without passing the -M argument.
>
> Signed-off-by: Fabio
Hi Luben,
Am Freitag, dem 11.12.2020 um 15:36 -0500 schrieb Luben Tuikov:
> On 2020-12-10 4:31 a.m., Lucas Stach wrote:
> > Hi Luben,
> >
> > Am Mittwoch, den 09.12.2020, 21:14 -0500 schrieb Luben Tuikov:
> > > This patch does not change current behaviour.
> &g
Am Donnerstag, den 17.12.2020, 15:02 +0100 schrieb Christian König:
> Am 17.12.20 um 14:45 schrieb Robin Murphy:
> > On 2020-12-17 10:25, Christian König wrote:
> > > Am 17.12.20 um 02:07 schrieb Chen Li:
> > > > On Wed, 16 Dec 2020 22:19:11 +0800,
> > > > Christian König wrote:
> > > > > Am 16.12.
Hi Frieder,
Am Montag, den 14.12.2020, 13:33 +0100 schrieb Frieder Schrempf:
> Hi Lucas, hi Marek,
>
> while doing some tests on i.MX8MM with Etnaviv and mxsfb-drm (using the
> patches for DSIM, GPC, BLK-CTL, etc., see branch at [1]), I noticed that
> I don't seem to be able to run glmark2:
>
_ALIVE is returned, as
> per the default behaviour.
>
> A more involved driver's solutions can be had
> in subequent patches.
>
> v2: Use enum as the status of a driver's job
> timeout callback method.
>
> Cc: Alexander Deucher
> Cc: Andrey Grodzov
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/scheduler/sched_main.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 9a0d77a68018..f517ffd53847 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b
Am Dienstag, den 01.12.2020, 12:34 +0100 schrieb Guido Günther:
> This allows us to raise DRAM bandiwth to a high enough value for a
> stable picture on i.mx8mq. We pick a bandwidth that should be sufficient
> for 4k@60Hz.
>
> Modelled like mdp5_kms.
>
> Signed-off-by: Guido Günther
> ---
> dri
Am Dienstag, den 01.12.2020, 11:37 +0100 schrieb Martin Kepplinger:
> Add interconnect support to mxsfb so that it is able to request enough
> bandwidth to DDR for display output to work.
>
> Signed-off-by: Martin Kepplinger
> ---
> drivers/gpu/drm/mxsfb/mxsfb_drv.c | 33
Hi Dave, hi Daniel,
please pull the following etnaviv updates for 5.11.
Again, nothing big this time. Mostly a new performance counter from
Christian, some more lockdep annotations from Guido and removal of
functionality that duplicates driver core from Robin.
Regards,
Lucas
The following cha
On Do, 2020-11-05 at 16:50 +0200, Laurentiu Palcu wrote:
> This patch adds support for using NN interpolation scaling by setting the
> SCALING_FILTER plane property to 1. Otherwise, the default method is used.
>
> Signed-off-by: Laurentiu Palcu
Reviewed and pushed into drm-misc-next.
Regards,
L
On Do, 2020-11-05 at 16:01 +0200, Laurentiu Palcu wrote:
> Hi,
>
> This patchset fixes 90/270 rotations for Vivante tiled and super-tiled
> formats and a Coccinelle warning.
Thanks, looks good. I've pushed them into drm-misc-next.
Regards,
Lucas
___
d
On Fr, 2020-11-20 at 22:13 +0100, Lucas Stach wrote:
> The conversion away from the simple display pipeline helper missed
> to convert the prepare_fb plane callback, so no fences are attached to
> the atomic state, breaking synchronization with other devices. Fix
> this by plu
Am Mittwoch, den 25.11.2020, 11:22 + schrieb Steven Price:
> On 25/11/2020 11:15, Lucas Stach wrote:
> > Am Mittwoch, den 25.11.2020, 11:04 + schrieb Steven Price:
> > > On 25/11/2020 03:17, Luben Tuikov wrote:
> > > > The job timeout handler now returns sta
Am Mittwoch, den 25.11.2020, 11:04 + schrieb Steven Price:
> On 25/11/2020 03:17, Luben Tuikov wrote:
> > The job timeout handler now returns status
> > indicating back to the DRM layer whether the job
> > was successfully cancelled or whether more time
> > should be given to the job to complet
: mxsfb: Stop using DRM simple display pipeline helper)
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/mxsfb/mxsfb_kms.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_kms.c
b/drivers/gpu/drm/mxsfb/mxsfb_kms.c
index b721b8b262ce..4d556532281a 100644
--- a/drivers/gpu
Am Donnerstag, den 29.10.2020, 15:20 +0100 schrieb Guido Günther:
> etnaviv_iommu_find_iova has it so etnaviv_iommu_insert_exact and
> lockdep_assert_held should have it as well.
This sounds reasonable to me. I've added this patch to my etnaviv/next
branch.
Regards,
Lucas
> Signed-off-by: Guido
Am Freitag, den 30.10.2020, 10:33 +0100 schrieb Daniel Vetter:
> On Fri, Oct 30, 2020 at 10:19:54AM +0100, Lucas Stach wrote:
> > Am Donnerstag, den 29.10.2020, 19:20 +0100 schrieb Daniel Vetter:
> > > On Thu, Oct 29, 2020 at 03:38:21PM +0100, Lucas Stach wrote
Am Donnerstag, den 29.10.2020, 19:20 +0100 schrieb Daniel Vetter:
> On Thu, Oct 29, 2020 at 03:38:21PM +0100, Lucas Stach wrote:
> > Hi Guido,
> >
> > Am Donnerstag, den 29.10.2020, 15:20 +0100 schrieb Guido Günther:
> > > So far the unmap from gpu address space o
Hi Guido,
Am Donnerstag, den 29.10.2020, 15:20 +0100 schrieb Guido Günther:
> So far the unmap from gpu address space only happened when dropping the
> last ref in gem_free_object_unlocked, however that is skipped if there's
> still multiple handles to the same GEM object.
>
> Since userspace (he
On Fr, 2020-10-23 at 09:51 -0700, Rob Clark wrote:
> From: Rob Clark
>
> If there is only a single ring (no-preemption), everything is FIFO order
> and there is no need to implicit-sync.
>
> Mesa should probably just always use MSM_SUBMIT_NO_IMPLICIT, as behavior
> is undefined when fences are n
On Mi, 2020-10-07 at 10:32 +0200, Marek Vasut wrote:
> On 10/7/20 3:24 AM, Laurent Pinchart wrote:
> [...]
> > +properties:
> > + compatible:
> > +enum:
> > + - fsl,imx23-lcdif
> > + - fsl,imx28-lcdif
> > + - fsl,imx6sx-lcdif
> > + - fsl,imx8mq-lcdif
>
> There is no fsl,im
On Do, 2020-09-03 at 21:40 +0100, Robin Murphy wrote:
> Since commit 9495b7e92f71 ("driver core: platform: Initialize dma_parms
> for platform devices"), struct platform_device already provides a
> dma_parms structure, so we can save allocating another one.
>
> Signed-off-by: Robin Murphy
Thanks
On Fr, 2020-08-14 at 11:05 +0200, Christian Gmeiner wrote:
> This little patch set adds support for the total bandwidth used by HI. The
> basic hi bandwidth read-out is quite simple but I needed to add some little
> clean-ups to make it nice looking.
>
> Christian Gmeiner (4):
> drm/etnaviv: ren
On Fr, 2020-08-14 at 11:05 +0200, Christian Gmeiner wrote:
> These two perf counters represent the total read and write
> GPU bandwidth in terms of 64bits.
>
> The used sequence was taken from Vivante kernel driver.
>
> Signed-off-by: Christian Gmeiner
> ---
> drivers/gpu/drm/etnaviv/etnaviv_pe
which is non-trivial to convert.
>
> Signed-off-by: Thomas Zimmermann
> Reviewed-by: Daniel Vetter
Acked-by: Lucas Stach
> ---
> drivers/gpu/drm/etnaviv/etnaviv_drv.c | 13 -
> drivers/gpu/drm/etnaviv/etnaviv_drv.h | 1 -
> drivers/gpu/drm/etnaviv/etnaviv_gem.c |
On Do, 2020-09-10 at 13:21 +0300, Laurentiu Palcu wrote:
> On Thu, Sep 10, 2020 at 11:57:10AM +0200, Daniel Vetter wrote:
> > On Thu, Sep 10, 2020 at 11:53 AM Laurentiu Palcu
> > wrote:
> > > When compiling for 32bit platforms, the compilation fails with:
> > >
> > > ERROR: modpost: "__aeabi_ldiv
Hi Laurentiu,
On Mo, 2020-08-31 at 14:24 +0300, Laurentiu Palcu wrote:
> Hi Lucas, Sam,
>
> On Mon, Aug 31, 2020 at 12:37:23PM +0200, Lucas Stach wrote:
> > Hi Laurentiu,
> >
> > On Fr, 2020-08-28 at 11:36 +0300, Laurentiu Palcu wrote:
> > > Hi Lucas,
&g
ixes: fdbcc04da246 ("arm64: dts: imx8mq: add GPC power domains")
> Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Lucas Stach
> ---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/freescale
ch any of the regexes:
> 'grp$', 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Lucas Stach
> ---
> arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff -
On Fr, 2020-09-04 at 16:53 +0200, Krzysztof Kozlowski wrote:
> Remove whitespace at the end of line.
>
> Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Lucas Stach
> ---
> Documentation/devicetree/bindings/gpu/vivante,gc.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 del
x27;#interrupt-cells', 'interrupt-controller' do not match any of the
> regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Lucas Stach
> ---
> Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml | 4
> 1 file chan
ls', 'assigned-clock-parents', 'assigned-clock-rates',
> 'assigned-clocks' do not match any of the regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Lucas Stach
> ---
> Documentation/devicetree/bindings/gpu/
lmost always, hides references to the
> nents and orig_nents entries, making the code robust, easier to follow
> and copy/paste safe.
>
> Signed-off-by: Marek Szyprowski
> Reviewed-by: Robin Murphy
Acked-by: Lucas Stach
> ---
> drivers/gpu/drm/etnaviv/etnaviv_gem.c | 12
Hi Laurentiu,
On Fr, 2020-08-28 at 11:36 +0300, Laurentiu Palcu wrote:
> Hi Lucas,
>
> I was wondering about the plans to merge this series. Since not many
> people can test it properly due to lack of DCSS support in the upstream
> NWL driver (which I heard it's coming soon) and a completely none
en on GC600 rev 0x19
Lucas Stach (1):
drm/etnaviv: always start/stop scheduler in timeout processing
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 11 +--
drivers/gpu/drm/etnaviv/etnaviv_sched.c | 11 ++-
2 files changed, 15 insertions(+), 7 dele
Hi all,
Am Montag, den 24.08.2020, 11:11 -0300 schrieb Fabio Estevam:
> Hi Lucas,
>
> On Mon, Aug 24, 2020 at 8:02 AM Lucas Stach wrote:
> > The drm scheduler currently expects that the stop/start sequence is always
> > executed in the timeout handling, as the job at the
Am Sonntag, den 23.08.2020, 21:09 +0200 schrieb Christian Gmeiner:
> It looks like that this GPU core triggers an abort when
> reading VIVS_HI_CHIP_PRODUCT_ID and/or VIVS_HI_CHIP_ECO_ID.
>
> I looked at different versions of Vivante's kernel driver and did
> not found anything about this issue or
Hi Russell,
Am Sonntag, den 23.08.2020, 20:19 +0100 schrieb Russell King - ARM Linux admin:
> On Sun, Aug 23, 2020 at 09:10:25PM +0200, Christian Gmeiner wrote:
> > Hi
> >
> > > I have formally tested the patch with 5.7.10 - and it doesn't resolve
> > > the issue - sadly :(
> > >
> > > From my t
/scheduler: Avoid accessing freed bad job.)
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_sched.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_sched.c
b/drivers/gpu/drm/etnaviv/etnaviv_sched.c
index 4e3e95dce6d8
Hi Andrey,
Am Mittwoch, den 12.02.2020, 11:33 -0500 schrieb Andrey Grodzovsky:
> On 2/11/20 7:53 PM, Luben Tuikov wrote:
> > On 2020-02-11 4:27 p.m., Andrey Grodzovsky wrote:
> > > On 2/11/20 10:55 AM, Andrey Grodzovsky wrote:
> > > > On 2/10/20 4:50 PM, Luben Tuikov wrote:
> > > > > Hi Lucas,
> >
Hi Dave, Daniel,
please pull the following etnaviv updates for 5.9.
Nothing too exciting:
- a cleanup of our clock handling and improved error handling in this
area from Lubomir
- conversion to pin_user_pages for long page references from John
- fixed PM runtime API error handling from Navid
Reg
Am Freitag, den 17.07.2020, 12:45 +0300 schrieb Laurentiu Palcu:
> Hi Lukas and Daniel,
>
> On Fri, Jul 17, 2020 at 11:27:58AM +0200, Daniel Vetter wrote:
> > On Fri, Jul 17, 2020 at 11:12:39AM +0200, Lucas Stach wrote:
> > > Am Freitag, den 17.07.2020, 10:59 +02
Am Freitag, den 17.07.2020, 10:59 +0200 schrieb Daniel Vetter:
> On Fri, Jul 17, 2020 at 10:18 AM Lucas Stach wrote:
> > Hi Laurentiu,
> >
> > Am Donnerstag, den 09.07.2020, 19:47 +0300 schrieb Laurentiu Palcu:
> > > From: Laurentiu Palcu
> > >
> >
Hi Laurentiu,
Am Donnerstag, den 09.07.2020, 19:47 +0300 schrieb Laurentiu Palcu:
> From: Laurentiu Palcu
>
> Hi,
>
> This patchset adds initial DCSS support for iMX8MQ chip. Initial support
> includes only graphics plane support (no video planes), no HDR10 capabilities,
> no graphics decompres
Hi Christian,
Am Freitag, den 10.07.2020, 09:41 +0200 schrieb Christian Gmeiner:
> This patch series add support for loadavg values for GPU
> sub-components. I am adding a SMA algorithm as I was not
> really sure if EWMA would be a good fit for this use case.
1 second is a pretty long window in G
Hi Christian,
Am Freitag, den 10.07.2020, 09:41 +0200 schrieb Christian Gmeiner:
> The GPU has an idle state register where each bit represents the idle
> state of a sub-GPU component like FE or TX. Sample this register
> every 10ms and calculate a simple moving average over the sub-GPU
> componen
Am Dienstag, den 16.06.2020, 23:21 +0200 schrieb Lubomir Rintel:
> Hi,
>
> please consider applying patches that are chained to this message.
Thanks, I've applied all of them to etnaviv/next.
Regards,
Lucas
> They make getting/enabling the clocks in the etnaviv driver slightly nicer,
> first tw
[2] "Explicit pinning of user-space pages":
> https://lwn.net/Articles/807108/
>
> Signed-off-by: John Hubbard
Thanks, I've applied this to etnaviv/next.
Regards,
Lucas
> ---
>
> Hi,
>
> Changes since v1:
>
> * Rebased onto Linux 5
Hi Navid,
Am Montag, den 15.06.2020, 01:12 -0500 schrieb Navid Emamdoost:
> in etnaviv_gpu_submit, etnaviv_gpu_recover_hang, etnaviv_gpu_debugfs,
> and etnaviv_gpu_init the call to pm_runtime_get_sync increments the
> counter even in case of failure, leading to incorrect ref count.
> In case of fa
Hi Lubomir,
Am Mittwoch, den 17.06.2020, 00:44 +0200 schrieb Lubomir Rintel:
> Hi,
>
> please consider applying the patches chained to this message. It's the
> fifth version of the driver for the ENE KB3930 Embedded Controller.
>
> This version is essentially a resend of v4. The only actual chan
Am Mittwoch, den 20.05.2020, 15:38 +0200 schrieb Lubomir Rintel:
> On Thu, May 14, 2020 at 09:53:08AM +0100, Russell King - ARM Linux admin
> wrote:
> > On Thu, May 14, 2020 at 10:40:58AM +0200, Lucas Stach wrote:
> > > Am Donnerstag, den 14.05.2020, 09:27 +0100 schri
Am Mittwoch, den 20.05.2020, 16:20 +0800 schrieb Shengjiu Wang:
> Hi
>
> On Tue, May 19, 2020 at 6:04 PM Lucas Stach wrote:
> > Am Dienstag, den 19.05.2020, 17:41 +0800 schrieb Shengjiu Wang:
> > > There are two requirements that we need to move the request
> >
Hi Dave, hi Daniel,
two fixes:
- memory leak fix when userspace passes a invalid softpin address
- off-by-one crashing the kernel in the perfmon domain iteration when
the GPU core has both 2D and 3D capabilities
Regards,
Lucas
The following changes since commit 8f3d9f354286745c751374f5f1fcafee6b
Am Montag, den 18.05.2020, 14:29 +0300 schrieb Dan Carpenter:
> If the mapping address is wrong then we have to release the reference to
> it before returning -EINVAL.
>
> Fixes: 00ddc0b2 ("drm/etnaviv: implement softpin")
> Signed-off-by: Dan Carpenter
Thanks, applied to etnaviv/fixes.
Reg
Am Dienstag, den 19.05.2020, 07:30 +0200 schrieb Christian Gmeiner:
> The GC860 has one GPU device which has a 2d and 3d core. In this case
> we want to expose perfmon information for both cores.
>
> The driver has one array which contains all possible perfmon domains
> with some meta data - doms_
Am Dienstag, den 19.05.2020, 17:41 +0800 schrieb Shengjiu Wang:
> There are two requirements that we need to move the request
> of dma channel from probe to open.
How do you handle -EPROBE_DEFER return code from the channel request if
you don't do it in probe?
> - When dma device binds with power
Hi Christian,
Am Montag, den 11.05.2020, 14:37 +0200 schrieb Christian Gmeiner:
> The GC860 has one GPU device which has a 2d and 3d core. In this case
> we want to expose perfmon information for both cores.
>
> The driver has one array which contains all possible perfmon domains
> with some meta
Am Freitag, den 15.05.2020, 12:27 +0200 schrieb Christian Gmeiner:
> Am Fr., 15. Mai 2020 um 12:24 Uhr schrieb Lucas Stach
> :
> > Am Freitag, den 15.05.2020, 12:12 +0200 schrieb Paul Cercueil:
> > > Hi Christian,
> > >
> > > Le ven. 15 mai 2020 à
Am Freitag, den 15.05.2020, 12:12 +0200 schrieb Paul Cercueil:
> Hi Christian,
>
> Le ven. 15 mai 2020 à 12:09, Christian Gmeiner
> a écrit :
> > Am Mo., 11. Mai 2020 um 14:38 Uhr schrieb Christian Gmeiner
> > :
> > > The GC860 has one GPU device which has a 2d and 3d core. In this
> > > case
Am Donnerstag, den 14.05.2020, 09:27 +0100 schrieb Russell King - ARM Linux
admin:
> On Thu, May 14, 2020 at 10:18:02AM +0200, Lucas Stach wrote:
> > Am Mittwoch, den 13.05.2020, 23:41 -0300 schrieb Fabio Estevam:
> > > On Wed, May 13, 2020 at 2:09 PM Fabio Estevam wrote:
Am Mittwoch, den 13.05.2020, 23:41 -0300 schrieb Fabio Estevam:
> On Wed, May 13, 2020 at 2:09 PM Fabio Estevam wrote:
>
> > The binding doc Documentation/devicetree/bindings/gpu/vivante,gc.yaml
> > says that only the 'reg' clock could be optional, the others are
> > required.
>
> arch/arm/boot/
Am Sonntag, den 03.05.2020, 09:49 -0500 schrieb Adam Ford:
> On Thu, Apr 30, 2020 at 7:46 AM Schrempf Frieder
> wrote:
> > From: Frieder Schrempf
> >
> > According to the documents, the i.MX8M-Mini features a GC320 and a
> > GCNanoUltra GPU core. Etnaviv detects them as:
> >
> > etnaviv
Am Donnerstag, den 30.04.2020, 12:46 + schrieb Schrempf Frieder:
> From: Frieder Schrempf
>
> On some i.MX8MM devices the boot hangs when enabling the GPU clocks.
> Changing the order of clock initalization to
>
> core -> shader -> bus -> reg
>
> fixes the issue. This is the same order used
Hi Frieder,
Am Donnerstag, den 30.04.2020, 12:46 + schrieb Schrempf Frieder:
> From: Frieder Schrempf
>
> On i.MX8MM there is an interrupt getting triggered immediately after
> requesting the IRQ, which leads to a stall as the handler accesses
> the GPU registers whithout the clock being ena
Am Donnerstag, den 09.04.2020, 14:35 +0200 schrieb Christian König:
> Am 09.04.20 um 03:31 schrieb xinhui pan:
> > The delayed delete list is per device which might be very huge. And in
> > a heavy workload test, the list might always not be empty. That will
> > trigger any RCU stall warnings or so
Am Donnerstag, den 02.04.2020, 18:07 +0100 schrieb Robert Beckett:
> commit 4900dda90af2cb13bc1d4c12ce94b98acc8fe64e upstream
>
> Due to async need_flush updating via other buffer mapping, checking
> gpu->need_flush in 3 places within etnaviv_buffer_queue can cause GPU
> hangs.
>
> This occurs du
Hi guys,
recently I've been tracing some IRQ latencies in a system and the
display handling in amdgpu doesn't really look that good. To be honest
it also doesn't look too bad, but I still want to share my findings
here. The trace below is from a single vblank IRQ with a pageflip.
The most interes
OD_LINEAR is supported.
>
> Signed-off-by: Guido Günther
Reviewed-by: Lucas Stach
> ---
> drivers/gpu/drm/mxsfb/mxsfb_drv.c | 9 +++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.c
> b/drivers/gpu/drm/mxsfb/mxsfb_drv.
esn't idle fast enough
Gustavo A. R. Silva (1):
drm/etnaviv: Replace zero-length array with flexible-array member
Lucas Stach (2):
drm/etnaviv: request pages from DMA32 zone when needed
drm/etnaviv: fix TS cache flushing on GPUs with BLT engine
drivers/gpu/d
Am Dienstag, den 17.03.2020, 10:59 -0700 schrieb Jacob Lifshay:
> On Tue, Mar 17, 2020 at 10:21 AM Lucas Stach wrote:
> > Am Dienstag, den 17.03.2020, 10:12 -0700 schrieb Jacob Lifshay:
> > > One related issue with explicit sync using sync_file is that combined
> > > CP
Am Dienstag, den 17.03.2020, 11:33 -0400 schrieb Nicolas Dufresne:
> Le lundi 16 mars 2020 à 23:15 +0200, Laurent Pinchart a écrit :
> > Hi Jason,
> >
> > On Mon, Mar 16, 2020 at 10:06:07AM -0500, Jason Ekstrand wrote:
> > > On Mon, Mar 16, 2020 at 5:20 AM Laurent Pinchart wrote:
> > > > On Wed, M
Am Dienstag, den 17.03.2020, 10:12 -0700 schrieb Jacob Lifshay:
> One related issue with explicit sync using sync_file is that combined
> CPUs/GPUs (the CPU cores *are* the GPU cores) that do all the
> rendering in userspace (like llvmpipe but for Vulkan and with extra
> instructions for GPU tasks)
Hi Alex,
since you seem to be picking up scheduler patches, can I ask you to
take this one through your tree?
Regards,
Lucas
On Mo, 2020-01-20 at 11:59 +0100, Christian König wrote:
> Am 20.01.20 um 11:51 schrieb Lucas Stach:
> > 1db8c142b6c5 (drm/scheduler: Add drm_sched_suspend/resum
From: Robert Beckett
Add a new trace event to show when jobs are run on the HW.
Signed-off-by: Robert Beckett
Signed-off-by: Lucas Stach
---
.../gpu/drm/scheduler/gpu_scheduler_trace.h | 27 +++
drivers/gpu/drm/scheduler/sched_main.c| 1 +
2 files changed, 28
7183.html
> Signed-off-by: Wambui Karuga
Acked-by: Lucas Stach
> ---
> drivers/gpu/drm/etnaviv/etnaviv_drv.c | 16
> 1 file changed, 4 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c
> b/drivers/gpu/drm/etnaviv/e
Hi Gustavo,
I've adjusted the subject a bit to match the style of the other etnaviv
driver commits and applied this to the etnaviv/next branch.
Regards,
Lucas
On Do, 2020-03-05 at 04:51 -0600, Gustavo A. R. Silva wrote:
> The current codebase makes use of the zero-length array language
> extensi
ny numbers on the power draw on the i.MX8M
with idle GPU, vs. being fully power gated?
Regards,
Lucas
> Thanks to Lucas Stach for pointing me in the right direction.
>
> Guido Günther (5):
> drm/etnaviv: Fix typo in comment
> drm/etnaviv: Update idle bits
> drm/etnaviv:
On Fr, 2020-02-28 at 11:37 +0100, Christian Gmeiner wrote:
> Report the correct perfmon domains and signals depending
> on the supported feature flags.
>
> Reported-by: Dan Carpenter
> Fixes: 9e2c2e273012 ("drm/etnaviv: add infrastructure to query perf counter")
> Cc: sta...@vger.kernel.org
> Sig
On Fr, 2020-02-28 at 10:47 +0100, Daniel Vetter wrote:
> On Fri, Feb 28, 2020 at 10:29 AM Erik Faye-Lund
> wrote:
> > On Fri, 2020-02-28 at 13:37 +1000, Dave Airlie wrote:
> > > On Fri, 28 Feb 2020 at 07:27, Daniel Vetter
> > > wrote:
> > > > Hi all,
> > > >
> > > > You might have read the short
Hi Daniel,
On Do, 2020-02-27 at 18:29 +0100, Daniel Vetter wrote:
> On Thu, Feb 27, 2020 at 05:21:25PM +0100, Marco Felsch wrote:
> > Currently there is a race conditions if the panel can't be probed e.g.
> > it is not connected [1]. There where several attempts to fix this [2,3]
> > but non of th
handling in
> etnaviv_debugfs_init() and also makes the function return void.
>
> Signed-off-by: Wambui Karuga
Reviewed-by: Lucas Stach
> ---
> drivers/gpu/drm/etnaviv/etnaviv_drv.c | 18 --
> 1 file changed, 4 insertions(+), 14 deletions(-)
>
>
to be located in the DMA32 zone.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_drv.c | 1 +
drivers/gpu/drm/etnaviv/etnaviv_drv.h | 1 +
drivers/gpu/drm/etnaviv/etnaviv_gem.c | 4 ++--
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 8
4 files changed, 12 insertions(+), 2 dele
On Mi, 2020-02-26 at 15:31 +, Schrempf Frieder wrote:
> On 25.02.20 09:13, Frieder Schrempf wrote:
> > Hi Lucas,
> >
> > On 24.02.20 12:08, Lucas Stach wrote:
> > > On Mo, 2020-02-24 at 10:53 +, Schrempf Frieder wrote:
> > > > Hi Lucas,
>
engine is completely asychronous, we also need a few more stall
states to synchronize the flush with the frontend.
Root-caused-by: Jonathan Marek
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etnaviv_buffer.c | 60 ++--
drivers/gpu/drm/etnaviv/state_blt.xml.h | 2 +
2
5975 bytes, from 2018-02-10 13:09:26)
> +
> +Copyright (C) 2012-2019 by the following authors:
> - Wladimir J. van der Laan
> - Christian Gmeiner
> - Lucas Stach
> @@ -48,6 +48,9 @@ DEALINGS IN THE SOFTWARE.
> #define MMU_EXCEPTION_SLAVE_NOT_PRESENT
Hi Christian,
sorry for taking so long to get around to this.
On Mo, 2020-01-06 at 11:43 +0100, Christian Gmeiner wrote:
> Report the correct perfmon domains and signals depending
> on the supported feature flags.
>
> Reported-by: Dan Carpenter
> Fixes: 9e2c2e273012 ("drm/etnaviv: add infrastru
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