No longer used.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Tvrtko Ursulin
Cc: Jon Bloomfield
Cc: Daniel Vetter
Cc: Jordan Justen
Cc: Kenneth Graunke
Cc: Akeem G Abodunrin
---
drivers/gpu/drm/i915/intel_memory_region.c | 4 +---
drivers/gpu/drm/i915
case of plumbing that through to the region query.
Testcase: igt@i915_query@query-regions-sanity-check
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Tvrtko Ursulin
Cc: Jon Bloomfield
Cc: Daniel Vetter
Cc: Jordan Justen
Cc: Kenneth Graunke
Cc: Akeem G Abodunrin
-sanity-check
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Tvrtko Ursulin
Cc: Jon Bloomfield
Cc: Daniel Vetter
Cc: Jordan Justen
Cc: Kenneth Graunke
Cc: Akeem G Abodunrin
---
drivers/gpu/drm/i915/i915_query.c | 10 +-
drivers/gpu/drm/i915
over. (Tvrtko)
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Tvrtko Ursulin
Cc: Jon Bloomfield
Cc: Daniel Vetter
Cc: Jordan Justen
Cc: Kenneth Graunke
Cc: Akeem G Abodunrin
Cc: mesa-...@lists.freedesktop.org
Acked-by: Tvrtko Ursulin
Acked-by: Akeem G Abodu
Test-with: 20220525183702.490989-1-matthew.a...@intel.com
--
2.34.3
On Thu, 19 May 2022 at 10:55, Christian König
wrote:
>
> Just sending that out once more to intel-gfx to let the CI systems take
> a look.
If all went well it should normally appear at [1][2], if CI was able
to pick up the series.
Since it's not currently there, I assume it's temporarily stuck
over. (Tvrtko)
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Tvrtko Ursulin
Cc: Jon Bloomfield
Cc: Daniel Vetter
Cc: Jon Bloomfield
Cc: Jordan Justen
Cc: Kenneth Graunke
Cc: Akeem G Abodunrin
Cc: mesa-...@lists.freedesktop.org
---
Documentation/gpu/rfc/i915_small_b
On 17/05/2022 09:29, Tvrtko Ursulin wrote:
On 16/05/2022 19:11, Matthew Auld wrote:
Add an entry for the new uapi needed for small BAR on DG2+.
v2:
- Some spelling fixes and other small tweaks. (Akeem & Thomas)
- Rework error capture interactions, including no longer nee
size. (Lionel)
v3:
- Drop the vma query for now.
- Add unallocated_cpu_visible_size as part of the region query.
- Improve the docs some more, including documenting the expected
behaviour on older kernels, since this came up in some offline
discussion.
Signed-off-by: Matthew Auld
Cc: Th
On Fri, 13 May 2022 at 14:03, Christian König
wrote:
>
> Am 13.05.22 um 11:21 schrieb Matthew Auld:
> > On Mon, 9 May 2022 at 14:09, Christian König
> > wrote:
> >> Hi everyone,
> >>
> >> re-sending this because Daniel was requesting a backgroun
On Mon, 9 May 2022 at 14:09, Christian König
wrote:
>
> Hi everyone,
>
> re-sending this because Daniel was requesting a background why this is
> useful.
>
> When TTM creates a buffer this object initially should not have any
> backing store and there no resource object associated with it. The
On 11/05/2022 19:38, Maarten Lankhorst wrote:
Op 11-05-2022 om 20:23 schreef Matthew Auld:
On 11/05/2022 12:52, Maarten Lankhorst wrote:
Instead of its own path, use the common path when it doesn't result
in evicting any vma. This fixes the case where we don't wait for
binding.
https
for the bind doesn't seem to help?
Fixes: b5cfe6f7a6e1 ("drm/i915: Remove short-term pins from execbuf, v6.")
Cc: Matthew Auld
Reported-by: Mateusz Jończyk
Tested-by: Hans de Goede
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 6 ++
1 file
is run both in fullscreen and 1/2 screen window).
"""
Since the only regression is MemBW GPU blend, against many more gains,
it sounds it is time to enable THP on Gen11+.
Signed-off-by: Tvrtko Ursulin
References: https://gitlab.freedesktop.org/drm/intel/-/issues/430
Cc: Joonas Lahti
On 28/04/2022 12:11, Tvrtko Ursulin wrote:
On 28/04/2022 11:25, Matthew Auld wrote:
On 28/04/2022 09:55, Tvrtko Ursulin wrote:
On 27/04/2022 18:36, Matthew Auld wrote:
On 27/04/2022 09:36, Tvrtko Ursulin wrote:
On 20/04/2022 18:13, Matthew Auld wrote:
Add an entry for the new uapi needed
On 03/05/2022 11:39, Lionel Landwerlin wrote:
On 03/05/2022 13:22, Matthew Auld wrote:
On 02/05/2022 09:53, Lionel Landwerlin wrote:
On 02/05/2022 10:54, Lionel Landwerlin wrote:
On 20/04/2022 20:13, Matthew Auld wrote:
Add an entry for the new uapi needed for small BAR on DG2+.
v2
On 02/05/2022 09:53, Lionel Landwerlin wrote:
On 02/05/2022 10:54, Lionel Landwerlin wrote:
On 20/04/2022 20:13, Matthew Auld wrote:
Add an entry for the new uapi needed for small BAR on DG2+.
v2:
- Some spelling fixes and other small tweaks. (Akeem & Thomas)
- Rework error cap
; Bloomfield, Jon
; Daniel Vetter ;
Justen,
Jordan L ; Kenneth Graunke
; Abodunrin, Akeem G
; mesa-...@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/doc: add rfc section for small BAR uapi
On 20/04/2022 20:13, Matthew Auld wrote:
Add an entry for the new uapi needed for small BAR on DG2+.
v2
On 02/05/2022 08:54, Lionel Landwerlin wrote:
On 20/04/2022 20:13, Matthew Auld wrote:
Add an entry for the new uapi needed for small BAR on DG2+.
v2:
- Some spelling fixes and other small tweaks. (Akeem & Thomas)
- Rework error capture interactions, including no longer nee
t; batch. This allows us to protect the kernel's ring without changing the
> uABI.
>
> Suggested-by: Zbigniew Kempczynski
> Signed-off-by: Chris Wilson
> Cc: Zbigniew Kempczynski
> Cc: Thomas Hellstrom
> Signed-off-by: Ramalingam C
Reviewed-by: Matthew Auld
as Lahtinen
> Suggested-by: CQ Tang
> Signed-off-by: Chris Wilson
> Signed-off-by: Ramalingam C
Reviewed-by: Matthew Auld
> mismatch between LRC register layout generated during init and HW
> default register offsets.
>
> Signed-off-by: Akeem G Abodunrin
> cc: Prathap Kumar Valsan
> Signed-off-by: Ramalingam C
Reviewed-by: Matthew Auld
On 28/04/2022 09:55, Tvrtko Ursulin wrote:
On 27/04/2022 18:36, Matthew Auld wrote:
On 27/04/2022 09:36, Tvrtko Ursulin wrote:
On 20/04/2022 18:13, Matthew Auld wrote:
Add an entry for the new uapi needed for small BAR on DG2+.
v2:
- Some spelling fixes and other small tweaks. (Akeem
o_copy).
+*/
+ GEM_BUG_ON(!it->sg);
It will crash and burn anyway, with the below NULL deref. Not sure if
BUG_ON() is really much better, but I guess with the additional comment,
Reviewed-by: Matthew Auld
it->dma = sg_dma_address(it->sg);
dst_sz;
bool ccs_is_src;
int err;
@@ -770,7 +762,7 @@ intel_context_migrate_copy(struct intel_context *ce,
}
do {
- int len;
+ int len, ccs_sz;
This could be moved into the reduced scope below.
Reviewed-by: Matthew Auld
On 27/04/2022 09:36, Tvrtko Ursulin wrote:
On 20/04/2022 18:13, Matthew Auld wrote:
Add an entry for the new uapi needed for small BAR on DG2+.
v2:
- Some spelling fixes and other small tweaks. (Akeem & Thomas)
- Rework error capture interactions, including no longer nee
cc: Matthew Auld
cc: Thomas Hellstrom
---
include/uapi/drm/i915_drm.h | 18 ++
1 file changed, 18 insertions(+)
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 35ca528803fd..ad191ed6547c 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm
On 25/04/2022 17:24, Ramalingam C wrote:
Capture the eviction details for Flat-CCS capable, lmem objects.
v2:
Fix the Flat-ccs capbility of lmem obj with smem residency
possibility [Thomas]
Signed-off-by: Ramalingam C
cc: Thomas Hellstrom
cc: Matthew Auld
---
drivers/gpu/drm/i915/gt
:35, Lionel Landwerlin wrote:
Hi Matt,
The proposal looks good to me.
Looking forward to try it on drm-tip.
-Lionel
On 20/04/2022 20:13, Matthew Auld wrote:
Add an entry for the new uapi needed for small BAR on DG2+.
v2:
- Some spelling fixes and other small tweaks. (Akeem & Th
ss?
You made a comment stating this is racy, wouldn't querying on the GEM
object prevent this?
Thanks,
-Lionel
On 27/04/2022 09:35, Lionel Landwerlin wrote:
Hi Matt,
The proposal looks good to me.
Looking forward to try it on drm-tip.
-Lionel
On 20/04/2022 20:13, Matthew Auld wrote:
Add an
-by: Matthew Auld
Cc: Thomas Hellström
Cc: Nirmoy Das
Reviewed-by: Nirmoy Das
---
drivers/gpu/drm/i915/i915_ttm_buddy_manager.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
index 8e4e3f72c1ef
Trying to cast the region id into the region type doesn't work too well,
since the i915_vm_min_alignment() won't give us the correct value for
the stolen-lmem case.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Nirmoy Das
Cc: Ramalingam C
---
drivers/gpu/drm/i915/selftests
The compact-pt layout restrictions should only apply to the ppGTT. Also
make this play nice on platforms that only have the 64K GTT restriction,
and not the compact-pt thing.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Nirmoy Das
Cc: Ramalingam C
---
drivers/gpu/drm/i915/selftests
9] DR3: DR6: fffe0ff0 DR7: 0400
[ 2857.497692] Call Trace:
[ 2857.497694]
[ 2857.497697] intel_context_migrate_copy+0x1e5/0x4f0 [i915]
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Nirmoy Das
Reviewed-by: Nirmoy Das
---
drivers/gpu/drm/i9
size. (Lionel)
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Jon Bloomfield
Cc: Daniel Vetter
Cc: Jordan Justen
Cc: Kenneth Graunke
Cc: Akeem G Abodunrin
Cc: mesa-...@lists.freedesktop.org
---
Documentation/gpu/rfc/i915_small_bar.h |
moving")
Cc: Christian König
Cc: Daniel Vetter
Signed-off-by: Matthew Auld
Reviewed-by: Christian König
Reviewed-by: Daniel Vetter
---
drivers/gpu/drm/ttm/ttm_bo.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/tt
l Vetter
Signed-off-by: Matthew Auld
---
drivers/gpu/drm/ttm/ttm_bo.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 015a94f766de..b15b77e10383 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
On 11/04/2022 13:39, Christian König wrote:
Am 11.04.22 um 10:56 schrieb Matthew Auld:
If we hit the sync case, like when skipping clearing for kernel internal
objects, or when falling back to cpu clearing, like in i915, we end up
trying to add a NULL fence, but with some recent changes
On Mon, 11 Apr 2022 at 19:51, Arunpravin Paneer Selvam
wrote:
>
> Add a set of drm buddy test cases to validate the
> drm/drm_buddy.c memory allocator.
>
> v2: sorted in alphabetical order
>
> Signed-off-by: Arunpravin Paneer Selvam
> Reviewed-by: Matthew Auld
Tests
g a shared slot
mandatory v4")
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/ttm/ttm_execbuf_util.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ttm/ttm_execbuf_util.c
b/drivers/gpu/drm/ttm/ttm_execbuf_util.c
index 0eb995d25df1..dbee34a058df 1006
On 11/04/2022 13:42, Christian König wrote:
Am 11.04.22 um 11:47 schrieb Matthew Auld:
On 11/04/2022 08:38, Arunpravin Paneer Selvam wrote:
Add a simple check to reject any size not aligned to the
min_page_size.
when size is not aligned to min_page_size, driver module
should handle
On 11/04/2022 10:56, Thomas Hellström wrote:
Hi, Matthew
On 4/11/22 10:56, Matthew Auld wrote:
If we hit the sync case, like when skipping clearing for kernel internal
objects, or when falling back to cpu clearing, like in i915, we end up
trying to add a NULL fence, but with some recent
with
min_order = 8, triggers the BUG_ON(order < min_order).
v2: add more commit description
v3: remove WARN_ON()
Signed-off-by: Arunpravin Paneer Selvam
Suggested-by: Matthew Auld
Reviewed-by: Matthew Auld
0644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -10,6 +10,7 @@ test_progs = [
'device_reset',
'drm_import_export',
'drm_mm',
+ 'drm_buddy',
Nit: Should be kept sorted. No need to resend though.
Reviewed-by: Matthew Auld
'drm_read',
'fbdev',
x3e/0x2b0
<4>[5.467704] intel_alloc_initial_plane_obj.isra.6+0x1a9/0x390 [i915]
<4>[5.467833] intel_crtc_initial_plane_config+0x83/0x340 [i915]
In the ttm_bo_move_sync_cleanup() case it seems we only really care
about calling ttm_bo_wait_free_node(), so let's instead
Hi Christian,
We seem to be hitting a new issue in ttm_bo_move_sync_cleanup(), due
to passing a NULL fence, and I guess with some recent changes this is
now blowing up in at least dma_resv_add_fence(). Question is how
should we handle this? Should we add a special case in
On 08/04/2022 10:48, Matthew Auld wrote:
On 08/04/2022 09:59, Christian König wrote:
Am 08.04.22 um 10:42 schrieb Matthew Auld:
All of CI is just failing with the following, which prevents loading of
the module:
i915 :03:00.0: [drm] *ERROR* Scratch setup failed
Best guess
On 08/04/2022 09:59, Christian König wrote:
Am 08.04.22 um 10:42 schrieb Matthew Auld:
All of CI is just failing with the following, which prevents loading of
the module:
i915 :03:00.0: [drm] *ERROR* Scratch setup failed
Best guess is that this comes from the pin_map
calls into dma_resv_wait_timeout() which can return the
remaining timeout, leading to the caller thinking this is an error.
v2(Lucas): handle ret == 0
Fixes: 1d7f5e6c5240 ("drm/i915: drop bo->moving dependency")
Signed-off-by: Matthew Auld
Cc: Christian König
Cc: Lucas De March
On 07/04/2022 17:49, Christian König wrote:
Am 07.04.22 um 18:45 schrieb Matthew Auld:
I guess this was missed in the conversion or something.
Fixes: 7bc80a5462c3 ("dma-buf: add enum dma_resv_usage v4")
Signed-off-by: Matthew Auld
Cc: Christian König
Cc: Daniel Vetter
My
On 08/04/2022 06:00, Lucas De Marchi wrote:
On Thu, Apr 07, 2022 at 05:45:32PM +0100, Matthew Auld wrote:
All of CI is just failing with the following, which prevents loading of
the module:
i915 :03:00.0: [drm] *ERROR* Scratch setup failed
Best guess is that this comes from the pin_map
On 07/04/2022 17:49, Christian König wrote:
Am 07.04.22 um 18:45 schrieb Matthew Auld:
I guess this was missed in the conversion or something.
Fixes: 7bc80a5462c3 ("dma-buf: add enum dma_resv_usage v4")
Signed-off-by: Matthew Auld
Cc: Christian König
Cc: Daniel Vetter
My
calls into dma_resv_wait_timeout() which can return the
remaining timeout, leading to the caller thinking this is an error.
Fixes: 1d7f5e6c5240 ("drm/i915: drop bo->moving dependency")
Signed-off-by: Matthew Auld
Cc: Christian König
Cc: Daniel Vetter
---
drivers/gpu
I guess this was missed in the conversion or something.
Fixes: 7bc80a5462c3 ("dma-buf: add enum dma_resv_usage v4")
Signed-off-by: Matthew Auld
Cc: Christian König
Cc: Daniel Vetter
---
drivers/gpu/drm/i915/i915_deps.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
-by: Matthew Auld
Cc: Thomas Hellström
Cc: Nirmoy Das
---
drivers/gpu/drm/i915/i915_ttm_buddy_manager.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
index 8e4e3f72c1ef..a5109548abc0 100644
9] DR3: DR6: fffe0ff0 DR7: 0400
[ 2857.497692] Call Trace:
[ 2857.497694]
[ 2857.497697] intel_context_migrate_copy+0x1e5/0x4f0 [i915]
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Nirmoy Das
Reviewed-by: Nirmoy Das
---
drivers/gpu/drm/i9
The compact-pt layout restrictions should only apply to the ppGTT. Also
make this play nice on platforms that only have the 64K GTT restriction,
and not the compact-pt thing.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Nirmoy Das
---
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 12
Trying to cast the region id into the region type doesn't work too well,
since the i915_vm_min_alignment() won't give us the correct value for
the stolen-lmem case.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Nirmoy Das
---
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 2 +-
1 file
9] DR3: DR6: fffe0ff0 DR7: 0400
[ 2857.497692] Call Trace:
[ 2857.497694]
[ 2857.497697] intel_context_migrate_copy+0x1e5/0x4f0 [i915]
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_object.c
On Wed, 6 Apr 2022 at 08:52, Christian König
wrote:
>
> That should now be handled by the common dma_resv framework.
>
> Signed-off-by: Christian König
> Reviewed-by: Daniel Vetter
> Cc: intel-...@lists.freedesktop.org
> ---
> drivers/gpu/drm/i915/gem/i915_gem_object.c| 41
On 18/03/2022 18:12, Daniel Vetter wrote:
Maybe also good to add dri-devel to these discussions.
I'm not sure where exactly we landed with dgpu error capture (maybe I
should check the code but it's really w/e here), but I think we can
also toss in "you need a non-recoverable context for error
the order value which is 0
> >> and when it compares with min_order = 8, triggers the BUG_ON(order
> >> < min_order). To avoid this problem, we added a simple check to
> >> return -EINVAL if size is not aligned to the min_page_size.
> >>
> >> v2
Move the sanity check that both src and dst are never both system
memory, which should never happen on discrete, and likely means we have
a bug. The only exception is on integrated where we trigger this path in
the selftests.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Nirmoy Das
move when not needed, since the current placement is seen
as not compatible.
Suggested-by: Thomas Hellström
Fixes: 2ed38cec5606 ("drm/i915: opportunistically apply ALLOC_CONTIGIOUS")
Signed-off-by: Matthew Auld
Cc: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 3 +++
1 file c
On 18/03/2022 02:10, Andi Shyti wrote:
Now that we have tiles we want each of them to have its own
interface. A directory "gt/" is created under "cardN/" that will
contain as many diroctories as the tiles.
In the coming patches tile related interfaces will be added. For
now the sysfs gt
-Lionel
On 18/02/2022 13:22, Matthew Auld wrote:
Add an entry for the new uapi needed for small BAR on DG2+.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Jon Bloomfield
Cc: Daniel Vetter
Cc: Jordan Justen
Cc: Kenneth Graunke
Cc: mesa-...@lists.freedesktop.org
---
Documentatio
On 16/03/2022 06:34, Arunpravin Paneer Selvam wrote:
handle a situation in the condition order-- == min_order,
when order = 0 and min_order = 0, leading to order = -1,
it now won't exit the loop. To avoid this problem,
added a order check in the same condition, (i.e)
when order is 0, we return
On 14/03/2022 19:40, Arunpravin wrote:
handle a situation in the condition order-- == min_order,
when order = 0, leading to order = -1, it now won't exit
the loop. To avoid this problem, added a order check in
the same condition, (i.e) when order is 0, we return
-ENOSPC
Signed-off-by:
On Mon, 14 Mar 2022 at 19:32, Arunpravin
wrote:
>
> handle instances when size is not aligned with the min_page_size.
> Unigine Heaven has allocation requests for example required pages
> are 161 and alignment request is 128. To allocate the left over
> 33 pages, continues the iteration to find
The leftover bits around dealing with stolen-local memory + small BAR, plus
some related fixes.
v2: some tweaks based on feedback from Ville
v3: directly probe the PTE to derive the physical offset within lmem
--
2.34.1
Just pass along the probed io_size. The backend should be able to
utilize the entire range here, even if some of it is non-mappable.
It does leave open with what to do with stolen local-memory.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Reviewed-by: Thomas Hellström
Acked-by: Nirmoy Das
For the ttm backend we can use existing placements fpfn and lpfn to
force the allocator to place the object at the requested offset,
potentially evicting stuff if the spot is currently occupied.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Acked-by: Nirmoy Das
---
.../gpu/drm/i915/gem
on platforms like DG2).
For simplicity we don't attempt to support partially mappable stolen.
Signed-off-by: Akeem G Abodunrin
Co-developed-by: Matthew Auld
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Acked-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 48
Add a generic interface for allocating an object at some specific
offset, and convert stolen over. Later we will want to hook this up to
different backends.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Acked-by: Nirmoy Das
---
.../drm/i915/display/intel_plane_initial.c| 4 +-
drivers
Keep the behaviour consistent with normal lmem, where we assume CPU
access if by default required.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Acked-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm
address, before allocating from stolen.
- Bail if it's not located in dsm.
v3:
- Scratch that. There doesn't seem to be any relationship with the
base and PTE address, on at least DG1. Let's instead just grab the
lmem address from the PTE itself.
Signed-off-by: Matthew Auld
Cc: Thomas
hna Sripada
Cc: Ap Kamal
Reviewed-by: Matthew Auld
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Ville Syrjälä
Acked-by: Nirmoy Das
---
drivers/gpu/drm/i915/display/intel_plane_initial.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/disp
On Thu, 10 Mar 2022 at 12:28, Matthew Auld wrote:
>
> From: CQ Tang
>
> When system does not have mappable aperture, ggtt->mappable_end=0. In
> this case if we pass PIN_MAPPABLE when pinning vma, the pinning code
> will return -ENOSPC. So conditionally set PIN
On 10/03/2022 14:47, Arunpravin wrote:
On 08/03/22 10:31 pm, Matthew Auld wrote:
On 08/03/2022 13:59, Arunpravin wrote:
On 07/03/22 10:11 pm, Matthew Auld wrote:
On 07/03/2022 14:37, Arunpravin wrote:
place BUG_ON(order < min_order) outside do..while
loop as it fails Unigine Hea
be some offset within lmem, but this also happens
to be the exact dsm start, on dg1. Therefore we should only need to
fudge the physical address, before allocating from stolen.
- Bail if it's not located in dsm.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Ville Syrjälä
---
.../drm
On DG2+ the initial fb shouldn't be placed anywhere close to DSM, and so
should just be allocated directly from LMEM.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
.../drm/i915/display/intel_plane_initial.c| 46 +++
1 file changed, 27 insertions(+), 19 deletions
hna Sripada
Cc: Ap Kamal
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_plane_initial.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.c
b/drivers/gpu/drm/i
Add a generic interface for allocating an object at some specific
offset, and convert stolen over. Later we will want to hook this up to
different backends.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
.../drm/i915/display/intel_plane_initial.c| 4 +-
drivers/gpu/drm/i915/gem
Keep the behaviour consistent with normal lmem, where we assume CPU
access if by default required.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem
For the ttm backend we can use existing placements fpfn and lpfn to
force the allocator to place the object at the requested offset,
potentially evicting stuff if the spot is currently occupied.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
.../gpu/drm/i915/gem/i915_gem_object_types.h
Just pass along the probed io_size. The backend should be able to
utilize the entire range here, even if some of it is non-mappable.
It does leave open with what to do with stolen local-memory.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm
on platforms like DG2).
For simplicity we don't attempt to support partially mappable stolen.
Signed-off-by: Akeem G Abodunrin
Co-developed-by: Matthew Auld
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 48 --
drivers/gpu/drm/i915
The leftover bits around dealing with stolen-local memory + small BAR, plus
some related fixes.
v2: some tweaks based on feedback from Ville
--
2.34.1
On 08/03/2022 13:59, Arunpravin wrote:
On 07/03/22 10:11 pm, Matthew Auld wrote:
On 07/03/2022 14:37, Arunpravin wrote:
place BUG_ON(order < min_order) outside do..while
loop as it fails Unigine Heaven benchmark.
Unigine Heaven has buffer allocation requests for
example required pa
On 09/02/2022 07:32, Christian König wrote:
Am 08.02.22 um 16:12 schrieb Matthew Auld:
Make sure we pull in the kernel-doc for this.
Reported-by: Daniel Vetter
Signed-off-by: Matthew Auld
Cc: Arunpravin
Cc: Christian König
Reviewed-by: Christian König
Thanks. Could you also push
On Mon, 7 Mar 2022 at 18:41, Ville Syrjälä
wrote:
>
> On Mon, Mar 07, 2022 at 06:26:32PM +, Matthew Auld wrote:
> > On 07/03/2022 17:06, Ville Syrjälä wrote:
> > > On Mon, Mar 07, 2022 at 10:32:36AM +, Matthew Auld wrote:
> > >> On 04/03/2022 19:33, Vi
On 07/03/2022 17:06, Ville Syrjälä wrote:
On Mon, Mar 07, 2022 at 10:32:36AM +, Matthew Auld wrote:
On 04/03/2022 19:33, Ville Syrjälä wrote:
On Fri, Mar 04, 2022 at 05:23:32PM +, Matthew Auld wrote:
The offset we get looks to be the exact start of DSM, but the
inital_plane_vma
On 07/03/2022 14:37, Arunpravin wrote:
place BUG_ON(order < min_order) outside do..while
loop as it fails Unigine Heaven benchmark.
Unigine Heaven has buffer allocation requests for
example required pages are 161 and alignment request
is 128. To allocate the remaining 33 pages, continues
the
On 07/03/2022 13:40, Ramalingam C wrote:
On Xe-HP and later devices, dedicated compression control state (CCS)
stored in local memory is used for each surface, to support the
3D and media compression formats.
The memory required for the CCS of the entire local memory is 1/256 of
the local
On 04/03/2022 19:33, Ville Syrjälä wrote:
On Fri, Mar 04, 2022 at 05:23:32PM +, Matthew Auld wrote:
The offset we get looks to be the exact start of DSM, but the
inital_plane_vma expects the address to be relative.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
.../drm/i915
This is no longer possible since e6e1a304d759 ("drm/i915: vma is always
backed by an object.").
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/i915_vma.c | 17 +++--
1 file changed, 7 insertions(+), 10 deletions(-)
diff --git a/drivers/gp
On DG2+ the initial fb shouldn't be placed anywhere close to DSM, and so
should just be allocated directly from LMEM.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/display/intel_plane_initial.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff
The offset we get looks to be the exact start of DSM, but the
inital_plane_vma expects the address to be relative.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
.../drm/i915/display/intel_plane_initial.c| 22 +++
1 file changed, 18 insertions(+), 4 deletions(-)
diff
hna Sripada
Cc: Ap Kamal
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/display/intel_plane_initial.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.c
b/drivers/gpu/drm/i915/disp
If this is an actual range allocation, and not some bias thing then the
resultant allocation will already be naturally contiguous without
needing any power-of-two rounding.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/i915_ttm_buddy_manager.c | 3 ++-
1 file
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