fix Smatch static checker warning
-Fix uninitialized symbol comp_pdev in mtk_ddp_comp_init.
Fixes: 0d9eee9118b7 ("drm/mediatek: Add drm ovl_adaptor sub driver for MT8195")
Signed-off-by: Nancy.Lin
---
v3: fix reviewer comment in v2
v2: add Fixes tag
---
fix Smatch static checker warning
- uninitialized symbol comp_pdev in mtk_ddp_comp_init.
Fixes: 0d9eee9118b7 ("drm/mediatek: Add drm ovl_adaptor sub driver for MT8195")
Signed-off-by: Nancy.Lin
---
v2: add Fixes tag
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 5 -
1 file changed, 4
fix Smatch static checker warning
- uninitialized symbol comp_pdev in mtk_ddp_comp_init.
Signed-off-by: Nancy.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
1. Add ovl_adaptor get_format and get_num_formats component function.
The two functions are needed for getting the supported format in
mtk_plane_init().
2. Get supported format from the ovl_adaptor's rdma engine - mdp_rdma.
Signed-off-by: Nancy.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h
Add ovl_adaptor get_format and get_num_formats component function.
The two functions are needed for getting the supported format in
mtk_plane_init().
Changes in v3:
- modify for reviewer's comment in v2.
- add mdp-rdma get supported format api for ovl_adaptor driver.
Changes in v2:
- remove
Add mdp_rdma get_format and get_num_formats function.
Signed-off-by: Nancy.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 3 +++
drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 24
2 files changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
Add ovl_adaptor get_format and get_num_formats component function.
The two functions are need for getting the supported format in
mtk_plane_init().
Signed-off-by: Nancy.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 2 ++
.../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 24
Add ovl_adaptor get_format and get_num_formats component function.
The two functions are need for getting the supported format in
mtk_plane_init().
Signed-off-by: Nancy.Lin
Change-Id: Ia8e9f6cabcc71b262155a022b103ae81d1616b8f
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 2 ++
Add ovl_adaptor driver for MT8195.
Ovl_adaptor is an encapsulated module and designed for simplified
DRM control flow. This module is composed of 8 RDMAs, 4 MERGEs and
an ETHDR. Two RDMAs merge into one layer, so this module support 4
layers.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
MT8195 have two mmsys. Modify drm for MT8195 multi-mmsys support.
The two mmsys (vdosys0 and vdosys1) will bring up two drm drivers,
only one drm driver register as the drm device.
Each drm driver binds its own component. The last bind drm driver
allocates and registers the drm device to drm core.
This is a preparation for adding support for the ovl_adaptor sub driver
Ovl_adaptor is a DRM sub driver, which doesn't have dma dev. Add
dma_dev_get function for getting representative dma dev in ovl_adaptor.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioachino Del Regno
Reviewed-by: CK Hu
Add driver data of mt8195 vdosys1 to mediatek-drm.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 17 -
1 file changed, 16
Add drm ovl_adaptor sub driver. Bring up ovl_adaptor sub driver if
the component exists in the path.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
Tested-by: Nícolas F. R. A. Prado
---
Add vdosys1 ETHDR definition.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Krzysztof Kozlowski
Tested-by: AngeloGioacchino Del Regno
---
.../display/mediatek/mediatek,ethdr.yaml | 182 ++
1 file changed, 182
ETHDR is a part of ovl_adaptor.
ETHDR is designed for HDR video and graphics conversion in the external
display path. It handles multiple HDR input types and performs tone
mapping, color space/color format conversion, and then combine
different layers, output the required HDR or SDR signal to the
The hardware path of vdosys1 with DPTx output need to go through by several
modules, such as, OVL_ADAPTOR and MERGE.
Add DRM and these modules support by the patches below:
Changes in v30:
- rebase to next-20230321
- fix ethdr dt_binding_check message
Changes in v29:
- rebase to next-20221226
MT8195 have two mmsys. Modify drm for MT8195 multi-mmsys support.
The two mmsys (vdosys0 and vdosys1) will bring up two drm drivers,
only one drm driver register as the drm device.
Each drm driver binds its own component. The last bind drm driver
allocates and registers the drm device to drm core.
Add driver data of mt8195 vdosys1 to mediatek-drm.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 17 -
1 file changed, 16
This is a preparation for adding support for the ovl_adaptor sub driver
Ovl_adaptor is a DRM sub driver, which doesn't have dma dev. Add
dma_dev_get function for getting representative dma dev in ovl_adaptor.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioachino Del Regno
Reviewed-by: CK Hu
Add ovl_adaptor driver for MT8195.
Ovl_adaptor is an encapsulated module and designed for simplified
DRM control flow. This module is composed of 8 RDMAs, 4 MERGEs and
an ETHDR. Two RDMAs merge into one layer, so this module support 4
layers.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Add drm ovl_adaptor sub driver. Bring up ovl_adaptor sub driver if
the component exists in the path.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
Tested-by: Nícolas F. R. A. Prado
---
The hardware path of vdosys1 with DPTx output need to go through by several
modules, such as, OVL_ADAPTOR and MERGE.
Add DRM and these modules support by the patches below:
Changes in v29:
- rebase to next-20221226
- fix reviewer comment in v28
- keep original flow if comp node not found in
Add vdosys1 ETHDR definition.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Krzysztof Kozlowski
Tested-by: AngeloGioacchino Del Regno
---
.../display/mediatek/mediatek,ethdr.yaml | 188 ++
1 file changed, 188
ETHDR is a part of ovl_adaptor.
ETHDR is designed for HDR video and graphics conversion in the external
display path. It handles multiple HDR input types and performs tone
mapping, color space/color format conversion, and then combine
different layers, output the required HDR or SDR signal to the
Add ovl_adaptor driver for MT8195.
Ovl_adaptor is an encapsulated module and designed for simplified
DRM control flow. This module is composed of 8 RDMAs, 4 MERGEs and
an ETHDR. Two RDMAs merge into one layer, so this module support 4
layers.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Add vdosys1 ETHDR definition.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Krzysztof Kozlowski
Tested-by: AngeloGioacchino Del Regno
---
.../display/mediatek/mediatek,ethdr.yaml | 188 ++
1 file changed, 188
ETHDR is a part of ovl_adaptor.
ETHDR is designed for HDR video and graphics conversion in the external
display path. It handles multiple HDR input types and performs tone
mapping, color space/color format conversion, and then combine
different layers, output the required HDR or SDR signal to the
Add drm ovl_adaptor sub driver. Bring up ovl_adaptor sub driver if
the component exists in the path.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
Tested-by: Nícolas F. R. A. Prado
---
The hardware path of vdosys1 with DPTx output need to go through by several
modules, such as, OVL_ADAPTOR and MERGE.
Add DRM and these modules support by the patches below:
Changes in v28:
- rebase to next-20221107
- fix reviewer comment in v27
- extra new line at the end mtk_ethdr.h
Changes
MT8195 have two mmsys. Modify drm for MT8195 multi-mmsys support.
The two mmsys (vdosys0 and vdosys1) will bring up two drm drivers,
only one drm driver register as the drm device.
Each drm driver binds its own component. The last bind drm driver
allocates and registers the drm device to drm core.
This is a preparation for adding support for the ovl_adaptor sub driver
Ovl_adaptor is a DRM sub driver, which doesn't have dma dev. Add
dma_dev_get function for getting representative dma dev in ovl_adaptor.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioachino Del Regno
Reviewed-by: CK Hu
Add driver data of mt8195 vdosys1 to mediatek-drm.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 17 -
1 file changed, 16
Add new mmsys component: ethdr_mixer and mdp_rdma. These components will
use in mt8195 vdosys1.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
---
include/linux/soc/mediatek/mtk-mmsys.h | 9
MT8195 vdosys1 has more than 32 reset bits and a different reset base
than other chips. Add the number of reset bits and reset base in mmsys
private data.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by:
Add mtk-mutex support for mt8195 vdosys1.
The vdosys1 path component contains ovl_adaptor, merge5,
and dp_intf1. Ovl_adaptor is composed of several sub-elements
which include MDP_RDMA0~7, MERGE0~3, and ETHDR.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Add mtk-mutex DDP_COMPONENT_DP_INTF1 component. The MT8195 vdosys1 path
component contains ovl_adaptor, merge5, and dp_intf1. It is a preparation
for adding support for MT8195 vdosys1 path component.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Add cmdq support for mtk-mmsys config API.
The mmsys config register settings need to take effect with the other
HW settings(like OVL_ADAPTOR...) at the same vblanking time.
If we use CPU to write the mmsys reg, we can't guarantee all the
settings can be written in the same vblanking time.
Cmdq
Simplify code for update mmsys reg.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
Reviewed-by: Nícolas F. R. A. Prado
---
drivers/soc/mediatek/mtk-mmsys.c | 45
Add vdosys1 mmsys compatible for MT8195 platform.
For MT8195, VDOSYS0 and VDOSYS1 are 2 display HW pipelines binding to
2 different power domains, different clock drivers and different
mediatek-drm drivers.
Signed-off-by: Nancy.Lin
Reviewed-by: Nícolas F. R. A. Prado
---
Add mmsys for support 64 reset bits. It is a preparation for MT8195
vdosys1 HW reset. MT8195 vdosys1 has more than 32 reset bits.
1. Add the number of reset bits in mmsys private data
2. move the whole "reset register code section" behind the
"get mmsys->data" code section for getting the
The hardware path of vdosys1 with DPTx output need to go through by several
modules, such as, OVL_ADAPTOR and MERGE.
Add mmsys and mutex modules support by the patches below:
Changes in v28:
- rebase to next-20221107
- fix reviewer comment in v27
- remove change id
- fix mmsys config api
Add vdosys1 reset control bit for MT8195 platform.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Rex-BC Chen
Acked-by: Krzysztof Kozlowski
Acked-by: Philipp Zabel
Tested-by: AngeloGioacchino Del Regno
---
Add four mmsys config APIs. The config APIs are used for config
mmsys reg. Some mmsys regs need to be set according to the
HW engine binding to the mmsys simultaneously.
1. mtk_mmsys_merge_async_config: config merge async width/height.
async is used for cross-clock domain synchronization.
2.
Add mt8195 vdosys1 routing table to the driver data of mtk-mmsys.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Rex-BC Chen
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
---
drivers/soc/mediatek/mt8195-mmsys.h | 139
MT8195 have two mmsys. Modify drm for MT8195 multi-mmsys support.
The two mmsys (vdosys0 and vdosys1) will bring up two drm drivers,
only one drm driver register as the drm device.
Each drm driver binds its own component. The last bind drm driver
allocates and registers the drm device to drm core.
Add ovl_adaptor driver for MT8195.
Ovl_adaptor is an encapsulated module and designed for simplified
DRM control flow. This module is composed of 8 RDMAs, 4 MERGEs and
an ETHDR. Two RDMAs merge into one layer, so this module support 4
layers.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Add driver data of mt8195 vdosys1 to mediatek-drm.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
Change-Id: If0373f1e51273d2813ade3133b44638bc64a657c
---
ETHDR is a part of ovl_adaptor.
ETHDR is designed for HDR video and graphics conversion in the external
display path. It handles multiple HDR input types and performs tone
mapping, color space/color format conversion, and then combine
different layers, output the required HDR or SDR signal to the
Add vdosys1 ETHDR definition.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Krzysztof Kozlowski
Tested-by: AngeloGioacchino Del Regno
---
.../display/mediatek/mediatek,ethdr.yaml | 188 ++
1 file changed, 188
The hardware path of vdosys1 with DPTx output need to go through by several
modules, such as, OVL_ADAPTOR and MERGE.
Add DRM and these modules support by the patches below:
Changes in v27:
- rebase to next-20221102
- change mmsys compatible for mt8195 vdosys1
- base on jason's series[ref 1]
-
This is a preparation for adding support for the ovl_adaptor sub driver
Ovl_adaptor is a DRM sub driver, which doesn't have dma dev. Add
dma_dev_get function for getting representative dma dev in ovl_adaptor.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioachino Del Regno
Reviewed-by: CK Hu
Add drm ovl_adaptor sub driver. Bring up ovl_adaptor sub driver if
the component exists in the path.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
Tested-by: Nícolas F. R. A. Prado
Add four mmsys config APIs. The config APIs are used for config
mmsys reg. Some mmsys regs need to be set according to the
HW engine binding to the mmsys simultaneously.
1. mtk_mmsys_merge_async_config: config merge async width/height.
async is used for cross-clock domain synchronization.
2.
Add mt8195 vdosys1 routing table to the driver data of mtk-mmsys.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Rex-BC Chen
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
Change-Id: I11ce436a0921b4ab2ee86cc3737828fd56fc9cc0
Add vdosys1 reset control bit for MT8195 platform.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Rex-BC Chen
Acked-by: Krzysztof Kozlowski
Acked-by: Philipp Zabel
Tested-by: AngeloGioacchino Del Regno
---
Add mmsys for support 64 reset bits. It is a preparation for MT8195
vdosys1 HW reset. MT8195 vdosys1 has more than 32 reset bits.
1. Add the number of reset bits in mmsys private data
2. move the whole "reset register code section" behind the
"get mmsys->data" code section for getting the
Simplify code for update mmsys reg.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
Change-Id: I97f103153f08ada6f4e3582ad1fbe7f35e5190ba
---
drivers/soc/mediatek/mtk-mmsys.c | 45
Add cmdq support for mtk-mmsys config API.
The mmsys config register settings need to take effect with the other
HW settings(like OVL_ADAPTOR...) at the same vblanking time.
If we use CPU to write the mmsys reg, we can't guarantee all the
settings can be written in the same vblanking time.
Cmdq
Add mtk-mutex support for mt8195 vdosys1.
The vdosys1 path component contains ovl_adaptor, merge5,
and dp_intf1. Ovl_adaptor is composed of several sub-elements
which include MDP_RDMA0~7, MERGE0~3, and ETHDR.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Add new mmsys component: ethdr_mixer and mdp_rdma. These components will
use in mt8195 vdosys1.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
---
include/linux/soc/mediatek/mtk-mmsys.h | 9
Add mtk-mutex DDP_COMPONENT_DP_INTF1 component. The MT8195 vdosys1 path
component contains ovl_adaptor, merge5, and dp_intf1. It is a preparation
for adding support for MT8195 vdosys1 path component.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
MT8195 vdosys1 has more than 32 reset bits and a different reset base
than other chips. Add the number of reset bits and reset base in mmsys
private data.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by:
The hardware path of vdosys1 with DPTx output need to go through by several
modules, such as, OVL_ADAPTOR and MERGE.
Add mmsys and mutex modules support by the patches below:
Changes in v27:
- rebase to next-20221102
- change mmsys compatible for mt8195 vdosys1
- base on jason's series[ref 1]
Add vdosys1 mmsys compatible for MT8195 platform.
For MT8195, VDOSYS0 and VDOSYS1 are 2 display HW pipelines binding to
2 different power domains, different clock drivers and different
mediatek-drm drivers.
Signed-off-by: Nancy.Lin
Change-Id: I8065205ce44baa417f58176adaae9e1eefa6eadb
---
Add plane color encoding information for color space conversion.
It's a preparation for adding support for mt8195 ovl_adaptor mdp_rdma
csc control.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/mtk_drm_plane.c | 1 +
drivers/gpu/drm/mediatek/mtk_drm_plane.h |
Add mt8195 vdosys1 clock driver name and routing table to
the driver data of mtk-mmsys.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mt8195-mmsys.h| 136 +
drivers/soc/mediatek/mtk-mmsys.c | 10 ++
include/linux/soc/mediatek/mtk-mmsys.h | 2 +
3 files
ETHDR is a part of ovl_adaptor.
ETHDR is designed for HDR video and graphics conversion in the external
display path. It handles multiple HDR input types and performs tone
mapping, color space/color format conversion, and then combine
different layers, output the required HDR or SDR signal to the
Add vdosys1 RDMA definition.
Signed-off-by: Nancy.Lin
---
.../arm/mediatek/mediatek,mdp-rdma.yaml | 77 +++
1 file changed, 77 insertions(+)
create mode 100644
Documentation/devicetree/bindings/arm/mediatek/mediatek,mdp-rdma.yaml
diff --git
MT8195 have two mmsys. Modify drm for MT8195 multi-mmsys support.
The two mmsys (vdosys0 and vdosys1) will bring up two drm drivers,
only one drm driver register as the drm device.
Each drm driver binds its own component. The last bind drm driver
allocates and registers the drm device to drm core.
Add MDP_RDMA driver for MT8195. MDP_RDMA is the DMA engine of
the ovl_adaptor component.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/Makefile | 3 +-
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 7 +
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 1 +
Add display node for vdosys1.
Signed-off-by: Nancy.Lin
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 222 +++
1 file changed, 222 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index
MT8195 vdosys1 has more than 32 reset bits and a different reset base
than other chips. Modify mmsys for support 64 bit and different reset
base.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mt8195-mmsys.h | 1 +
drivers/soc/mediatek/mtk-mmsys.c| 21 -
Add merge new advance config API. The original merge API is
mtk_ddp_comp_funcs function prototype. The API interface parameters
cannot be modified, so add a new config API for extension. This is
the preparation for ovl_adaptor merge control.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Add drm ovl_adaptor sub driver. Bring up ovl_adaptor sub driver if
the component exists in the path.
Signed-off-by: Nancy.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 16
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 30 ---
The hardware path of vdosys1 with DPTx output need to go through by several
modules, such as, OVL_ADAPTOR and MERGE.
Add DRM and these modules support by the patches below:
Changes in v11:
- remove ethdr vblank spin lock
- refine ovl_adaptor print message
Changes in v10:
- refine ethdr reset
Add merge start/stop API for cmdq support. The ovl_adaptor merges
are configured with each drm plane update. Need to enable/disable
merge with cmdq making sure all the settings taken effect in the
same vblank.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
Add mtk-mutex support for mt8195 vdosys1.
The vdosys1 path component contains ovl_adaptor, merge5,
and dp_intf1. Ovl_adaptor is composed of several sub-elements.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mtk-mutex.c | 54
1 file changed, 54 insertions(+)
Add merge mute/unmute setting for MT8195.
MT8195 Vdosys1 merge1~merge4 support HW mute function.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/mtk_disp_merge.c | 13 +
1 file changed, 13 insertions(+)
diff --git
Add ovl_adaptor driver for MT8195.
Ovl_adaptor is an encapsulated module and designed for simplified
DRM control flow. This module is composed of 8 RDMAs, 4 MERGEs and
an ETHDR. Two RDMAs merge into one layer, so this module support 4
layers.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Add cmdq support for mtk-mmsys config API.
The mmsys config register settings need to take effect with the other
HW settings(like OVL_ADAPTOR...) at the same vblanking time.
If we use CPU to write the mmsys reg, we can't guarantee all the
settings can be written in the same vblanking time.
Cmdq
Add mmsys config API. The config API is used for config mmsys reg.
Some mmsys regs need to be setting according to the HW engine binding
to the mmsys simultaneously.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mt8195-mmsys.h| 62 ++
Add driver data of mt8195 vdosys1 to mediatek-drm.
Signed-off-by: Nancy.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index
This is a preparation for adding support for mt8195 vdosys1 mutex.
The vdosys1 path component contains ovl_adaptor, merge5,
and dp_intf1. Ovl_adaptor is composed of several sub-elements,
so change it to support multi-bit control.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mtk-mutex.c |
MT8195 vdosys1 merge1 to merge4 have HW mute function.
Add MERGE additional mute property description.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Acked-By: AngeloGioacchino Del Regno
---
.../devicetree/bindings/display/mediatek/mediatek,merge.yaml | 4
1 file changed, 4
Add vdosys1 ETHDR definition.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
.../display/mediatek/mediatek,ethdr.yaml | 147 ++
1 file changed, 147 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
diff
Add merge async reset control in mtk_merge_stop. Async hw doesn't do self
reset on each sof signal(start of frame), so need to reset the async to
clear the hw status for the next merge start.
Signed-off-by: Nancy.Lin
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_disp_merge.c | 4
1
Add vdosys1 reset control bit for MT8195 platform.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
include/dt-bindings/reset/mt8195-resets.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/dt-bindings/reset/mt8195-resets.h
Add MDP_RDMA driver for MT8195. MDP_RDMA is the DMA engine of
the ovl_adaptor component.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
drivers/gpu/drm/mediatek/Makefile | 3 +-
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 7 +
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 1 +
Add driver data of mt8195 vdosys1 to mediatek-drm.
Signed-off-by: Nancy.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index
Add mmsys config API. The config API is used for config mmsys reg.
Some mmsys regs need to be setting according to the HW engine binding
to the mmsys simultaneously.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mt8195-mmsys.h| 62 ++
Add merge start/stop API for cmdq support. The ovl_adaptor merges
are configured with each drm plane update. Need to enable/disable
merge with cmdq making sure all the settings taken effect in the
same vblank.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
ETHDR is a part of ovl_adaptor.
ETHDR is designed for HDR video and graphics conversion in the external
display path. It handles multiple HDR input types and performs tone
mapping, color space/color format conversion, and then combine
different layers, output the required HDR or SDR signal to the
Add vdosys1 reset control bit for MT8195 platform.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
include/dt-bindings/reset/mt8195-resets.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/dt-bindings/reset/mt8195-resets.h
Add drm ovl_adaptor sub driver. Bring up ovl_adaptor sub driver if
the component exists in the path.
Signed-off-by: Nancy.Lin
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 16
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 30 ---
Add cmdq support for mtk-mmsys config API.
The mmsys config register settings need to take effect with the other
HW settings(like OVL_ADAPTOR...) at the same vblanking time.
If we use CPU to write the mmsys reg, we can't guarantee all the
settings can be written in the same vblanking time.
Cmdq
MT8195 vdosys1 has more than 32 reset bits and a different reset base
than other chips. Modify mmsys for support 64 bit and different reset
base.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mt8195-mmsys.h | 1 +
drivers/soc/mediatek/mtk-mmsys.c| 21 -
MT8195 vdosys1 merge1 to merge4 have HW mute function.
Add MERGE additional mute property description.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Acked-By: AngeloGioacchino Del Regno
---
.../devicetree/bindings/display/mediatek/mediatek,merge.yaml | 4
1 file changed, 4
Add vdosys1 ETHDR definition.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
---
.../display/mediatek/mediatek,ethdr.yaml | 147 ++
1 file changed, 147 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
diff
Add mt8195 vdosys1 clock driver name and routing table to
the driver data of mtk-mmsys.
Signed-off-by: Nancy.Lin
---
drivers/soc/mediatek/mt8195-mmsys.h| 136 +
drivers/soc/mediatek/mtk-mmsys.c | 10 ++
include/linux/soc/mediatek/mtk-mmsys.h | 2 +
3 files
Add display node for vdosys1.
Signed-off-by: Nancy.Lin
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 222 +++
1 file changed, 222 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index
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