From: Rob Clark
This was supposed to be a relative timer, not absolute.
Fixes: 658f4c829688 ("drm/msm/devfreq: Add 1ms delay before clamping freq")
Signed-off-by: Rob Clark
Reviewed-by: Douglas Anderson
---
drivers/gpu/drm/msm/msm_gpu_devfreq.c | 2 +-
1 file changed, 1 inser
From: Akhil P Oommen
Capture gmu log in coredump to enhance debugging.
Signed-off-by: Akhil P Oommen
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 41 +
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno
From: Rob Clark
This adds additional snapshotting for interesting GMU buffers to the
devcore dumps, adds a couple WARN_ON()s, etc. (Plus a bonus comment)
Akhil P Oommen (1):
drm/msm/a6xx: Capture gmu log in devcoredump
Rob Clark (6):
drm/msm/gpu: Name GMU bos
drm/msm/gpu: Add some
On Mon, Nov 22, 2021 at 10:26 AM Rob Clark wrote:
>
> On Thu, Nov 18, 2021 at 2:21 AM Akhil P Oommen wrote:
> >
> > Capture gmu log in coredump to enhance debugging.
> >
> > Signed-off-by: Akhil P Oommen
> > ---
> >
> >
On Thu, Nov 18, 2021 at 2:21 AM Akhil P Oommen wrote:
>
> Capture gmu log in coredump to enhance debugging.
>
> Signed-off-by: Akhil P Oommen
> ---
>
> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 41
> +
> drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +-
>
From: Rob Clark
Re-work the boost and idle clamping to use PM QoS requests instead, so
they get aggreggated with other requests (such as cooling device).
This does have the minor side-effect that devfreq sysfs min_freq/
max_freq files now reflect the boost and idle clamping, as they show
From: Rob Clark
Looks like 658f4c829688 ("drm/msm/devfreq: Add 1ms delay before
clamping freq") was badly rebased on top of efb8a170a367 ("drm/msm:
Fix devfreq NULL pointer dereference on a3xx") and ended up with
the NULL check in the wrong place.
Fixes: 658f4c829688 ("
From: Rob Clark
This was supposed to be a relative timer, not absolute.
Fixes: 658f4c829688 ("drm/msm/devfreq: Add 1ms delay before clamping freq")
Signed-off-by: Rob Clark
Reviewed-by: Douglas Anderson
---
drivers/gpu/drm/msm/msm_gpu_devfreq.c | 2 +-
1 file changed, 1 inser
On Fri, Nov 19, 2021 at 4:21 PM Doug Anderson wrote:
>
> Hi,
>
> On Fri, Nov 19, 2021 at 2:47 PM Rob Clark wrote:
> >
> > +void msm_devfreq_boost(struct msm_gpu *gpu, unsigned factor)
> > +{
> > + struct msm_gpu_devfreq *df = >devfreq;
> > +
On Fri, Nov 19, 2021 at 2:46 PM Rob Clark wrote:
>
> From: Rob Clark
>
> This was supposed to be a relative timer, not absolute.
>
Fixes: 658f4c829688 ("drm/msm/devfreq: Add 1ms delay before clamping freq")
> Signed-off-by: Rob Clark
> ---
> drivers/gpu/drm
From: Rob Clark
This was supposed to be a relative timer, not absolute.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gpu_devfreq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_gpu_devfreq.c
b/drivers/gpu/drm/msm/msm_gpu_devfreq.c
index
From: Rob Clark
Re-work the boost and idle clamping to use PM QoS requests instead, so
they get aggreggated with other requests (such as cooling device).
This does have the minor side-effect that devfreq sysfs min_freq/
max_freq files now reflect the boost and idle clamping, as they show
On Thu, Nov 18, 2021 at 12:53 AM Daniel Vetter wrote:
>
> On Tue, Nov 16, 2021 at 06:31:10PM -0800, Gurchetan Singh wrote:
> > On Tue, Nov 16, 2021 at 7:43 AM Daniel Vetter wrote:
> >
> > > On Mon, Nov 15, 2021 at 07:26:14PM +, Kasireddy, Vivek wrote:
> > > > Hi Daniel, Greg,
> > > >
> > > >
On Fri, Nov 19, 2021 at 1:54 AM Pekka Paalanen wrote:
>
> On Thu, 18 Nov 2021 15:30:38 -0800
> Rob Clark wrote:
>
> > On Thu, Nov 18, 2021 at 2:39 AM Pekka Paalanen wrote:
> > >
> > > On Wed, 17 Nov 2021 14:48:40 -0800
> > > Brian Norris wrote:
On Thu, Nov 18, 2021 at 2:39 AM Pekka Paalanen wrote:
>
> On Wed, 17 Nov 2021 14:48:40 -0800
> Brian Norris wrote:
>
> > A variety of applications have found it useful to listen to
> > user-initiated input events to make decisions within a DRM driver, given
> > that input events are often the
On Fri, Oct 22, 2021 at 4:35 AM Dmitry Baryshkov
wrote:
>
> Hi,
>
> On Fri, 22 Oct 2021 at 02:53, wrote:
> >
> > On 2021-09-30 07:00, Dmitry Baryshkov wrote:
> > > In preparations of virtualizing the dpu_plane rip out debugfs support
> > > from dpu_plane (as it is mostly used to expose plane's
On Wed, Nov 17, 2021 at 5:23 PM Steev Klimaszewski wrote:
>
>
> On 11/17/21 1:27 AM, Christian König wrote:
> > Am 16.11.21 um 19:30 schrieb Amit Pundir:
> >> On Tue, 16 Nov 2021 at 21:21, Rob Clark wrote:
> >>> From: Rob Clark
> >>>
> >>
On Tue, Nov 16, 2021 at 8:37 AM Daniel Vetter wrote:
>
> On Tue, Nov 16, 2021 at 10:25:19AM +0100, Christian König wrote:
> > We need to grab another ref before trying to add the fence to the sched
> > job and not after.
> >
> > Signed-off-by: Christian König
>
> Reviewed-by: Daniel Vetter
>
>
From: Rob Clark
drm_sched_job_add_dependency() could drop the last ref, so we need to do
the dma_fence_get() first.
Cc: Christian König
Fixes: 9c2ba265352a drm/scheduler: ("use new iterator in
drm_sched_job_add_implicit_dependencies v2")
Signed-off-by: Rob Clark
---
Applies on t
On Mon, Nov 15, 2021 at 2:43 PM Rob Clark wrote:
>
> On Mon, Nov 15, 2021 at 8:16 AM Ondřej Jirman wrote:
> >
> > On Mon, Nov 15, 2021 at 05:04:36PM +0100, megi xff wrote:
> > > On Mon, Nov 15, 2021 at 04:05:02PM +0100, Daniel Vetter wrote:
> > &g
On Mon, Nov 15, 2021 at 8:16 AM Ondřej Jirman wrote:
>
> On Mon, Nov 15, 2021 at 05:04:36PM +0100, megi xff wrote:
> > On Mon, Nov 15, 2021 at 04:05:02PM +0100, Daniel Vetter wrote:
> > > You need
> > >
> > > commit 13e9e30cafea10dff6bc8d63a38a61249e83fd65
> > > Author: Christian König
> > >
From: Rob Clark
This was the one GPU related kernel buffer which was not given a debug
name. Let's fix that.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm
On Mon, Nov 15, 2021 at 6:43 AM Akhil P Oommen wrote:
>
> On 11/12/2021 12:54 AM, Rob Clark wrote:
> > From: Rob Clark
> >
> > When converting to use an idr to map userspace fence seqno values back
> > to a dma_fence, we lost the error return when userspace passes
From: Rob Clark
Mesa attempts to allocate a cached-coherent buffer in order to determine
if cached-coherent is supported. Resulting in seeing this error message
once per process with newer mesa. But no reason for this to be more
than a debug msg.
Signed-off-by: Rob Clark
---
drivers/gpu/drm
From: Rob Clark
Reported-by: kernel test robot
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 8a2af3a27e33..dcde5eff931d
From: Rob Clark
When converting to use an idr to map userspace fence seqno values back
to a dma_fence, we lost the error return when userspace passes seqno
that is larger than the last submitted fence. Restore this check.
Reported-by: Akhil P Oommen
Fixes: a61acbbe9cf8 ("drm/msm: Track &
From: Rob Clark
We weren't dropping the submitqueue reference in all paths. In
particular, when the fence has already been signalled. Split out
a helper to simplify handling this in the various different return
paths.
Fixes: a61acbbe9cf8 ("drm/msm: Track "seqno" fences by i
From: Rob Clark
A couple of wait_fence related fixes.
Rob Clark (2):
drm/msm: Fix wait_fence submitqueue leak
drm/msm: Restore error return on invalid fence
drivers/gpu/drm/msm/msm_drv.c| 49 ++--
drivers/gpu/drm/msm/msm_gem_submit.c | 1 +
drivers/gpu/drm
On Thu, Nov 11, 2021 at 7:54 AM Akhil P Oommen wrote:
>
> On 11/10/2021 10:25 PM, Rob Clark wrote:
> > On Wed, Nov 10, 2021 at 7:28 AM Akhil P Oommen
> > wrote:
> >>
> >> On 7/28/2021 6:36 AM, Rob Clark wrote:
> >>> From: Rob Clark
> >>&
On Wed, Nov 10, 2021 at 1:50 AM Daniel Vetter wrote:
>
> On Tue, Nov 09, 2021 at 08:17:01AM -0800, Rob Clark wrote:
> > On Tue, Nov 9, 2021 at 1:07 AM Daniel Vetter wrote:
> > >
> > > On Mon, Nov 08, 2021 at 03:39:17PM -0800, Rob Clark wrote:
> > > >
On Wed, Nov 10, 2021 at 7:28 AM Akhil P Oommen wrote:
>
> On 7/28/2021 6:36 AM, Rob Clark wrote:
> > From: Rob Clark
> >
> > Previously the (non-fd) fence returned from submit ioctl was a raw
> > seqno, which is scoped to the ring. But from UABI standpoint, t
From: Rob Clark
Add a debugfs interface to ignore hw error irqs, in order to force
fallback to sw hangcheck mechanism. Because the hw error detection is
pretty good on newer gens, we need this for igt tests to test the sw
hang detection.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm
From: Rob Clark
Add some helpers for fence comparision, which handle rollover properly,
and stop open coding fence seqno comparisions.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_fence.h | 12
drivers/gpu/drm/msm/msm_gpu.c | 6 +++---
drivers/gpu/drm/msm/msm_gpu.h
From: Rob Clark
The remaining struct_mutex usage is just to serialize various gpu
related things (submit/retire/recover/fault/etc), so replace
struct_mutex with gpu->lock.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a5xx_debugfs.c | 4 ++--
drivers/gpu/drm/msm/adr
From: Rob Clark
cur_ctx_seqno already does the same thing, but handles the edge cases
where a refcnt'd context can live after lastclose. So let's not have
two ways to do the same thing.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 3 +--
drivers/gpu/drm/msm/adreno
From: Rob Clark
The struct_mutex locking is a remnant from the days before per-obj locks,
and no longer needed.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_debugfs.c | 37 ++-
drivers/gpu/drm/msm/msm_fbdev.c | 13 ---
2 files changed, 16
From: Rob Clark
This started out as conversion to using drm/sched to handle job timeout,
recovery, and retire (and delete a bunch of code), but the latter part
is on hold until drm/sched is fixed to properly handle job retire/
cleanup before deciding which job triggered the fault/timeout[1
On Tue, Nov 9, 2021 at 1:07 AM Daniel Vetter wrote:
>
> On Mon, Nov 08, 2021 at 03:39:17PM -0800, Rob Clark wrote:
> > I stumbled across this thread when I ran into the same issue, while
> > working out how to move drm/msm to use scheduler's retire +
> > timeout/recovery
I stumbled across this thread when I ran into the same issue, while
working out how to move drm/msm to use scheduler's retire +
timeout/recovery (and get rid of our own mirror list of in-flight
jobs). We already have hw error detection enabled, and it can signal
quite fast, so assuming the first
From: Rob Clark
In particular, we need to ensure all the necessary blocks are switched
to 64b mode (a5xx+) otherwise the high bits of the address of the BO to
snapshot state into will be ignored, resulting in:
*** gpu fault: ttbr0= iova=00012000 dir=READ
type
From: Rob Clark
It is a 64b register, lets not lose the upper bits.
Fixes: ab5df7b953d8 ("iommu/arm-smmu-qcom: Add an adreno-smmu-priv callback to
get pagefault info")
Signed-off-by: Rob Clark
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 2 +-
1 file changed, 1 insertion(+),
From: Rob Clark
Reported-by: Douglas Anderson
Fixes: 9bc95570175a ("drm/msm: Devfreq tuning")
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gpu_devfreq.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_gpu_devfreq.c
b/drivers/g
From: Rob Clark
Reported-by: Douglas Anderson
Fixes: 9bc95570175a ("drm/msm: Devfreq tuning")
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gpu_devfreq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gpu_devfreq.c
b/drivers/g
From: Rob Clark
Cancel the timer when the GPU is idle, but also remember to restart it
in the recover path if we've re-submitted submits following the one that
hung.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gpu.c | 10 ++
1 file changed, 10 insertions(+)
diff --git
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gpu_devfreq.c | 31 +--
1 file changed, 29 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gpu_devfreq.c
b/drivers/gpu/drm/msm/msm_gpu_devfreq.c
index b24e5475cafb..427c55002f4d
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gpu_devfreq.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_gpu_devfreq.c
b/drivers/gpu/drm/msm/msm_gpu_devfreq.c
index 47b3cf2df230..b24e5475cafb 100644
--- a/drivers
counter to use vsync count.
Nathan Chancellor (1):
drm/msm/dpu: Remove commit and its uses in dpu_crtc_set_crc_source()
Rikard Falkeborn (1):
drm: msm: hdmi: Constify static structs
Rob Clark (6):
drm/msm/dsi: Support NO_CONNECTOR bridges
drm/msm/dpu: Remove some nonsense
From: Rob Clark
We know the upper bound on # of mixers (ie. two), so lets just allocate
this on the stack.
Fixes:
BUG: sleeping function called from invalid context at
include/linux/sched/mm.h:201
in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 0, name: swapper/0
INFO
From: Rob Clark
Signed-off-by: Rob Clark
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index e91568d4f09a..0ae397044310 100644
On Fri, Oct 22, 2021 at 12:15 PM Jessica Zhang wrote:
>
> On 10/22/2021 10:20 AM, Rob Clark wrote:
> > From: Rob Clark
> >
> > We know the upper bound on # of mixers (ie. two), so lets just allocate
> > this on the stack.
> >
> > Fixes:
> >
&g
From: Rob Clark
We know the upper bound on # of mixers (ie. two), so lets just allocate
this on the stack.
Fixes:
BUG: sleeping function called from invalid context at
include/linux/sched/mm.h:201
in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 0, name: swapper/0
INFO
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index e91568d4f09a..0ae397044310 100644
--- a/drivers/gpu/drm/msm
On Thu, Oct 21, 2021 at 12:41 AM Maxime Ripard wrote:
>
> From: Rob Clark
>
> Switch to the documented order dsi-host vs bridge probe.
>
> Tested-by: Amit Pundir
> Tested-by: Caleb Connolly
> Tested-by: John Stultz
> Signed-off-by: Rob Clark
> Signed-o
On Mon, Oct 18, 2021 at 10:33 AM Caleb Connolly
wrote:
>
> Hi all,
>
> On 18/10/2021 17:42, John Stultz wrote:
> > On Mon, Oct 18, 2021 at 8:31 AM Rob Clark wrote:
> >>
> >> From: Rob Clark
> >>
> >> Until we better understand the stability
0700)
----
Rob Clark (1):
drm/msm/devfreq: Restrict idle clamping to a618 for now
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 7 +++
drivers/gpu/drm/msm/msm_gpu.h | 4
drivers/gpu/drm/msm/msm_gpu_devfreq.c | 3 ++-
3 files changed, 13 insertions(+), 1 deletion(-)
On Mon, Oct 18, 2021 at 5:34 AM Maxime Ripard wrote:
>
> Hi Rob,
>
> On Wed, Oct 13, 2021 at 05:16:58PM -0700, Rob Clark wrote:
> > On Wed, Oct 13, 2021 at 7:16 AM Maxime Ripard wrote:
> > >
> > > Hi Caleb,
> > >
> > > On Thu, Sep 30, 2021
From: Rob Clark
Until we better understand the stability issues caused by frequent
frequency changes, lets limit them to a618.
Signed-off-by: Rob Clark
---
Caleb/John, I think this should help as a workaround for the power
instability issues on a630.. could you give it a try?
drivers/gpu/drm
On Wed, Oct 13, 2021 at 7:16 AM Maxime Ripard wrote:
>
> Hi Caleb,
>
> On Thu, Sep 30, 2021 at 09:20:52PM +0100, Caleb Connolly wrote:
> > Hi,
> >
> > On 30/09/2021 20:49, Amit Pundir wrote:
> > > On Thu, 30 Sept 2021 at 04:50, Rob Clark wrote:
> >
>
> @@
> expression E;
> @@
> - flush_workqueue(E);
> destroy_workqueue(E);
>
> Signed-off-by: Christophe JAILLET
For drm/msm:
Reviewed-by: Rob Clark
> ---
> drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 1 -
> drivers/gpu/drm/msm/dsi/dsi_host.c| 1 -
>
+ dri-devel, sorry hit 'send' too quickly
On Tue, Oct 5, 2021 at 3:45 PM Rob Clark wrote:
>
> Hi Dave & Daniel,
>
> A few fixes for v5.15:
>
> * Fix a new crash on dev file close if the dev file was opened when
> GPU is not loaded (such as missing fw in ini
From: Rob Clark
In the case of iova fault triggered devcore dumps, include additional
debug information based on what we think is the current page tables,
including the TTBR0 value (which should match what we have in
adreno_smmu_fault_info unless things have gone horribly wrong
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 25 +
drivers/gpu/drm/msm/msm_gpu.h | 2 +-
3 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu
From: Rob Clark
Add an io-pgtable method to retrieve the raw PTEs that would be
traversed for a given iova access.
Signed-off-by: Rob Clark
---
drivers/iommu/io-pgtable-arm.c | 40 +++---
include/linux/io-pgtable.h | 9
2 files changed, 41 insertions
From: Rob Clark
This series extends io-pgtable-arm with a method to retrieve the page
table entries traversed in the process of address translation, and then
beefs up drm/msm gpu devcore dump to include this (and additional info)
in the devcore dump.
The motivation is tracking down an obscure
From: Rob Clark
I've seen some crashes in our crash reporting that *look* like multiple
threads stomping on each other while communicating with GMU. So wrap
all those paths in a lock.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 6
drivers/gpu/drm/msm/adreno
On Fri, Oct 1, 2021 at 10:39 AM Dmitry Baryshkov
wrote:
>
> On 27/09/2021 21:03, Rob Clark wrote:
> > From: Rob Clark
> >
> > I've seen some crashes in our crash reporting that *look* like multiple
> > threads stomping on each other while communicating with GMU
On Fri, Oct 1, 2021 at 10:28 AM Dmitry Baryshkov
wrote:
>
> On 21/09/2021 01:57, Rob Clark wrote:
> > From: Rob Clark
> >
> > For now, since we have a mix of bridges which support this flag, which
> > which do *not* support this flag, or work both ways, try
From: Rob Clark
Some userspace apps make assumptions that rendering against multiple
contexts within the same process (from the same thread, with appropriate
MakeCurrent() calls) provides sufficient synchronization without any
external synchronization (ie. glFenceSync()/glWaitSync()). Since
From: Rob Clark
msm_file_private is more gpu related, and in the next commit it will
need access to other GPU specific #defines. While we're at it, add
some comments.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_drv.h | 44 --
drivers/gpu/drm/msm/msm_gpu.h
From: Rob Clark
Userspace is expecting that a single thread doing rendering against
multiple contexts does not need additional synchronization between those
contexts beyond ensuring work is flushed to the kernel in the correct
order. But if we have a sched-entity per-context, and are not using
On Thu, Sep 30, 2021 at 11:34 AM Daniel Vetter wrote:
>
> On Thu, Sep 30, 2021 at 8:20 PM Rob Clark wrote:
> >
> > From: Rob Clark
> >
> > In theory a context can be destroyed and a new one allocated at the same
> > address, making the pointer comp
From: Rob Clark
In theory a context can be destroyed and a new one allocated at the same
address, making the pointer comparision to detect when we don't need to
update the current pagetables invalid. Instead assign a sequence number
to each context on creation, and use this for the check
important
> > > > and I wasn't confortable doing them.
> > >
> > >
> > > Hey Maxime,
> > > Sorry for taking so long to get to this, but now that plumbers is
> > > over I've had a chance to check it out on kirin
> > >
> > > Rob Clark p
From: Rob Clark
These aren't used. And if we add use for them later, we should probably
do something a bit more structured than string parsing.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 --
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 8
On Tue, Sep 28, 2021 at 7:52 AM Akhil P Oommen wrote:
>
> On 9/27/2021 8:59 PM, Rob Clark wrote:
> > From: Rob Clark
> >
> > I've seen a few crashes like:
> >
> > Internal error: synchronous external abort: 9610 [#1] PREEMPT SMP
> >
From: Rob Clark
Add a short delay before clamping to idle frequency on active->idle
transition. It takes ~0.5ms to increase the freq again on the next
idle->active transition, so this helps avoid extra freq transitions
on workloads that bounce between CPU and GPU.
Signed-off-by: Rob
From: Rob Clark
Before open-coding this a 2nd time, add a helper.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_atomic.c | 21 ++---
drivers/gpu/drm/msm/msm_drv.c| 29 +
drivers/gpu/drm/msm/msm_drv.h| 22
From: Rob Clark
I've seen some crashes in our crash reporting that *look* like multiple
threads stomping on each other while communicating with GMU. So wrap
all those paths in a lock.
Signed-off-by: Rob Clark
---
Are we allowed to use c99/gnu99 yet?
drivers/gpu/drm/msm/Makefile
From: Rob Clark
I've seen a few crashes like:
Internal error: synchronous external abort: 9610 [#1] PREEMPT SMP
Modules linked in: snd_seq_dummy snd_seq snd_seq_device bridge stp llc tun
nf_nat_tftp nf_conntrack_tftp nf_nat_ftp nf_conntrack_ftp esp6 ah6 ip6t_REJECT
ip6t_ipv6header
On Sun, Sep 26, 2021 at 12:36 PM Dmitry Baryshkov
wrote:
>
> On Sun, 26 Sept 2021 at 22:01, Rob Clark wrote:
> >
> > From: Rob Clark
> >
> > If the device file was opened prior to fw being available (such as from
> > initrd before rootfs is mounted, when th
On Mon, Sep 27, 2021 at 1:42 AM Pekka Paalanen wrote:
>
> On Fri, 3 Sep 2021 11:47:59 -0700
> Rob Clark wrote:
>
> > From: Rob Clark
> >
> > The initial purpose is for igt tests, but this would also be useful for
> > compositors that wait until close
From: Rob Clark
If the device file was opened prior to fw being available (such as from
initrd before rootfs is mounted, when the initrd does not contain GPU
fw), that would cause a later crash when the dev file is closed due to
unitialized submitqueues list:
CPU: 4 PID: 263 Comm: plymouthd
On Fri, Sep 24, 2021 at 12:18 AM Christian König
wrote:
>
> Add functions to dump dma_fence and dma_resv objects into a seq_file and
> use them for printing the debugfs informations.
>
> Signed-off-by: Christian König
for the series,
Reviewed-by: Rob Clark
> ---
> driv
On Wed, Sep 22, 2021 at 5:44 PM Laurent Pinchart
wrote:
>
> Hi Rob,
>
> Thank you for the patch.
>
> On Mon, Sep 20, 2021 at 03:58:00PM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > Slightly awkward to fish out the display_info when we aren't creating
From: Rob Clark
In the case of iova fault triggered devcore dumps, include additional
debug information based on what we think is the current page tables,
including the TTBR0 value (which should match what we have in
adreno_smmu_fault_info unless things have gone horribly wrong
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 25 +
drivers/gpu/drm/msm/msm_gpu.h | 2 +-
3 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu
From: Rob Clark
Add an io-pgtable method to retrieve the raw PTEs that would be
traversed for a given iova access.
Signed-off-by: Rob Clark
---
drivers/iommu/io-pgtable-arm.c | 40 +++---
include/linux/io-pgtable.h | 9
2 files changed, 41 insertions
From: Rob Clark
This series extends io-pgtable-arm with a method to retrieve the page
table entries traversed in the process of address translation, and then
beefs up drm/msm gpu devcore dump to include this (and additional info)
in the devcore dump.
The motivation is tracking down an obscure
On Wed, Sep 22, 2021 at 7:31 AM Andrey Grodzovsky
wrote:
>
>
> On 2021-09-21 11:32 p.m., Rob Clark wrote:
> > On Tue, Sep 21, 2021 at 7:18 PM Andrey Grodzovsky
> > wrote:
> >>
> >> On 2021-09-21 4:47 p.m., Rob Clark wrote:
> >>> On Tue, Sep
On Tue, Sep 21, 2021 at 7:18 PM Andrey Grodzovsky
wrote:
>
>
> On 2021-09-21 4:47 p.m., Rob Clark wrote:
> > On Tue, Sep 21, 2021 at 1:09 PM Andrey Grodzovsky
> > wrote:
> >> On 2021-09-03 2:47 p.m., Rob Clark wrote:
> >>
> >>> From: Rob
On Tue, Sep 21, 2021 at 3:20 PM Doug Anderson wrote:
>
> Hi,
>
> On Mon, Sep 20, 2021 at 3:53 PM Rob Clark wrote:
> >
> > From: Rob Clark
> >
> > Slightly awkward to fish out the display_info when we aren't creating
> > own connector. But I don't see
On Tue, Sep 21, 2021 at 1:09 PM Andrey Grodzovsky
wrote:
>
> On 2021-09-03 2:47 p.m., Rob Clark wrote:
>
> > From: Rob Clark
> >
> > As the finished fence is the one that is exposed to userspace, and
> > therefore the one that other operations, like atomic up
On Wed, Sep 8, 2021 at 2:10 PM Daniel Vetter wrote:
>
> On Wed, Sep 8, 2021 at 9:36 PM Rob Clark wrote:
> > On Wed, Sep 8, 2021 at 11:49 AM Daniel Vetter wrote:
> > > On Wed, Sep 08, 2021 at 11:23:42AM -0700, Rob Clark wrote:
> > > > On Wed, Sep 8, 2021
On Tue, Sep 21, 2021 at 8:57 AM Rob Clark wrote:
>
> On Wed, Sep 8, 2021 at 10:45 AM Daniel Vetter wrote:
> >
> > On Fri, Sep 03, 2021 at 11:47:55AM -0700, Rob Clark wrote:
> > > From: Rob Clark
> > >
> > > As the finished fence is the one that
On Wed, Sep 8, 2021 at 10:45 AM Daniel Vetter wrote:
>
> On Fri, Sep 03, 2021 at 11:47:55AM -0700, Rob Clark wrote:
> > From: Rob Clark
> >
> > As the finished fence is the one that is exposed to userspace, and
> > therefore the one that other operations, like
From: Rob Clark
Slightly awkward to fish out the display_info when we aren't creating
own connector. But I don't see an obvious better way.
v2: Remove error return with NO_CONNECTOR flag
Signed-off-by: Rob Clark
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 39 ---
1
From: Rob Clark
For the brave new world of bridges not creating their own connectors, we
need to implement the max clock limitation via bridge->mode_valid()
instead of connector->mode_valid().
v2: Drop unneeded connector->mode_valid()
Signed-off-by: Rob Clark
Reviewed-by: Douglas
From: Rob Clark
For now, since we have a mix of bridges which support this flag, which
which do *not* support this flag, or work both ways, try it once with
NO_CONNECTOR and then fall back to the old way if that doesn't work.
Eventually we can drop the fallback path.
v2: Add missing
From: Rob Clark
Respin of https://www.spinics.net/lists/linux-arm-msm/msg92182.html with
the remaining 3 patches that are not yet merged.
At the end of this series, but drm/msm and ti-sn65dsi86 work in both
combinations, so the two bridge patches can be merged indepdendently of
the msm/dsi
On Thu, Aug 12, 2021 at 1:08 PM Doug Anderson wrote:
>
> Laurent,
>
> On Thu, Aug 12, 2021 at 12:26 PM Laurent Pinchart
> wrote:
> >
> > Hi Rob,
> >
> > Thank you for the patch.
> >
> > On Wed, Aug 11, 2021 at 04:52:50PM -0700, Rob Clark wrote:
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