Re: [PATCH 20/22] drm/fsl-dcu: Use drm_fb_cma_fbdev_init/fini()

[<80792c48>] (kernel_init) from [<80107cb0>] (ret_from_fork+0x14/0x24) [1.483093] r5:80792c48 r4: [1.486697] Code: e58460d8 e0823003 e58430d4 e59730ac (e5935008) [1.492895] ---[ end trace 95d88c85f82f6379 ]--- [1.497604] Kernel panic - not syncing: Attempted to ki

Re: [PATCH v2 4/6] drm/fsl-dcu: Use drm_mode_config_helper_suspend/resume()

On 2017-11-09 17:49, Noralf Trønnes wrote: > Den 09.11.2017 15.34, skrev Stefan Agner: >> On 2017-11-06 20:18, Noralf Trønnes wrote: >>> Replace driver's code with the generic helpers that do the same thing. >> Tested using: >> echo devices > /sys/power/pm_test

[PATCH v2] drm/fsl-dcu: Don't set connector DPMS property

org Signed-off-by: Laurent Pinchart <laurent.pinchart+rene...@ideasonboard.com> Signed-off-by: Stefan Agner <ste...@agner.ch> --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c | 5 - 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c b/drivers/g

[PATCH 1/2] drm/fsl-dcu: avoid disabling pixel clock twice on suspend

re_disable+0x8c/0x90 Remove clk_disable_unprepare call for pixel clock to avoid unbalanced clock disable on suspend. Fixes: 0a70c998d0c5 ("drm/fsl-dcu: enable pixel clock when enabling CRTC") Signed-off-by: Stefan Agner <ste...@agner.ch> --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_d

[PATCH 2/2] drm/fsl-dcu: enable IRQ before drm_atomic_helper_resume()

Signed-off-by: Stefan Agner <ste...@agner.ch> --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c index 24f234902646..aeeaf0bcf646 100644 --- a/d

Re: [PATCH v2 4/6] drm/fsl-dcu: Use drm_mode_config_helper_suspend/resume()

On 2017-11-09 17:49, Noralf Trønnes wrote: > Den 09.11.2017 15.34, skrev Stefan Agner: >> On 2017-11-06 20:18, Noralf Trønnes wrote: >>> Replace driver's code with the generic helpers that do the same thing. >> Tested using: >> echo devices > /sys/power/pm_test

Re: [PATCH v2 4/6] drm/fsl-dcu: Use drm_mode_config_helper_suspend/resume()

30.992433] [ cut here ] [ 930.992494] WARNING: CPU: 0 PID: 361 at drivers/gpu/drm/drm_atomic_helper.c:1249 drm_atomic_helper_wait_for_vblanks.part.1+0x284/0x288 [ 930.992502] [CRTC:28:crtc-0] vblank wait timed out Tested-by: Stefan Agner <ste...@agner.ch> Acked-by: St

Re: [PATCH] drm/fsl-dcu: set DPMS off before initializing connector

Hi Laurent, On 2017-11-09 11:45, Laurent Pinchart wrote: > Hi Stefan, > > Thank you for the patch. > > On Thursday, 9 November 2017 11:14:36 EET Stefan Agner wrote: > > I notice you have changed the subject line. I'm not sure if the new wording > is > better, as

[PATCH] drm/fsl-dcu: set DPMS off before initializing connector

onboard.com> Signed-off-by: Stefan Agner <ste...@agner.ch> --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c | 5 - 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c index edd7d8127d19..c54806d08dd7 1006

[PATCH] drm/atmel-hlcdc: remove unnecessary if statement

The statement always evaluates to true since the struct fields are arrays. This has shown up as a warning when compiling with clang: warning: address of array 'desc->layout.xstride' will always evaluate to 'true' [-Wpointer-bool-conversion] Signed-off-by: Stefan Agner <ste...@ag

Re: [PATCH 07/41] drm/fsl-dcu: Use .dumb_map_offset and .dumb_destroy defaults

On 2017-07-23 12:16, Noralf Trønnes wrote: > This driver can use the drm_driver.dumb_destroy and > drm_driver.dumb_map_offset defaults, so no need to set them. > > Cc: Stefan Agner <ste...@agner.ch> > Cc: Alison Wang <alison.w...@freescale.com> > Signed-off-by: Nora

Re: [PATCH v3] drm: mxsfb_crtc: Reset the eLCDIF controller

On 2017-06-15 10:26, Marek Vasut wrote: > On 06/15/2017 05:12 PM, Fabio Estevam wrote: >> Hi Marek, >> >> On Mon, Jun 5, 2017 at 9:08 AM, Marek Vasut wrote: >> >>> I'm currently on vacation, try one more time and if it doesn't work out >>> (which means this trivial list is not

[GIT PULL] drm/fsl-dcu: cleanup and fixes for v4.13

) Daniel Vetter (1): drm/fsl: Drop drm_vblank_cleanup Stefan Agner (2): drm/fsl-dcu: implement irq_preinstall/uninstall callbacks drm/fsl-dcu: use new drm_atomic_helper_shutdown drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 24

Re: [PATCH 1/2] drm/fsl-dcu: implement irq_preinstall/uninstall callbacks

On 2017-06-01 20:00, Stefan Agner wrote: > Make use of the irq_preinstall/uninstall callback to clear and > mask all interrupts. Use write 1 to clear as documented by the > data sheet (writing a 0 seems to have cleared interrupt status > too). Remove fsl_dcu_drm_irq_init and call drm

Re: [PATCH 19/37] drm/fsl: Drop drm_vblank_cleanup

On 2017-05-31 01:52, Daniel Vetter wrote: > On Tue, May 30, 2017 at 02:17:04PM -0700, Stefan Agner wrote: >> On 2017-05-26 00:00, Daniel Vetter wrote: >> > On Thu, May 25, 2017 at 10:18 AM, Stefan Agner <ste...@agner.ch> wrote: >> >> On 2017-05-24 07:51, Danie

[PATCH 2/2] drm/fsl-dcu: use new drm_atomic_helper_shutdown

Commit 18dddadc78c9 ("drm/atomic: Introduce drm_atomic_helper_shutdown") introduced a new helper to shutdown all CRTCs to replace the buggy drm_crtc_force_disable_all() function. Make use of the new atomic helper drm_atomic_helper_shutdown() to shutdown CRTCs. Signed-off-by: Stefan

[PATCH 1/2] drm/fsl-dcu: implement irq_preinstall/uninstall callbacks

a bit simpler. Do not set irq_enabled since drm_irq_install is taking care of it. Signed-off-by: Stefan Agner <ste...@agner.ch> --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 20 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/f

Re: [PATCH 19/37] drm/fsl: Drop drm_vblank_cleanup

On 2017-05-26 00:00, Daniel Vetter wrote: > On Thu, May 25, 2017 at 10:18 AM, Stefan Agner <ste...@agner.ch> wrote: >> On 2017-05-24 07:51, Daniel Vetter wrote: >>> Again cleanup before irq disabling doesn't really stop the races, >>> so just dr

Re: [PATCH 07/37] drm: Extract drm_vblank.[hc]

On 2017-05-24 07:51, Daniel Vetter wrote: > drm_irq.c contains both the irq helper library (optional) and the > vblank support (optional, but part of the modeset uapi, and doesn't > require the use of the irq helpers at all. > > Split this up for more clarity of the scope of the individual bits.

Re: [PATCH 19/37] drm/fsl: Drop drm_vblank_cleanup

, I think that fixed the races I saw. But I guess what you are saying instead of using drm_crtc_force_disable_all I should use drm_atomic_helper_shutdown...? Will try that. FWIW, Acked-by: Stefan Agner <ste...@agner.ch> -- Stefan > > Cc: Stefan Agner <ste...@agner.ch> >

Re: [PATCH 08/37] drm/doc: Polish irq helper documentation

On 2017-05-24 07:51, Daniel Vetter wrote: > Pull a (much shorter) overview into drm_irq.c, and instead put the > callback documentation into in-line comments in drm_drv.h. Looks good and just found all I needed to know to fix IRQ registration in fsl dcu. Reviewed-by: Stefan Agne

Re: [PATCH] drm/fb-helper: Allow var->x/yres(_virtual) < fb->width/height again

... So my use case will still be fine with your change. I am ok with relaxing that again, so from my side: Acked-by: Stefan Agner <ste...@agner.ch> -- Stefan > > The depths must match though, so keep the != test for that. > > Also update the DRM_DEBUG output to be slightly more

Re: [PULL] mxsfb fixes

; Marek Vasut (1): > drm: mxsfb: Fix crash when provided invalid DT bindings > > Stefan Agner (2): > drm: mxsfb: use bus_format to determine LCD bus width > drm: mxsfb: fix pixel clock polarity > > drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 49 > +++

[GIT PULL] drm/fsl-dcu: fixes for v4.11

Hi Dave, Just two minor fixes this time around. -- Stefan The following changes since commit 4eaa39c63caf535dc1a8cc43b9a8677a100c09e1: Merge branch 'drm-rockchip-next-2017-02-07' of https://github.com/markyzq/kernel-drm-rockchip into drm-next (2017-02-08 11:28:19 +1000) are available in

Re: [PATCH v2] drm/mxsfb: fix pixel clock polarity

Dave, Marek, On 2016-12-14 13:25, Marek Vasut wrote: > On 12/14/2016 09:48 PM, Stefan Agner wrote: >> The DRM subsystem specifies the pixel clock polarity from a >> controllers perspective: DRM_BUS_FLAG_PIXDATA_NEGEDGE means >> the controller drives the data on pixe

Re: [PATCH 1/2] drm/fsl-dcu: remove unneeded 'ret' assignment

On 2016-12-28 08:48, Fabio Estevam wrote: > From: Fabio Estevam > > When devm_kzalloc() fails there is no need to assign an error code > to the 'ret' variable as it will not be used after jumping to the > 'err_node_put' label, so just remove the assignment. > >

Re: [PATCH v3 09/23] drm: fsl-dcu: use vblank hooks in struct drm_crtc_funcs

tead. > > Signed-off-by: Shawn Guo <shawn@linaro.org> > Cc: Stefan Agner <ste...@agner.ch> Acked-by: Stefan Agner <ste...@agner.ch> > --- > drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 26 ++ > drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv

[PATCH 2/2] drm/fsl-dcu: check for clk_prepare_enable() error

On 2016-12-28 19:53, Gabriel Krisman Bertazi wrote: > Fabio Estevam writes: > >> On Wed, Dec 28, 2016 at 4:38 PM, Gabriel Krisman Bertazi >> wrote: >> >>> This leaks tcon if clk_prepare_enable fails. >> >> No, it does not as tcon is allocated via devm_kzalloc(). > > Agreed. But I think

[PATCH v2 04/13] drm: Add data mirror bus flag

On 2016-12-20 14:21, Laurent Pinchart wrote: > Hi Stefan, > > Thank you for the review. > > On Tuesday 20 Dec 2016 14:01:46 Stefan Agner wrote: >> On 2016-12-18 21:31, Laurent Pinchart wrote: >> > Hi Stefan and Thierry, >> > >> > As the author

[PATCH v2 04/13] drm: Add data mirror bus flag

Hi Laurent, On 2016-12-18 21:31, Laurent Pinchart wrote: > Hi Stefan and Thierry, > > As the author and suggester of the other bus flags, could you please review > this patch ? It looks to me like an appropriate use case for the flag. One remark below: > > On Saturday 19 Nov 2016 05:28:04

[PATCH v3] drm/mxsfb: use bus_format to determine LCD bus width

. Choose the first available or fallback to 24 bit if none are available. Signed-off-by: Stefan Agner --- Changes in v3: - Use read-modify-write to update the LCDC_CTRL field Changes in v2: - Use seperate function mxsfb_set_bus_fmt drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 34

[PATCH v2] drm/mxsfb: use bus_format to determine LCD bus width

On 2016-12-13 23:52, Marek Vasut wrote: > On 12/14/2016 02:02 AM, Stefan Agner wrote: >> The LCD bus width does not need to align with the pixel format. The >> LCDIF controller automatically converts between pixel formats and >> bus width by padding or dropping LSBs. >&g

[PATCH v2] drm/mxsfb: fix pixel clock polarity

to be high active by default and only change if explicitly requested via bus_flags. With that defaults are: - Data enable: high active - Pixel clock polarity: controller drives data on negative edge Signed-off-by: Stefan Agner --- Changes since v1: - Improved comments/fixed typo drivers/gpu/drm

[PATCH] drm/mxsfb: fix pixel clock polarity

On 2016-12-14 00:04, Marek Vasut wrote: > On 12/14/2016 01:01 AM, Stefan Agner wrote: >> On 2016-12-08 15:38, Marek Vasut wrote: >>> On 12/08/2016 09:46 PM, Stefan Agner wrote: >>>> On 2016-12-07 18:37, Marek Vasut wrote: >>>>> On 12/08/2016 02:26 AM, S

[PATCH v2] drm/mxsfb: use bus_format to determine LCD bus width

. Choose the first available or fallback to 24 bit if none are available. Signed-off-by: Stefan Agner --- Changes in v2: - Use seperate function mxsfb_set_bus_fmt drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 33 +++-- drivers/gpu/drm/mxsfb/mxsfb_regs.h | 1 + 2 files changed, 32

[PATCH] drm/mxsfb: fix pixel clock polarity

On 2016-12-08 15:38, Marek Vasut wrote: > On 12/08/2016 09:46 PM, Stefan Agner wrote: >> On 2016-12-07 18:37, Marek Vasut wrote: >>> On 12/08/2016 02:26 AM, Stefan Agner wrote: >>>> On 2016-12-07 16:59, Stefan Agner wrote: >>>>> On 2016-12-07 16:49, Mar

[PATCH] drm/mxsfb: use bus_format to determine LCD bus width

On 2016-12-08 20:24, Marek Vasut wrote: > On 12/09/2016 04:44 AM, Stefan Agner wrote: >> On 2016-12-08 15:33, Marek Vasut wrote: >>> On 12/08/2016 11:52 PM, Stefan Agner wrote: >>>> The LCD bus width does not need to align with the pixel format. The >>>&g

[PATCH] drm/fsl: don't use drm_put_dev

tuck with drm_put_dev. Call the unregister/unref parts >> > separately, to make sure this driver works correct. >> > >> > v2: Rebase. >> > >> > Cc: Lucas Stach >> > Cc: Stefan Agner >> > Signed-off-by: Daniel Vetter >> >> Revi

[PATCH] drm/mxsfb: use bus_format to determine LCD bus width

On 2016-12-08 15:33, Marek Vasut wrote: > On 12/08/2016 11:52 PM, Stefan Agner wrote: >> The LCD bus width does not need to align with the pixel format. The >> LCDIF controller automatically converts between pixel formats and >> bus width by padding or dropping LSBs. >&g

[PATCH] drm/panel: simple: specify bus width and flags for EDT displays

The display has a 18-Bit parallel LCD interface, require DE to be active high and data driven by the controller on falling pixel clock edge (display samples on rising edge). Signed-off-by: Stefan Agner --- drivers/gpu/drm/panel/panel-simple.c | 4 1 file changed, 4 insertions(+) diff

[PATCH] drm/mxsfb: use bus_format to determine LCD bus width

. Choose the first available or fallback to 24 bit if none are available. Signed-off-by: Stefan Agner --- drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 28 +--- drivers/gpu/drm/mxsfb/mxsfb_regs.h | 1 + 2 files changed, 26 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm

[PATCH] drm/mxsfb: fix pixel clock polarity

On 2016-12-07 18:37, Marek Vasut wrote: > On 12/08/2016 02:26 AM, Stefan Agner wrote: >> On 2016-12-07 16:59, Stefan Agner wrote: >>> On 2016-12-07 16:49, Marek Vasut wrote: >>>> On 12/08/2016 01:27 AM, Stefan Agner wrote: >>>>> The DRM subs

[PATCH] drm/mxsfb: fix pixel clock polarity

On 2016-12-07 16:59, Stefan Agner wrote: > On 2016-12-07 16:49, Marek Vasut wrote: >> On 12/08/2016 01:27 AM, Stefan Agner wrote: >>> The DRM subsystem specifies the pixel clock polarity from a >>> controllers perspective: DRM_BUS_FLAG_PIXDATA_NEGEDGE means >>

[PATCH] drm/mxsfb: fix pixel clock polarity

On 2016-12-07 16:49, Marek Vasut wrote: > On 12/08/2016 01:27 AM, Stefan Agner wrote: >> The DRM subsystem specifies the pixel clock polarity from a >> controllers perspective: DRM_BUS_FLAG_PIXDATA_NEGEDGE means >> the controller drives the data on pixe

[GIT PULL] drm/fsl-dcu: fixes and cleanup around fbdev for v4.10

) Fabio Estevam (2): drm/fsl-dcu: Remove unneeded NULL check drm/fsl-dcu: Propagate the real error code Stefan Agner (4): drm/fsl-dcu: unload driver before disabling clocks drm/fsl-dcu: disable outputs before unloading driver

[PATCH] drm/mxsfb: fix pixel clock polarity

to be high active by default and only change if explicitly requested via bus_flags. With that defaults are: - Data enable: high active - Pixel clock polarity: controller drives data on negative edge Signed-off-by: Stefan Agner --- Hi Marek, I discovered this while testing on a i.MX 7 eLCDIF IP

[PULL] MXSFB driver

On 2016-12-06 04:36, Marek Vasut wrote: > On 12/06/2016 08:53 AM, Daniel Vetter wrote: >> On Tue, Dec 06, 2016 at 11:08:06AM +1000, Dave Airlie wrote: >>> On 2 December 2016 at 04:02, Marek Vasut wrote: Hi, as asked by Daniel, I collected the MXSFB DT Acks and the driver and

[GIT PULL] drm/fsl-dcu: fixes and cleanup around fbdev for v4.10

Hi Dave, On 2016-11-28 18:55, Stefan Agner wrote: > Hi Dave, > > Some fixes and cleanup, mainly around fbdev emulation. It also adds a > new module parameter which allows to specify the color depth/bpp for > the fbdev emulation (like the IMX DRM driver). > > There

[PATCH v3 03/13] drm: bridge: Link encoder and bridge in core code

| 5 +-- > drivers/gpu/drm/exynos/exynos_drm_dsi.c| 6 +-- > drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c | 5 +-- For DCU Acked-by: Stefan Agner > drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 5 +-- > drivers/gpu/drm/imx/imx-ldb.c | 6

[GIT PULL] drm/fsl-dcu: fixes and cleanup around fbdev for v4.10

(2): drm/fsl-dcu: Remove unneeded NULL check drm/fsl-dcu: Propagate the real error code Stefan Agner (4): drm/fsl-dcu: unload driver before disabling clocks drm/fsl-dcu: disable outputs before unloading driver drm/fsl-dcu: remove separate compilation unit for fbdev

[PATCH 1/2] drm/fsl-dcu: remove separate compilation unit for fbdev emulation

On 2016-11-16 17:35, Stefan Agner wrote: > The separate file fsl_dcu_drm_fbdev.c only initialized fbdev > emulation which is a one-line operation. There is not much more > code on sight which justifies a separate file, hence call the > initialization helper directly from the drv

[PATCH 1/2] drm/fsl-dcu: Remove unneeded NULL check

On 2016-11-16 07:38, Fabio Estevam wrote: > devm_ioremap_resource() performs NULL check for the 'res' argument, > so remove the unneeded check. > > Signed-off-by: Fabio Estevam > --- > drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 5 - > 1 file changed, 5 deletions(-) > > diff --git

[PATCH 2/2] drm/fsl-dcu: introduce kernel parameter to specify fbdev depth

mechanism to change depth without having to change kernel code. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-dcu

[PATCH 1/2] drm/fsl-dcu: remove separate compilation unit for fbdev emulation

The separate file fsl_dcu_drm_fbdev.c only initialized fbdev emulation which is a one-line operation. There is not much more code on sight which justifies a separate file, hence call the initialization helper directly from the drv file. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu

[PATCH 0/3] drm/fsl-dcu: fix driver remove/DRM unload

On 2016-10-19 17:32, Stefan Agner wrote: > Hi All, > > The first patch is a better alternative to the previously posted > patch ("drm/fsl-dcu: only init fbdev if required") as suggested > by Daniel. > > The second and third are fix related issue uncovered during t

[GIT PULL] drm/fsl-dcu: fixes for v4.9-rc5

-fsl-dcu.git fixes-for-v4.9-rc5 for you to fetch changes up to 3d6f37102bd6e4b55a7f336d44974c0bd1c22a15: drm/fsl-dcu: disable planes before disabling CRTC (2016-11-08 17:14:08 -0800) Stefan Agner (3): drm/fsl-dcu: do

[GIT PULL] bridge/dw-hdmi: I2C master controller support

Hi Dave, On 2016-09-19 00:16, Philipp Zabel wrote: > Hi Dave, > > this tag contains support for the I2C master controller contained in the > HDMI TX IP core, for those boards that don't allow to mux their DDC pins > to SoC I2C controllers. This will make the dw-hdmi driver register its >

[PATCH] drm/atomic-helper: fix reference to drm_atomic_helper_commit_planes

The kernel-doc references drm_atomic_commit_planes() which does not exist. The functions name is drm_atomic_helper_commit_planes(). Signed-off-by: Stefan Agner --- include/drm/drm_modeset_helper_vtables.h | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git

[PATCH] drm/fsl-dcu: disable planes before disabling CRTC

abling the controller. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c index 2ea9dbd..deb5743 100644 --- a/drivers/g

[PATCH v5] drm/fsl-dcu: Implement gamma_lut atomic crtc properties

ot;. > Create a second regmap for gamma memory space using little endian. > The registers after the first address space are not accessed yet, > hence new device trees would even work with old kernels. Just new > kernel need the new format so we can access the separate gamma > reg space.

[PATCH 3/3] drm/fsl-dcu: disable outputs before unloading driver

Make sure that all outputs are disabled before unloading the DRM driver. Otherwise vblank handling is not shut down properly and warnings such as this appear: WARNING: CPU: 0 PID: 540 at drivers/gpu/drm/drm_irq.c:339 drm_vblank_cleanup+0x5c/0x94 Signed-off-by: Stefan Agner --- drivers/gpu/drm

[PATCH 2/3] drm/fsl-dcu: unload driver before disabling clocks

Use drm_put_dev to unload the driver before disabling clocks. Otherwise the driver might read a register during unload which leads to an external abort. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH 1/3] drm/fb_cma_helper: do not free fbdev if there is none

If fbdev emulation is not in use (or not built-in), fb_helper.fbdev is NULL. Don't call calling drm_fbdev_cma_defio_fini in this case. Signed-off-by: Stefan Agner --- drivers/gpu/drm/drm_fb_cma_helper.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm

[PATCH 0/3] drm/fsl-dcu: fix driver remove/DRM unload

iver? Any ideas? -- Stefan Stefan Agner (3): drm/fb_cma_helper: do not free fbdev if there is none drm/fsl-dcu: unload driver before disabling clocks drm/fsl-dcu: disable outputs before unloading driver drivers/gpu/drm/drm_fb_cma_helper.c | 3 ++- drivers/gpu/drm/fsl-dcu/fsl_d

[GIT PULL] drm/fsl-dcu: fixes for v4.9-rc2

pixel clock when enabling CRTC (2016-10-19 17:03:02 -0700) Stefan Agner (4): drm/fsl-dcu: enable TCON bypass mode by default drm/fsl-dcu: do not transfer registers on plane init drm/fsl-dcu: do not transfer registers

[PATCH v3 1/5] drm/fsl-dcu: enable TCON bypass mode by default

at >> creation >> time. >> >> Signed-off-by: Stefan Agner >> --- >> drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 2 ++ drivers/gpu/drm/fsl- >> dcu/fsl_dcu_drm_rgb.c | 39 --- >> 2 files changed, 7 insertions(+), 34 deletions(-) &g

[PATCH v3 5/5] drm/fsl-dcu: only init fbdev if required

On 2016-10-18 00:44, Daniel Vetter wrote: > On Mon, Oct 17, 2016 at 02:33:21PM -0700, Stefan Agner wrote: >> There is no need to request a CMA backed framebuffer if fbdev >> emulation is not enabled. >> >> Signed-off-by: Stefan Agner >> --- >> driver

[PATCH v3 5/5] drm/fsl-dcu: only init fbdev if required

There is no need to request a CMA backed framebuffer if fbdev emulation is not enabled. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm

[PATCH v3 4/5] drm/fsl-dcu: enable pixel clock when enabling CRTC

The pixel clock should not be on if the CRTC is not in use, hence move clock enable/disable calls into CRTC callbacks. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 2 ++ drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 21 + 2 files changed, 3

[PATCH v3 3/5] drm/fsl-dcu: do not transfer registers in mode_set_nofb

Do not schedule a transfer of mode settings early. Modes should get applied on on CRTC enable where we also enable the pixel clock. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/fsl-dcu

[PATCH v3 2/5] drm/fsl-dcu: do not transfer registers on plane init

There is no need to explicitly initiate a register transfer and turn off the DCU after initializing the plane registers. In fact, this is harmful and leads to unnecessary flickers if the DCU has been left on by the bootloader. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu

[PATCH v3 1/5] drm/fsl-dcu: enable TCON bypass mode by default

Do not use encoder disable/enable callbacks to control bypass mode as this seems to mess with the signals not liked by displays. This also makes more sense since the encoder is already defined to be parallel RGB/LVDS at creation time. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu

[PATCH v3 0/5] drm/fsl-dcu: initialization fixes

since v1: - add patch to no not transfer registers in mode_set_nofb - add patch which only init fbdev if required - remove disable unprepare pixel clock on module remove (already disabled in CRTC disable callback). - remove unused label Stefan Agner (5): drm/fsl-dcu: enable TCON bypass mode

[RFC] drm/fb-helper: reject any changes to the fbdev

On 2016-10-12 09:12, Ville Syrjälä wrote: > On Wed, Oct 12, 2016 at 08:55:45AM -0700, Stefan Agner wrote: >> On 2016-10-12 03:42, Ville Syrjälä wrote: >> > On Tue, Oct 11, 2016 at 04:15:04PM -0700, Stefan Agner wrote: >> >> The current fbdev emulation does

[RFC] drm/fb-helper: reject any changes to the fbdev

On 2016-10-12 03:42, Ville Syrjälä wrote: > On Tue, Oct 11, 2016 at 04:15:04PM -0700, Stefan Agner wrote: >> The current fbdev emulation does not allow to push back changes in >> width, height or depth to KMS, hence reject any changes with an >> error. This makes sure th

[RFC] drm/fb-helper: reject any changes to the fbdev

The current fbdev emulation does not allow to push back changes in width, height or depth to KMS, hence reject any changes with an error. This makes sure that fbdev ioctl's fail properly and user space does not assume that changes succeeded. Signed-off-by: Stefan Agner --- This rejects

[PATCH v2 5/5] drm/fsl-dcu: only init fbdev if required

There is no need to request a CMA backed framebuffer if fbdev emulation is not enabled. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm

[PATCH v2 4/5] drm/fsl-dcu: enable pixel clock when enabling CRTC

The pixel clock should not be on if the CRTC is not in use, hence move clock enable/disable calls into CRTC callbacks. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 2 ++ drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 21 + 2 files changed, 3

[PATCH v2 3/5] drm/fsl-dcu: do not transfer registers in mode_set_nofb

Do not schedule a transfer of mode settings early. Modes should get applied on on CRTC enable where we also enable the pixel clock. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/fsl-dcu

[PATCH v2 3/5] drm/fsl-dcu: do not transfer register in mode_set_nofb

Do not schedule a transfer of mode settings early. Modes should get applied on on CRTC enable where we also enable the pixel clock. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/fsl-dcu

[PATCH v2 2/5] drm/fsl-dcu: do not transfer registers on plane init

There is no need to explicitly initiate a register transfer and turn off the DCU after initializing the plane registers. In fact, this is harmful and leads to unnecessary flickers if the DCU has been left on by the bootloader. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu

[PATCH v2 2/5] drm/fsl-dcu: do not explicitly transfer registers on plane init

There is no need to explicitly initiate a register transfer and turn off the DCU after initializing the plane registers. In fact, this is harmful and leads to unnecessary flickers if the DCU has been left on by the bootloader. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu

[PATCH v2 1/5] drm/fsl-dcu: enable TCON bypass mode by default

Do not use encoder disable/enable callbacks to control bypass mode as this seems to mess with the signals not liked by displays. This also makes more sense since the encoder is already defined to be parallel RGB/LVDS at creation time. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu

[PATCH v2 0/5] drm/fsl-dcu: initialization fixes

in mode_set_nofb - add patch which only init fbdev if required - remove disable unprepare pixel clock on module remove (already disabled in CRTC disable callback). - remove unused label Stefan Agner (5): drm/fsl-dcu: enable TCON bypass mode by default drm/fsl-dcu: do not transfer registers on plane init

[PATCH 3/3] drm/fsl-dcu: enable pixel clock when enabling CRTC

The pixel clock should not be on if the CRTC is not in use, hence move clock enable/disable calls into CRTC callbacks. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 7 +++ drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 16 +--- 2 files changed, 8

[PATCH 2/3] drm/fsl-dcu: do not explicitly transfer registers on plane init

There is no need to explicitly initiate a register transfer and turn off the DCU after initializing the plane registers. In fact, this is harmful and leads to unnecessary flickers if the DCU has been left on by the bootloader. Signed-off-by: Stefan Agner --- If you could give this and 3/3 a try

[PATCH 1/3] drm/fsl-dcu: enable TCON bypass mode by default

Do not use encoder disable/enable callbacks to control bypass mode as this seems to mess with the signals not liked by displays. This also makes more sense since the encoder is already defined to be parallel RGB/LVDS at creation time. Signed-off-by: Stefan Agner --- I tested that on Vybrid. Meng

[PATCH v5] drm/fsl-dcu: Implement gamma_lut atomic crtc properties

ate a second regmap for gamma memory space using little endian. > The registers after the first address space are not accessed yet, > hence new device trees would even work with old kernels. Just new > kernel need the new format so we can access the separate gamma > reg space. > &

[PATCH v4] drm/fsl-dcu: Implement gamma_lut atomic crtc properties

mma regmap section. Also, please mention that we did not access the registers after the first address space yet, hence new device trees would even work with old kernels. Just new kernel need the new format so we can access the separate gamma reg space. > > Suggested-by: Stefan Agner > Signed-off-by

[PATCH v3] drm/fsl-dcu: Implement gamma_lut atomic crtc properties

On 2016-09-25 23:04, Meng Yi wrote: >> On Wed, Sep 21, 2016 at 11:10:11AM -0700, Stefan Agner wrote: >> > On 2016-09-13 01:49, Meng Yi wrote: >> > >> > diff --git a/drivers/gpu/drm/fsl-dcu/Kconfig >> > >> > b/drivers/gpu/drm/fsl-dcu/Kconfig index

[PATCH 0/4] drm/fsl-dcu: add overlay and cursor plane support

>> https://cloud.agner.ch/index.php/s/Yfqa2u7UBEWUT8N It would be interesting whether you see that on LS1021a too. -- Stefan >> >> Any ideas? >> >> Stefan Agner (4): >> drm/fsl-dcu: support overlay and cursor planes >> drm/fsl-dcu: respect pos/siz

[PATCH v3] drm/fsl-dcu: Implement gamma_lut atomic crtc properties

On 2016-09-13 01:49, Meng Yi wrote: >> > diff --git a/drivers/gpu/drm/fsl-dcu/Kconfig >> > b/drivers/gpu/drm/fsl-dcu/Kconfig index 14a72c4..f9c76b1 100644 >> > --- a/drivers/gpu/drm/fsl-dcu/Kconfig >> > +++ b/drivers/gpu/drm/fsl-dcu/Kconfig >> > @@ -11,3 +11,9 @@ config DRM_FSL_DCU >> >help >>

[GIT PULL] drm/fsl-dcu: fixes for v4.9

Estevam (1): drm/fsl-dcu: disable clock on error path Stefan Agner (1): drm/fsl-dcu: fix endian issue when using clk_register_divider Wei Yongjun (1): drm/fsl-dcu: use PTR_ERR_OR_ZERO() to simplify the code drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 12 ++-- drivers/gpu/d

[PATCH v3] drm/fsl-dcu: Implement gamma_lut atomic crtc properties

an registers > while the rest of the address-space in 2D-ACE is big-endian. > Workaround: > Split the DCU regs into "regs", "palette", "gamma" and "cursor". > Create a second regmap for gamma memory space using little endian. > > Sugge

[PATCH v3] drm/fsl-dcu: Implement gamma_lut atomic crtc properties

space in 2D-ACE is big-endian. > Workaround: > Split the DCU regs into "regs", "palette", "gamma" and "cursor". > Create a second regmap for gamma memory space using little endian. > > Suggested-by: Stefan Agner > Signed-off-by: Meng Yi >

[PATCH 4/4] drm/fsl-dcu: do not update when modifying irq registers

The IRQ status and mask registers are not "double buffered" according to the reference manual. Hence, there is no extra transfer/update write needed when modifying these registers. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 4 1 file changed, 4

[PATCH 3/4] drm/fsl-dcu: update all registers on flush

Use the UPDATE_MODE READREG bit to initiate a register transfer on flush. This makes sure that we flush all registers only once for all planes. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 3 +++ drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c | 5 - 2 files

[PATCH 2/4] drm/fsl-dcu: respect pos/size register sizes

Mask the size and position values to avoid mutual overwriting. Especially, a negative X position caused the Y position to be overwritten with 0xfff too. This has been observed when using a layer as cursor layer. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h | 8

[PATCH 1/4] drm/fsl-dcu: support overlay and cursor planes

Add support for overlay plane and a cursor plane. The driver uses the topmost plane as cursor plane. The DCU IP would have dedicated cursor support, but that lacks proper color support and hence is not practical to use for Linux systems. Signed-off-by: Stefan Agner --- drivers/gpu/drm/fsl-dcu

[PATCH 0/4] drm/fsl-dcu: add overlay and cursor plane support

READREG, which according to documentation: The READREG bit causes a single transfer to begin at the next frame blanking period. This bit is cleared when the transfer is complete. I made a video how that looks: https://cloud.agner.ch/index.php/s/Yfqa2u7UBEWUT8N Any ideas? Stefan Agner (4): drm/fsl

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