On Fri, Aug 06, 2021 at 01:34:33PM +0200, Thomas Hellström (Intel) wrote:
> Hi,
>
> On 8/3/21 7:26 PM, Matthew Brost wrote:
> > On Tue, Aug 03, 2021 at 02:15:13PM +0200, Daniel Vetter wrote:
> > > On Tue, Aug 3, 2021 at 6:53 AM Matthew Brost
> > > wrote:
> > > > Minimum set of patches to enable
On 8/6/21 1:34 PM, Thomas Hellström (Intel) wrote:
Hi,
On 8/3/21 7:26 PM, Matthew Brost wrote:
On Tue, Aug 03, 2021 at 02:15:13PM +0200, Daniel Vetter wrote:
On Tue, Aug 3, 2021 at 6:53 AM Matthew Brost
wrote:
Minimum set of patches to enable GuC submission on DG1 and enable
it by
On 8/6/21 1:34 PM, Thomas Hellström (Intel) wrote:
Hi,
On 8/3/21 7:26 PM, Matthew Brost wrote:
On Tue, Aug 03, 2021 at 02:15:13PM +0200, Daniel Vetter wrote:
On Tue, Aug 3, 2021 at 6:53 AM Matthew Brost
wrote:
Minimum set of patches to enable GuC submission on DG1 and enable
it by
Hi,
On 8/3/21 7:26 PM, Matthew Brost wrote:
On Tue, Aug 03, 2021 at 02:15:13PM +0200, Daniel Vetter wrote:
On Tue, Aug 3, 2021 at 6:53 AM Matthew Brost wrote:
Minimum set of patches to enable GuC submission on DG1 and enable it by
default.
A little difficult to test as IGTs do not work with
