On Fri, Mar 11, 2011 at 02:08:46AM +0100, Indan Zupancic wrote:
> On Thu, March 10, 2011 14:31, Daniel Vetter wrote:
> > Am Do, 10.03.2011, 11:36 schrieb Indan Zupancic:
> >> Which versions fix this, just for reference?
> >
> > git master branch of libdrm and xf86-video-intel newer than
On Thu, March 10, 2011 14:31, Daniel Vetter wrote:
> Am Do, 10.03.2011, 11:36 schrieb Indan Zupancic:
>> Which versions fix this, just for reference?
>
> git master branch of libdrm and xf86-video-intel newer than 2011-02-22.
Thank you. If there will be no new releases of those packages within
a
Am Do, 10.03.2011, 11:36 schrieb Indan Zupancic:
> On Thu, March 10, 2011 08:52, Daniel Vetter wrote:
>> [Aside: This only happens if you have new enough userspace that supports
>> relaxed tiling. Old userspace and new kernels are _not_ broken.]
>
> Yes, I noticed it got reverted when digging into
On Thu, March 10, 2011 08:52, Daniel Vetter wrote:
> Am Do, 10.03.2011, 06:06 schrieb Indan Zupancic:
>> This isn't in rc8, can someone make sure it gets into 2.6.38-rc9/2.6.38?
>
> The patch unfortunately broke gen4+ (more precisely: the unwritten abi
> guarantee that userspace can tile buffers
Am Do, 10.03.2011, 06:06 schrieb Indan Zupancic:
> This isn't in rc8, can someone make sure it gets into 2.6.38-rc9/2.6.38?
The patch unfortunately broke gen4+ (more precisely: the unwritten abi
guarantee that userspace can tile buffers that don't have a complete last
tile row, as long as it
Hi,
On Wed, February 23, 2011 08:10, Daniel Vetter wrote:
> Am Mi, 23.02.2011, 07:59 schrieb Indan Zupancic:
>> On Tue, February 22, 2011 18:25, Daniel Vetter wrote:
>>> It looks like gen2 has a peculiar interleaved 2-row inter-tile
>>> layout. Probably inherited from i81x which had 2kb tiles
Am Do, 10.03.2011, 06:06 schrieb Indan Zupancic:
This isn't in rc8, can someone make sure it gets into 2.6.38-rc9/2.6.38?
The patch unfortunately broke gen4+ (more precisely: the unwritten abi
guarantee that userspace can tile buffers that don't have a complete last
tile row, as long as it
On Thu, March 10, 2011 08:52, Daniel Vetter wrote:
Am Do, 10.03.2011, 06:06 schrieb Indan Zupancic:
This isn't in rc8, can someone make sure it gets into 2.6.38-rc9/2.6.38?
The patch unfortunately broke gen4+ (more precisely: the unwritten abi
guarantee that userspace can tile buffers that
Am Do, 10.03.2011, 11:36 schrieb Indan Zupancic:
On Thu, March 10, 2011 08:52, Daniel Vetter wrote:
[Aside: This only happens if you have new enough userspace that supports
relaxed tiling. Old userspace and new kernels are _not_ broken.]
Yes, I noticed it got reverted when digging into git
Hi,
On Wed, February 23, 2011 08:10, Daniel Vetter wrote:
Am Mi, 23.02.2011, 07:59 schrieb Indan Zupancic:
On Tue, February 22, 2011 18:25, Daniel Vetter wrote:
It looks like gen2 has a peculiar interleaved 2-row inter-tile
layout. Probably inherited from i81x which had 2kb tiles (which
Am Mi, 23.02.2011, 07:59 schrieb Indan Zupancic:
> On Tue, February 22, 2011 18:25, Daniel Vetter wrote:
>> It looks like gen2 has a peculiar interleaved 2-row inter-tile
>> layout. Probably inherited from i81x which had 2kb tiles (which
>> naturally fit an even-number-of-tile-rows scheme to fit
Hi,
On Tue, February 22, 2011 18:25, Daniel Vetter wrote:
> It looks like gen2 has a peculiar interleaved 2-row inter-tile
> layout. Probably inherited from i81x which had 2kb tiles (which
> naturally fit an even-number-of-tile-rows scheme to fit onto 4kb
> pages). There is no other mention of
On Tue, Feb 22, 2011 at 06:32:11PM +0100, Thierry Vignaud wrote:
> Giving that lack of documentation, could you put some more comments in the
> code?
> so that nobody cleans out that "strange workaround" in 6 monthes...
It's not a workaround, it's how the hw works. If we'd add the explanation
On 22 February 2011 18:25, Daniel Vetter wrote:
> It looks like gen2 has a peculiar interleaved 2-row inter-tile
> layout. Probably inherited from i81x which had 2kb tiles (which
> naturally fit an even-number-of-tile-rows scheme to fit onto 4kb
> pages). There is no other mention of this in any
It looks like gen2 has a peculiar interleaved 2-row inter-tile
layout. Probably inherited from i81x which had 2kb tiles (which
naturally fit an even-number-of-tile-rows scheme to fit onto 4kb
pages). There is no other mention of this in any docs (also not
in the Intel internal documention
Hi,
On Tue, February 22, 2011 18:25, Daniel Vetter wrote:
It looks like gen2 has a peculiar interleaved 2-row inter-tile
layout. Probably inherited from i81x which had 2kb tiles (which
naturally fit an even-number-of-tile-rows scheme to fit onto 4kb
pages). There is no other mention of this
Am Mi, 23.02.2011, 07:59 schrieb Indan Zupancic:
On Tue, February 22, 2011 18:25, Daniel Vetter wrote:
It looks like gen2 has a peculiar interleaved 2-row inter-tile
layout. Probably inherited from i81x which had 2kb tiles (which
naturally fit an even-number-of-tile-rows scheme to fit onto 4kb
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