On 22/11/2023 10:29, Krzysztof Kozlowski wrote:
> On 22/11/2023 10:06, AngeloGioacchino Del Regno wrote:
>
>>
>
> Hey Krzysztof,
>
> This is interesting. It might be about the cores that are missing from
> the partial
> core_mask raising interrupts, but an external
Il 27/11/23 12:24, Marek Szyprowski ha scritto:
On 24.11.2023 13:45, Marek Szyprowski wrote:
On 22.11.2023 10:29, Krzysztof Kozlowski wrote:
On 22/11/2023 10:06, AngeloGioacchino Del Regno wrote:
Hey Krzysztof,
This is interesting. It might be about the cores that are missing
from the partial
On 24.11.2023 13:45, Marek Szyprowski wrote:
> On 22.11.2023 10:29, Krzysztof Kozlowski wrote:
>> On 22/11/2023 10:06, AngeloGioacchino Del Regno wrote:
>> Hey Krzysztof,
>>
>> This is interesting. It might be about the cores that are missing
>> from the partial
>> core_mask ra
On 22.11.2023 10:29, Krzysztof Kozlowski wrote:
> On 22/11/2023 10:06, AngeloGioacchino Del Regno wrote:
> Hey Krzysztof,
>
> This is interesting. It might be about the cores that are missing from
> the partial
> core_mask raising interrupts, but an external abort on non-linefe
On 22.11.2023 10:29, Krzysztof Kozlowski wrote:
> On 22/11/2023 10:06, AngeloGioacchino Del Regno wrote:
> Hey Krzysztof,
>
> This is interesting. It might be about the cores that are missing from
> the partial
> core_mask raising interrupts, but an external abort on non-linef
On Wed, 22 Nov 2023 11:23:05 +0100
AngeloGioacchino Del Regno
wrote:
> Il 22/11/23 10:54, Boris Brezillon ha scritto:
> > Hi Angelo,
> >
> > On Wed, 22 Nov 2023 10:06:19 +0100
> > AngeloGioacchino Del Regno
> > wrote:
> >
> >> Il 21/11/23 18:08, Krzysztof Kozlowski ha scritto:
> >>> On 21/
Il 22/11/23 10:48, Steven Price ha scritto:
On 22/11/2023 09:06, AngeloGioacchino Del Regno wrote:
Il 21/11/23 18:08, Krzysztof Kozlowski ha scritto:
On 21/11/2023 17:55, Boris Brezillon wrote:
On Tue, 21 Nov 2023 17:11:42 +0100
AngeloGioacchino Del Regno
wrote:
Il 21/11/23 16:34, Krzysztof
Il 22/11/23 10:54, Boris Brezillon ha scritto:
Hi Angelo,
On Wed, 22 Nov 2023 10:06:19 +0100
AngeloGioacchino Del Regno
wrote:
Il 21/11/23 18:08, Krzysztof Kozlowski ha scritto:
On 21/11/2023 17:55, Boris Brezillon wrote:
On Tue, 21 Nov 2023 17:11:42 +0100
AngeloGioacchino Del Regno
wrote:
Hi Angelo,
On Wed, 22 Nov 2023 10:06:19 +0100
AngeloGioacchino Del Regno
wrote:
> Il 21/11/23 18:08, Krzysztof Kozlowski ha scritto:
> > On 21/11/2023 17:55, Boris Brezillon wrote:
> >> On Tue, 21 Nov 2023 17:11:42 +0100
> >> AngeloGioacchino Del Regno
> >> wrote:
> >>
> >>> Il 21/11/23 16:
On 22/11/2023 09:06, AngeloGioacchino Del Regno wrote:
> Il 21/11/23 18:08, Krzysztof Kozlowski ha scritto:
>> On 21/11/2023 17:55, Boris Brezillon wrote:
>>> On Tue, 21 Nov 2023 17:11:42 +0100
>>> AngeloGioacchino Del Regno
>>> wrote:
>>>
Il 21/11/23 16:34, Krzysztof Kozlowski ha scritto:
>>
On 22/11/2023 10:06, AngeloGioacchino Del Regno wrote:
>
Hey Krzysztof,
This is interesting. It might be about the cores that are missing from the
partial
core_mask raising interrupts, but an external abort on non-linefetch is
strange to
see here.
Il 21/11/23 18:08, Krzysztof Kozlowski ha scritto:
On 21/11/2023 17:55, Boris Brezillon wrote:
On Tue, 21 Nov 2023 17:11:42 +0100
AngeloGioacchino Del Regno
wrote:
Il 21/11/23 16:34, Krzysztof Kozlowski ha scritto:
On 08/11/2023 14:20, Steven Price wrote:
On 02/11/2023 14:15, AngeloGioacchi
On Tue, 21 Nov 2023 18:08:44 +0100
Krzysztof Kozlowski wrote:
> > non-linefetch access, but it might be caused by a register access after
> > the clock or power domain driving the register bank has been disabled.
> > The following diff might help validate this theory. If that works, we
> > probab
On 21/11/2023 17:55, Boris Brezillon wrote:
> On Tue, 21 Nov 2023 17:11:42 +0100
> AngeloGioacchino Del Regno
> wrote:
>
>> Il 21/11/23 16:34, Krzysztof Kozlowski ha scritto:
>>> On 08/11/2023 14:20, Steven Price wrote:
On 02/11/2023 14:15, AngeloGioacchino Del Regno wrote:
> The lay
On Tue, 21 Nov 2023 17:11:42 +0100
AngeloGioacchino Del Regno
wrote:
> Il 21/11/23 16:34, Krzysztof Kozlowski ha scritto:
> > On 08/11/2023 14:20, Steven Price wrote:
> >> On 02/11/2023 14:15, AngeloGioacchino Del Regno wrote:
> >>> The layout of the registers {TILER,SHADER,L2}_PWROFF_LO, use
On 21/11/2023 17:11, AngeloGioacchino Del Regno wrote:
> Il 21/11/23 16:34, Krzysztof Kozlowski ha scritto:
>> On 08/11/2023 14:20, Steven Price wrote:
>>> On 02/11/2023 14:15, AngeloGioacchino Del Regno wrote:
The layout of the registers {TILER,SHADER,L2}_PWROFF_LO, used to request
power
Il 21/11/23 16:34, Krzysztof Kozlowski ha scritto:
On 08/11/2023 14:20, Steven Price wrote:
On 02/11/2023 14:15, AngeloGioacchino Del Regno wrote:
The layout of the registers {TILER,SHADER,L2}_PWROFF_LO, used to request
powering off cores, is the same as the {TILER,SHADER,L2}_PWRON_LO ones:
thi
On 08/11/2023 14:20, Steven Price wrote:
> On 02/11/2023 14:15, AngeloGioacchino Del Regno wrote:
>> The layout of the registers {TILER,SHADER,L2}_PWROFF_LO, used to request
>> powering off cores, is the same as the {TILER,SHADER,L2}_PWRON_LO ones:
>> this means that in order to request poweroff of
On 02/11/2023 14:15, AngeloGioacchino Del Regno wrote:
> The layout of the registers {TILER,SHADER,L2}_PWROFF_LO, used to request
> powering off cores, is the same as the {TILER,SHADER,L2}_PWRON_LO ones:
> this means that in order to request poweroff of cores, we are supposed
> to write a bitmask o
The layout of the registers {TILER,SHADER,L2}_PWROFF_LO, used to request
powering off cores, is the same as the {TILER,SHADER,L2}_PWRON_LO ones:
this means that in order to request poweroff of cores, we are supposed
to write a bitmask of cores that should be powered off!
This means that the panfros
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