The IC register offset is at +0x2 relative to the control module
registers on all IPUv3 versions. This patch fixes wrong values for
i.MX51 and i.MX53.
Signed-off-by: Philipp Zabel
---
drivers/gpu/ipu-v3/ipu-common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
The IC register offset is at +0x2 relative to the control module
registers on all IPUv3 versions. This patch fixes wrong values for
i.MX51 and i.MX53.
Signed-off-by: Philipp Zabel
---
drivers/gpu/ipu-v3/ipu-common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git