[PATCH 01/12] drm/amdgpu: add amd_gnb_bus support

2015-08-10 Thread Mark Brown
On Fri, Aug 07, 2015 at 04:03:08PM -0400, Felix Kuehling wrote: > 1. GPU driver gets initialized, detects a GPU with audio co-processor (ACP) > 2. GPU driver registers mfd_cell for the ACP device using > mfd_add_hotplug_devices > * It's not really hot-plug, but the mem_base, irq_base,

[PATCH 01/12] drm/amdgpu: add amd_gnb_bus support

2015-08-07 Thread Mark Brown
On Fri, Aug 07, 2015 at 12:16:03PM -0400, Felix Kuehling wrote: > Hi, > > To elaborate more on Alex's explanation ... Please don't top post, reply in line deleting any unneeded context so people have context for what's being discussed. > Therefore we created this "virtual" GNB bus that allows

[PATCH 01/12] drm/amdgpu: add amd_gnb_bus support

2015-08-07 Thread Mark Brown
On Fri, Aug 07, 2015 at 10:17:36AM -0400, Alex Deucher wrote: > On Fri, Aug 7, 2015 at 6:25 AM, Mark Brown wrote: > > Looking at the code I'm not seeing too much bus specific except for the > > above which looks like the sort of device we usually represent as a MFD > > (with the MFD providing

[PATCH 01/12] drm/amdgpu: add amd_gnb_bus support

2015-08-07 Thread Felix Kuehling
On 15-08-07 02:24 PM, Mark Brown wrote: > Like I say this just sounds like exactly the sort of thing we handle > with an MFD, it's a very common pattern. OK, the MFD documentation in Documentation/devicetree/bindings/mfd/ seemed to imply a dependency on a devicetree. It took me a moment to

[PATCH 01/12] drm/amdgpu: add amd_gnb_bus support

2015-08-07 Thread Felix Kuehling
Hi, To elaborate more on Alex's explanation ... AMD SOCs have audio (and in the future potentially also camera image signal processors) IPs built into the GNB (graphics north bridge). These IPs are programmed through MMIO registers in the graphics MMIO aperture. They send events to the host

[PATCH 01/12] drm/amdgpu: add amd_gnb_bus support

2015-08-07 Thread Mark Brown
On Thu, Aug 06, 2015 at 10:25:02AM -0400, Alex Deucher wrote: > From: Chunming Zhou > > This is used by the incoming ACP driver. The DMA > engine for the i2s audio codec is part of the GPU. > > This exposes an amd gnb bus for the i2s codec to > hang off of. Could you be more specific about

[PATCH 01/12] drm/amdgpu: add amd_gnb_bus support

2015-08-07 Thread Alex Deucher
On Fri, Aug 7, 2015 at 6:25 AM, Mark Brown wrote: > On Thu, Aug 06, 2015 at 10:25:02AM -0400, Alex Deucher wrote: >> From: Chunming Zhou >> >> This is used by the incoming ACP driver. The DMA >> engine for the i2s audio codec is part of the GPU. >> >> This exposes an amd gnb bus for the i2s

[alsa-devel] [PATCH 01/12] drm/amdgpu: add amd_gnb_bus support

2015-08-06 Thread Lars-Peter Clausen
> @@ -134,6 +136,7 @@ config DRM_AMDGPU > select HWMON > select BACKLIGHT_CLASS_DEVICE > select INTERVAL_TREE > + select DRM_AMD_GNB_BUS Here you select the symbol. [...] > +config DRM_AMD_GNB_BUS > + tristate "AMD GNB bus - used for GNB IPs such as ACP and ISP" Here

[PATCH 01/12] drm/amdgpu: add amd_gnb_bus support

2015-08-06 Thread Alex Deucher
From: Chunming Zhou This is used by the incoming ACP driver. The DMA engine for the i2s audio codec is part of the GPU. This exposes an amd gnb bus for the i2s codec to hang off of. Reviewed-by: Jammy Zhou Signed-off-by: Chunming Zhou Signed-off-by: Alex Deucher ---

[PATCH 01/12] drm/amdgpu: add amd_gnb_bus support

2015-07-09 Thread Alex Deucher
From: Chunming Zhou This is used by the incoming ACP driver. The DMA engine for the i2s audio codec is part of the GPU. This exposes an amd gnb bus for the i2s codec to hang off of. Reviewed-by: Jammy Zhou Signed-off-by: Chunming Zhou Signed-off-by: Alex Deucher ---