Re: [Intel-gfx] [PATCH 07/12] drm/i915: Don't look at unrelated PIPECONF bits for interlaced readout

2019-09-18 Thread Mun, Gwan-gyeong
On Thu, 2019-07-18 at 17:50 +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > Since HSW the PIPECONF progressive vs. interlaced selection is done > with just two bits instead of the earlier three. Let's not look at > the > extra bit on HSW+. Also gen2 doesn't support interlaced displays at >

[PATCH 07/12] drm/i915: Don't look at unrelated PIPECONF bits for interlaced readout

2019-07-18 Thread Ville Syrjala
From: Ville Syrjälä Since HSW the PIPECONF progressive vs. interlaced selection is done with just two bits instead of the earlier three. Let's not look at the extra bit on HSW+. Also gen2 doesn't support interlaced displays at all. This is actually fine as is currently because the extra bit is